KR0161122B1 - Semiconductor inspection device - Google Patents
Semiconductor inspection device Download PDFInfo
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- KR0161122B1 KR0161122B1 KR1019950034102A KR19950034102A KR0161122B1 KR 0161122 B1 KR0161122 B1 KR 0161122B1 KR 1019950034102 A KR1019950034102 A KR 1019950034102A KR 19950034102 A KR19950034102 A KR 19950034102A KR 0161122 B1 KR0161122 B1 KR 0161122B1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 238000007689 inspection Methods 0.000 title claims abstract description 33
- 230000005283 ground state Effects 0.000 claims abstract description 20
- 230000003287 optical effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
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Abstract
본 발명은 정전매트 위에 설치되고, 외부 인가전원이 인가되어 구동되는 동작 시스템부에 의해 동작되는 반도체 검사장치에 있어서, 동작시스템부에 일단이 연결되고, 또 다른 단은 제 1접지단에 접지된 부하저항과, 동작시스템부와 부하저항 사이에 일단이 연결되고, 또 다른 단은 제 2접지단과 연결되어서, 제 1접지단과 제 2접지단 사이가 단락되면 접지 양호상태가 표시되도록 하고, 제 1접지단과 제 2접지단 사이가 개방되면 접지 불량상태를 표시되도록 하는 상태표시부로 이루어지는 접지상태 표시기를 부가하여 형성시킨 것을 특징으로 한다.The present invention provides a semiconductor inspection apparatus installed on an electrostatic mat and operated by an operating system unit to which an externally applied power source is applied, wherein one end is connected to the operating system unit, and another end is grounded to the first ground terminal. One end is connected between the load resistance, the operating system part and the load resistance, and another end is connected to the second ground terminal so that a short ground condition is displayed when the first ground terminal and the second ground terminal are shorted. When the ground terminal and the second ground terminal is open, characterized in that the ground state indicator consisting of a state display unit for displaying a poor state of the ground is formed.
Description
제1도는 종래의 반도체 검사장치를 개략적으로 도시한 도면.1 is a schematic view showing a conventional semiconductor inspection apparatus.
제2도는 본 발명에 의한 반도체 검사장치를 도시한 도면.2 is a diagram showing a semiconductor inspection apparatus according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10,20 : 전력선 11 : 공통접지선10,20: power line 11: common ground line
21 : 접지상태 표시기 22 : 상태표시부21: ground status indicator 22: status display
본 발명은 반도체 검사장치에 관한 것으로, 특히 반도체 집적회로 제품을 검사하는데 있어서, 이에스디(ESD ;electro static discharge)에 민감한 반도체 집적회로(IC;intgrated circuit)의 이에스디 손상(ESD demage)을 방지하는 것에 적당하도록 한 반도체 검사장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor inspection device, and particularly to prevent ESD demage of an integrated circuit (IC) sensitive to electro static discharge (ESD) in inspecting a semiconductor integrated circuit product. The present invention relates to a semiconductor inspection apparatus that is suitable for use.
반도체 제조공정에 있어서, 제조가 완료된 반도체 집적회로 제품은 반도체 검사장치에서 동작 신뢰성 등의 검사를 실시하게 된다.In the semiconductor manufacturing process, the completed semiconductor integrated circuit product is inspected such as operation reliability in the semiconductor inspection apparatus.
이때, 반도체 검사장치는 외부 공급전원을 통하여 동작되며, 또한 반도체 검사장치는 반도체 검사장치에 외부 공급전원을 인가하기 위한 전력선(power cable)에 포함되어 있는 공통(common)접지선을 통하여 접지되고 있다.In this case, the semiconductor inspection apparatus is operated through an external supply power, and the semiconductor inspection apparatus is grounded through a common ground line included in a power cable for applying an external supply power to the semiconductor inspection apparatus.
제1도는 종래의 반도체 검사장치를 개략적으로 도시한 도면으로, 종래의 반도체 검사장치의 접지상태를 설명하기 위한 개략적인 블럭도(block)이다. 이하 첨부된 도면을 참고로 종래의 반도체 검사장치를 설명하면 다음과 같다.FIG. 1 is a diagram schematically showing a conventional semiconductor inspection apparatus, and is a schematic block diagram for explaining a ground state of a conventional semiconductor inspection apparatus. Hereinafter, a conventional semiconductor inspection apparatus will be described with reference to the accompanying drawings.
종래의 반도체 검사장치에서는 제1도에 도시된 바와 같이, 동작시스템(system)부가 외부에서 전력선(10)을 통하여 인가되는 외부 공급전원에 의해 구동되게 되며, 동작시스템부의 구동에 의해 반도체 검사장치는 동작하게 되고, 반도체 검사장치의 자체의 접지 즉, 동작시스템부의 접지는 전력선(10)에 포함되어 있는 공통접지선(11)이 외부 공급전원부의 공통접지단과 연결되어 진행된다.In the conventional semiconductor inspection apparatus, as shown in FIG. 1, an operating system is driven by an external supply power applied through the power line 10 from the outside, and the semiconductor inspection apparatus is driven by driving the operating system. In operation, the ground of the semiconductor inspection apparatus itself, that is, the ground of the operating system part, is connected by the common ground line 11 included in the power line 10 to the common ground terminal of the external power supply unit.
즉, 종래의 반도체 검사장치는 정전매트(MAT) 위에 설치되되, 근본적으로 접지가 양호하게 설치되도록 초기에 검토되고 있다.In other words, the conventional semiconductor inspection apparatus is installed on the electrostatic mat MAT, but is initially examined to provide a good grounding.
그러나 종래의 반도체 검사장치의 운용도중 접지 상태의 끊어짐 또는 변동으로 인하여 접지가 불량한 상태로 될때에, 이에 대한 확인이 되지 않고 있으며, 접지가 불량한 상태에서 검사장치를 운용, 즉 반도체 집적회로의 검사를 실시할 경우에 접지의 불량에 의해서 검사를 진행시키고 있는 반도체 집적회로 제품에 이에스디(ESD) 손상을 입히게 되는 문제가 발생되었다.However, when the ground is in a bad state due to the breaking or fluctuation of the ground state during the operation of the conventional semiconductor inspection device, it is not confirmed. In this case, a problem arises that the ESD is damaged to a semiconductor integrated circuit product undergoing inspection due to a poor grounding.
본 발명은 이러한 문제를 해결하기 위하여 안출된 것으로, 반도체 검사장치의 접지 상태를 작업자가 육안으로 확인할 수 있는 접지상태 표시기를 반도체 검사장치에 부여하여, 접지의 불량에 의한 반도체 집적회로 제품의 이에스디 손상 등을 방지하고자 하는 것이 그 목적이다.SUMMARY OF THE INVENTION The present invention has been made to solve such a problem. The present invention provides a ground state indicator that allows an operator to visually check the ground state of a semiconductor inspection apparatus, thereby providing a semiconductor integrated circuit product. The purpose is to prevent damage or the like.
본 발명은 정전매트 위에 설치되고, 외부 인가전원이 인가되어 구동되는 동작 시스템부에 의해 동작되는 반도체 검사장치에 있어서, 동작시스템부에 일단이 연결되고, 또 다른 단은 제 1접지단에 접지된 부하저항과, 동작시스템부와 부하 저항 사이에 일단이 연결되고, 또 다른 단은 제 2접지단과 연결되어서, 제 1접지단과 제 2접지단 사이가 단락되면 접지 양호상태가 표시되도록 하고, 제 1접지단과 제 2접지단 사이가 개방되면 접지 불량상태를 표시되도록 하는 상태표시부로 이루어지는 접지상태 표시기를 부가하여 형성시킨 것을 특징으로 한다.The present invention provides a semiconductor inspection apparatus installed on an electrostatic mat and operated by an operating system unit to which an externally applied power source is applied, wherein one end is connected to the operating system unit, and another end is grounded to the first ground terminal. One end is connected between the load resistance, the operating system part and the load resistance, and another end is connected to the second ground terminal so that a short ground condition is displayed when the short circuit between the first ground terminal and the second ground terminal is performed. When the ground terminal and the second ground terminal is open, characterized in that the ground state indicator consisting of a state display unit for displaying a poor state of the ground is formed.
제2도는 본 발명에 의한 반도체 검사장치를 도시한 도면으로, 본 발명에 의한 반도체 검사장치의 접지 상태 표시기의 일실시예를 도시한 회로도이다. 이하 첨부된 도면을 참고로 본 발명에 의한 반도체 검사장치의 구성 및 동작을 설명하면 다음과 같다.2 is a diagram showing a semiconductor inspection apparatus according to the present invention, and is a circuit diagram showing an embodiment of the ground state indicator of the semiconductor inspection apparatus according to the present invention. Hereinafter, the structure and operation of a semiconductor inspection apparatus according to the present invention will be described with reference to the accompanying drawings.
제2도에 도시된 바와 같이, 본 발명은 정전매트 위에 설치되고, 외부 인가전원이 인가되어 구동되는 동작 시스템부에 의해 동작되는 반도체 검사장치에 있어서, 동작시스템부에 일단이 연결되고, 또 다른 단은 제 1접지단(E1)에 접지된 부하저항(RL)과, 동작시스템부와 부하저항 사이에 일단이 연결되고, 또 다른 단은 제 2접지단(E2)과 연결되어서, 제 1접지단과 제 2접지단 사이가 단락되면 접지 양호상태가 표시되도록 하고, 제 1접지단과 제 2접지단 사이가 개방되면 접지 불량상태를 표시되도록 하는 상태표시부(22)로 이루어지는 접지상태 표시기(21)를 부가하여 형성시킨 것을 특징으로 하며, 상태표시부(22)의 일실시예는 동작시스템부와 부하저항 사이에 연결되는 직류전원부(V)와, 직류전원부에 대하여 순방향으로 직렬접속되는 광다이오드(LED ;light emitting diode)로 이루어지되, 광 다이오드는 제 1접지단과 제 2접지단 사이가 단락될때 흐르는 전류값에 의해 동작되고, 제 1접지단과 제 2접지단 사이가 개방될때에는 동작되지 않는 동작특성을 갖는 것이 특징이다.As shown in FIG. 2, the present invention is a semiconductor inspection apparatus installed on an electrostatic mat and operated by an operating system unit to which an externally applied power source is applied, one end of which is connected to the operating system unit, and another The stage is connected to the load resistor R L grounded at the first ground terminal E 1 , one end is connected between the operating system unit and the load resistor, and the other stage is connected to the second ground terminal E 2 , A ground state indicator comprising a status display unit 22 for displaying a good ground state when the first ground terminal and the second ground terminal are short-circuited, and displaying a poor ground state when the first ground terminal and the second ground terminal are opened. 21), and the embodiment of the status display unit 22 includes a direct current power supply unit V connected between an operating system unit and a load resistor, and a photodiode connected in series with the direct current supply unit in a forward direction. (LED; light emitting diode), wherein the photodiode is operated by a current value flowing when the first ground terminal and the second ground terminal are short-circuited, and does not operate when the first ground terminal and the second ground terminal are opened. Is characteristic.
즉, 본 발명에 의한 반도체 검사장치에서 접지상태 표시기의 일실시예로 제시한 광다이오드(LED)는 제 1접지단(E1)과 제 2접지단(E2) 사이의 접지가 양호하게 되어 제 1접지단과 제 2접지단이 단락될때에 흐르는 전류값에 의해 동작되고, 제 1접지단과 제 2접지단 사이의 접지가 불량할때에는 제 1접지단과 제 2접지단의 사이가 개방되는 것과 같아서, 이때 흐르게 되는 전류값에 의해서는 동작되지 않는 전류 특성을 갖으며, 이러한 광다이오드는 본 발명에 의한 반도체 검사장치의 접지상태 표시기의 회로 구성시에 각각의 회로 소자 즉, 직류전원(V)의 크기, 부하저항(RL)의 크기 등과, 광다이오드의 자체가 가지는 자체저항(rd), 동작전류 또는 전압값등을 비교하여 선택한다.That is, in the semiconductor inspection apparatus according to the present invention, the photodiode LED as an example of the ground state indicator has a good ground between the first ground terminal E 1 and the second ground terminal E 2 . It is operated by the current value flowing when the first ground terminal and the second ground terminal are short-circuited, and when the ground between the first ground terminal and the second ground terminal is poor, it is as if the space between the first ground terminal and the second ground terminal is opened. In this case, the photodiode has a current characteristic which is not operated by a current value flowing in the circuit, and the photodiode of each of the circuit elements, that is, the DC power supply (V) in the circuit configuration of the ground state indicator of the semiconductor inspection apparatus according to the present invention. It is selected by comparing the size, as the size of the load resistor (R L), its resistance (r d), the operating current or a voltage value such as a photodiode having its own.
이하, 본 발명에 의한 반도체 검사장치에서 접지상태 표시기의 동작을 설명하면 다음과 같다.Hereinafter, the operation of the ground state indicator in the semiconductor test apparatus according to the present invention will be described.
본 발명에 의한 반도체 검사장치는 정전매트 위에 설치되고, 접지상태 표시기의 접지단은 제 1,2접지단(E1,E2)으로, 각각의 접지단을 갖게 된다.The semiconductor inspection apparatus according to the present invention is provided on an electrostatic mat, and the ground terminals of the ground state indicators are the first and second ground terminals E 1 and E 2 , and have respective ground terminals.
이때, 정전매트의 저항(Rm)은 1 메가오옴(MΩ) 정도의 저항값을 갖게 되고 제2도에서 점선으로 표시하였다.In this case, the resistance Rm of the electrostatic mat has a resistance value of about 1 Mega Ohm (MΩ) and is indicated by a dotted line in FIG. 2.
그리고 본 발명에 의한 반도체 검사장치에서 접지가 양호하게 되어 접지상태 표시기의 제 1접지단(E1)과 제 2접지단(E2)이 정전매트를 통하여 단락(short)되면, 직류전원은 부하저항 및 정전매트의 저항을 통하면서, 전류값은 다음과 같은 식으로 표현될 수 있다.In the semiconductor inspection apparatus according to the present invention, when the grounding is good and the first ground terminal E 1 and the second ground terminal E 2 of the ground state indicator are shorted through the electrostatic mat, the DC power is loaded. Through the resistance of the resistor and the electrostatic mat, the current value can be expressed as follows.
Is= V / (Rm+ RL+ rd)I s = V / (R m + R L + r d )
이때, Is는 단락상태에 회로에 흐르게 되는 전류값이고, V 는 직류전원단의 전압을, RL은 부하저항을, rd는 광다이오드의 자체저항을 뜻하며, 따라서 광다이오드는 동작, 즉 온(ON)이 된다.In this case, I s is a current value flowing through the circuit in a short circuit state, V is a voltage of a DC power supply terminal, R L is a load resistance, and r d is a self-resistance of the photodiode. It is ON.
그리고 접지가 불량하게 되어서 제 1접지단과 제 2접지단이 개방되면 제 1접지단과 제 2접지단의 사이에서 무한대의 저항이 존재하게 되는 것과 같아서, 전류값은 다음과 같은 식으로 표현될 수 있다.When the ground is poor and the first ground terminal and the second ground terminal are open, an infinite resistance exists between the first ground terminal and the second ground terminal, and the current value can be expressed as follows. .
Io= V / ∞ ≒ 0I o = V / ∞ ≒ 0
이때, Io는 단락상태에 회로에 흐르게 되는 전류값이며, 따라서 광다이오드는 동작하지 않게 즉, 오프(OFF)가 되는 것이다.At this time, I o is a current value flowing through the circuit in a short circuit state, and thus the photodiode is not operated, that is, turned off.
즉, 본 발명에 의한 반도체 검사장치에서는 종래의 기술과 같이, 장치의 접지상태를 검사를 진행시킨 반도체 집적회로 제품의 손상을 발견하고 난 후에야 확인할 수 있는 것이 아니라, 접지상태 표시기를 부가하여 장치의 접지상태에 따라 온/오프 동작되는 상태표시부에 의해 반도체 검사장치에 접지상태를 외부에서 작업자가 용이하게 확인할 수 있게 되며, 이로 인하여 반도체 검사장치에서 검사를 실시하는 반도체 집적회로 제품을 접지 불량에 의해 발생되는 이에스디(ESD) 손상으로부터 보호할 수 있다.That is, in the semiconductor inspection apparatus according to the present invention, as shown in the related art, the ground state of the device may not be confirmed only after the damage of the semiconductor integrated circuit product which has been inspected is found. The status display unit that is turned on and off according to the ground state enables the operator to easily check the ground state from the outside, and thus, the semiconductor integrated circuit product that is inspected by the semiconductor inspection device may be damaged by poor grounding. Protect against ESD damage.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950034102A KR0161122B1 (en) | 1995-10-05 | 1995-10-05 | Semiconductor inspection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950034102A KR0161122B1 (en) | 1995-10-05 | 1995-10-05 | Semiconductor inspection device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR970023936A KR970023936A (en) | 1997-05-30 |
| KR0161122B1 true KR0161122B1 (en) | 1999-02-01 |
Family
ID=19429321
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1019950034102A Expired - Fee Related KR0161122B1 (en) | 1995-10-05 | 1995-10-05 | Semiconductor inspection device |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR0161122B1 (en) |
-
1995
- 1995-10-05 KR KR1019950034102A patent/KR0161122B1/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR970023936A (en) | 1997-05-30 |
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