KR0150679B1 - Thin film transistor - Google Patents

Abstract

The present invention relates to a thin film transistor capable of reducing leakage current when in an off state and improving on / off current ratio without reducing on current when in an on state, wherein the first gate electrode and the gate are formed on a semiconductor substrate. A second gate electrode contacting both sidewalls of the electrode and having a higher resistivity than the gate electrode, a gate insulating film formed on the first gate electrode and the second gate electrode, and the first and second gate electrodes interposed therebetween; A thin film transistor includes an opposing channel, a source and a drain in contact with both ends of the channel, the gate insulating layer, and a surface of the semiconductor substrate, respectively. As a result, in the off state, only the first gate electrode having a relatively low resistivity operates to reduce an electric field at the edge of the second gate electrode having a higher resistivity than the first gate electrode, thereby reducing leakage current. In addition, since the second gate is operated as the gate electrode in the on state, the on-current can be prevented from decreasing with increasing resistivity as in the conventional thin film transistor having an offset structure.

Description

Thin film transistor and its manufacturing method

1 is a cross-sectional view of a thin film transistor according to the present invention.

2A through 2E are cross-sectional views of a thin film transistor forming process according to an exemplary embodiment of the present invention.

* Explanation of symbols for main parts of the drawings

1 semiconductor substrate 2, 22 first gate electrode

3, 23: second gate electrode 6, 26: source / drain

21: silicon substrate 4, 24: gate insulating film

25: polysilicon film 5, 25`: channel

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to thin film transistors, and more particularly, to thin film transistors suitable for semiconductor integrated devices requiring low power consumption and a method of manufacturing the same.

In the conventional thin film transistors, the leakage current is reduced by forming an offset region between the drain terminal and the gate terminal to reduce the current in the off state, but the on-current is also slightly reduced by increasing the specific resistance of the offset region. There is a problem that the off current characteristics are degraded.

The present invention devised to solve the above problems is to reduce the leakage current when in the off state, and provides a thin film transistor and a method of manufacturing the same that can improve the on / off current ratio without reducing the on current in the on state. Its purpose is to.

The present invention to achieve the above object is a first gate electrode formed on a semiconductor substrate; A second gate electrode contacting both sidewalls of the gate electrode and having a higher resistivity than the gate electrode; A gate insulating film formed on the first gate electrode and the second gate electrode; A channel facing the first and second gate electrodes with the gate insulating layer interposed therebetween; And a source and a drain in contact with both ends of the channel, the gate insulating layer, and a surface of the semiconductor substrate, respectively.

In addition, the present invention for achieving the above object is a step of forming a first gate electrode having a first impurity doping concentration on a semiconductor substrate; Forming a second gate electrode having a second impurity doping concentration less than the first impurity doping concentration on both sidewalls of the second gate electrode; Forming a gate insulating film on the first gate electrode and the second gate electrode; And a channel facing the first gate electrode and the second gate electrode formed on one side wall of the first gate electrode with the gate insulating layer interposed therebetween, and both ends of the channel, the gate insulating layer and the surface of the semiconductor substrate respectively. It provides a thin film transistor manufacturing method comprising the step of forming a source and a drain.

Hereinafter, the present invention will be described in detail with reference to FIGS. 1 and 2.

1 is a cross-sectional view of a thin film transistor according to the present invention. The thin film transistor according to the present invention is formed in the form of a spacer (spacer) on both side walls of the first gate electrode 2, the gate electrode 2 formed on the semiconductor substrate 1, as shown in FIG. The second gate electrode 3 having a higher resistivity than the gate electrode 2, the gate insulating film 4 formed on the first and second gate electrodes 2 and 3, and the gate insulating film 4 interposed therebetween. A channel 5 facing the first and second gate electrodes 2 and 3, and a source and a drain 6 extending from both ends of the channel 5 to the surface of the semiconductor substrate 1. The first and second gate electrodes 2 and 3 are formed of a polysilicon film, and the dopant concentration of the doped impurities in the polysilicon film forming the first gate electrode 2 forms the second gate electrode 3. The doped impurities in the polysilicon film are higher than the concentration.

By forming a second gate electrode 3 having a larger resistivity than the first gate electrode 2 on the sidewalls of the first gate electrode 2 having a relatively low resistivity, the leakage current is reduced as the electric field decreases in the off state. In the on state, since the first and second gate electrodes 2 and 3 perform the same operation, the on / off current ratio can be improved without reducing the on current.

2a to 2e are cross-sectional views showing the manufacturing process of the above-described thin film transistor according to an embodiment of the present invention.

First, as shown in FIG. 2A, a polysilicon film doped with a high concentration of n-type impurities is formed on the silicon substrate 21, and the polysilicon film is selectively etched to form a first gate electrode 22.

Subsequently, as shown in FIG. 2B, a polysilicon film 23 'is deposited on the silicon substrate 21 and the first gate electrode 22, and a low concentration of n-type impurities is formed in the polysilicon film 23'. Ion implantation with.

Next, as shown in FIG. 2C, the polysilicon layer 23 ′ is etched to form a second gate electrode 23 having a spacer shape on both sidewalls of the first gate electrode 22.

Next, as shown in FIG. 2D, a gate insulating film 24 is formed on the silicon substrate 21, the first gate electrode 22, and the second gate electrode 23, and the gate insulating film ( The polysilicon film 25 is formed on 24.

Next, as shown in FIG. 2E, ions are selectively implanted into the polysilicon film 25, and the polysilicon film 25 is selectively etched to interpose the gate insulating film 24 therebetween. A channel 25 'facing the first and second gate electrodes 23 and 24 and a source and a drain 26 extending from both ends of the channel 25' to the surface of the silicon substrate 21 are formed.

In the case of the thin film transistor according to the present invention as described above, only the first gate electrode having a relatively low resistivity is operated when the thin film transistor is in an off state, and thus the edge of the second gate electrode 24 having a higher resistivity than the first gate electrode 23 is operated. Since the electric field is reduced, the leakage current can be reduced. In addition, since the second gate is operated as the gate electrode in the on state, the on-current can be prevented from decreasing with increasing resistivity as in the conventional thin film transistor having an offset structure.

Accordingly, by improving the on / off current ratio of the thin film transistor, it is easy to develop an integrated circuit requiring stable cell security and low power consumption.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.

Claims (4)

A thin film transistor, comprising: a first gate electrode formed on a semiconductor substrate; A second gate electrode contacting both sidewalls of the gate electrode and having a higher resistivity than the gate electrode; A gate insulating film formed on the first gate electrode and the second gate electrode; A channel facing the first and second gate electrodes with the gate insulating layer interposed therebetween; And a source and a drain in contact with both ends of the channel, the gate insulating layer, and a surface of the semiconductor substrate, respectively. The thin film transistor of claim 1, wherein the channel faces the first gate electrode and the second gate electrode in contact with one side wall of the first gate electrode. The thin film transistor of claim 1 or 2, wherein the second gate electrode is formed in the form of a spacer in contact with the sidewall of the first gate electrode. A thin film transistor manufacturing method, comprising: forming a first gate electrode having a first impurity doping concentration on a semiconductor substrate; Forming a second gate electrode having a second impurity doping concentration less than the first impurity doping concentration on both sidewalls of the second gate electrode; Forming a gate insulating film on the first gate electrode and the second gate electrode; And a channel facing the first gate electrode and the second gate electrode formed on one side wall of the first gate electrode with the gate insulating layer interposed therebetween, and both ends of the channel, the gate insulating layer and the surface of the semiconductor substrate respectively. A thin film transistor manufacturing method comprising the step of forming a source and a drain.