[go: up one dir, main page]

KR0146173B1 - Method for manufacturing oxide film of semiconductor device - Google Patents

Method for manufacturing oxide film of semiconductor device

Info

Publication number
KR0146173B1
KR0146173B1 KR1019950008135A KR19950008135A KR0146173B1 KR 0146173 B1 KR0146173 B1 KR 0146173B1 KR 1019950008135 A KR1019950008135 A KR 1019950008135A KR 19950008135 A KR19950008135 A KR 19950008135A KR 0146173 B1 KR0146173 B1 KR 0146173B1
Authority
KR
South Korea
Prior art keywords
oxide film
oxidation
semiconductor device
tube
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019950008135A
Other languages
Korean (ko)
Other versions
KR960039193A (en
Inventor
엄금용
정이선
Original Assignee
김주용
현대전자산업주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업주식회사 filed Critical 김주용
Priority to KR1019950008135A priority Critical patent/KR0146173B1/en
Publication of KR960039193A publication Critical patent/KR960039193A/en
Application granted granted Critical
Publication of KR0146173B1 publication Critical patent/KR0146173B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

본 발명은 반도체소자의 산화막 제조방법에 관한것으로서, 반조체 웨이퍼를 보트에 탑재하고 보트를 산화 튜브내에 정착하여 예정된 온도에서 열산화를 실시하는 열산화 공정에서 열산화 공정의 전후에 각각 산소/DCE 및 산소/DCE/질소 혼합 가스를 흘려주는 정화 및 표면처리 공정을 진행하여 산화 튜브내의 알카리 이온 및 금속성 불순물을 제거하고, 산화막의 표면 손상을 보상하였으므로, 산화막의 절연 특성이 향상되고, 트랩사이트가 감소되어 소자동작의 신뢰성 및 공정수율을 향상시킬 수 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an oxide film of a semiconductor device, wherein a semi-structured wafer is mounted on a boat, the boat is fixed in an oxidation tube, and thermal oxidation at a predetermined temperature is performed before and after the thermal oxidation process, respectively. And oxygen / DCE / nitrogen mixed gas and purification and surface treatment processes to remove alkali ions and metallic impurities in the oxide tube and to compensate for surface damage of the oxide film, thereby improving the insulating property of the oxide film and It can be reduced to improve the reliability and process yield of device operation.

Description

반도체소자의 산화막 제조방법Method of manufacturing oxide film of semiconductor device

제1도는 종래 기술에 따른 반도체소자의 산화막 제조방법을 설명하기 위한 공정 흐름도.1 is a process flowchart for explaining an oxide film manufacturing method of a semiconductor device according to the prior art.

제2도는 본 발명에 따른 반도체소자의 산화막 제조방법을 설명하기 위한 공정 흐름도.2 is a process flowchart for explaining an oxide film manufacturing method of a semiconductor device according to the present invention.

본 발명은 반도체소자의 산화막 제조방법에 관한 것으로서, 특히 열산화 공정시 산화 공정의 전후에 각각 장치 내부의 정화 공정과 표면처리 공정을 진행하여 불순물에 의한 반도체소자의 오염을 방지하고 산화막 계면의 결함에 의한 트랩사이트를 제거하여 소자동작의 신뢰성 및 공정 수율을 향상시킬 수 있는 반도체소자의 산화막 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an oxide film of a semiconductor device. In particular, during the thermal oxidation process, a purification process and a surface treatment process inside the device are performed before and after the oxidation process to prevent contamination of the semiconductor device due to impurities, and defects at the oxide film interface The present invention relates to a method of manufacturing an oxide film of a semiconductor device capable of removing the trap site by the semiconductor device, thereby improving the reliability and process yield of the device operation.

반도체 소자의 절연 물질로서 다양하게 사용되는 산화막은 가스를 공급원으로하는 화학기상증착(chemical vapor deposition; 이하 CVD라 칭함) 방법과 실리콘을 열산화시키는 열산화 방법으로 형성되며, 상기 열산화 공정은 다시 700∼900℃ 정도에서 산화시키는 저온 산화 공정과, 900∼1200℃ 정도의 온도에서 산화시키는 고온 열산화로 나누어 진다.Oxide films, which are variously used as insulating materials for semiconductor devices, are formed by chemical vapor deposition (hereinafter referred to as CVD) method using gas as a source and thermal oxidation method of thermal oxidation of silicon. It is divided into the low temperature oxidation process which oxidizes at about 700-900 degreeC, and the high temperature thermal oxidation which oxidizes at the temperature of about 900-1200 degreeC.

제1도는 종래 기술에 따른 반도체소자의 제조 공정을 설명하기 위한 공정 흐름도로서, 희생산화막 형성의 예이다.1 is a flowchart illustrating a manufacturing process of a semiconductor device according to the prior art, which is an example of forming a sacrificial oxide film.

먼저, 반도체 웨이퍼들을 보트(boat)에 장착한 후, 산화 튜브에 적재하고, 예정된 온도, 예를들어 800℃ 정도의 온도에서 약 10분간 안정화 시킨다.First, the semiconductor wafers are mounted in a boat, then loaded into an oxide tube, and stabilized for about 10 minutes at a predetermined temperature, for example, at about 800 ° C.

그다음 열산화 온도, 예를들어 800∼1200℃정도의 온도까지 약 30분에 걸쳐 상승시켜 약 10분간을 안정상태로 유지한 후, 5분간의 예비산화와 예정된 시간 만큼의 주산화 및 약 6분간에 걸친 후 산화의 세단계를 연속적으로 실시하여 예정된 두께의 열산화막을 형성한다.The temperature is then raised to a thermal oxidation temperature, for example 800-1200 ° C., over a period of about 30 minutes to maintain a stable state for about 10 minutes, followed by preliminary oxidation for 5 minutes, main oxidation for a predetermined time, and about 6 minutes. After three times, the three steps of oxidation are successively performed to form a thermal oxide film having a predetermined thickness.

그후, 약 35분에 걸쳐 800℃까지 온도를 낮추고, 웨이퍼들이 탑재되어 있는 보트와 산화 튜브를 노에서 꺼낸 후, 약 40분간 냉각시켜 열산화 공정을 완료한다.The temperature is then lowered to 800 ° C. over about 35 minutes, the boat and the oxide tube on which the wafers are mounted are removed from the furnace and cooled for about 40 minutes to complete the thermal oxidation process.

상기와 같은 종래 기술에 따른 반도체소자의 산화막 제조방법은 산화 튜브나 보트 등이 공기중에 노출된 상태에서 안정화 및 열산화 공정이 진행 되므로, 산화 튜브나 보트 및 웨이퍼에 흡착되어 있는 알카리 이온과 금속성 불순물등에 의해 산화막이 오염되어 산화막의 계면에서 결함인 트랩사이트로 작용하거나, 절연성이 떨어져 소자동작의 신뢰성 및 공정수율을 떨어뜨리는 문제점이 있다.In the method of manufacturing an oxide film of a semiconductor device according to the prior art as described above, since the stabilization and thermal oxidation processes are performed while an oxide tube or a boat is exposed to air, alkali ions and metallic impurities adsorbed on the oxide tube, the boat and the wafer are performed. Etc., the oxide film is contaminated to act as a trap site which is a defect at the interface of the oxide film, or the insulation property is degraded, thereby degrading reliability and process yield of device operation.

또한 비교적 높은 온도에서 바로 공기중에 노출되므로 튜브나 보트 등의 또다른 오염원이되어 소자동작의 신뢰성 및 공정수율을 더욱 떨어뜨리는 문제점이 있다.In addition, since it is directly exposed to the air at a relatively high temperature, it becomes another pollution source such as a tube or a boat, and thus there is a problem of lowering the reliability and process yield of device operation.

본 발명은 상기와 같은 문제점을 해결하기 위한 것으로서, 본 발명의 목적은 열산화의 전에 산화 장비의 내측을 정화시키고, 열산화 후에 표면처리 공정을 거쳐 산화 튜브나 웨이퍼 보트등이 알카리 이온 또는 금속성 불순물에 오염되는 것을 방지하여 산화막의 절연성을 형상시키고, 계면에서의 트랩사이트 생성을 방지하여 소자동작의 신뢰성 및 공정수율을 향상시킬 수 있는 반도체소자의 산화막 제조방법을 제공함에 있다.The present invention is to solve the above problems, an object of the present invention is to purify the inside of the oxidation equipment before thermal oxidation, and after thermal oxidation through the surface treatment process, such as alkali tube or wafer boat alkali ions or metallic impurities The present invention provides a method for manufacturing an oxide film of a semiconductor device that can prevent contamination by forming an insulating layer of an oxide film and prevent trap site generation at an interface, thereby improving reliability and process yield of device operation.

상기와 같은 목적을 달성하기 위한 본 발명에 따른 반도체소자의 산화막 제조방법의 특징은, 열산화에 의한 반도체소자의 산화막 제조방법에 있어서, 웨이퍼를 탑재한 보트를 산화 튜브에 탑재하고 상기 산화 튜브의 내측에 산소/DCE 혼합 가스를 흘려주어 내부를 정화시키는 공정과, 상기 반도체 웨이퍼 상에 열산화막을 형성하는 공정과, 상기 산화 튜브에 산소/DCE/질소 혼합가스를 흘려주어 열산화막의 손상을 보상하고 튜브 내부의 불순물을 제거하는 공정을 구비함에 있다.A feature of the method for producing an oxide film of a semiconductor device according to the present invention for achieving the above object is, in the method for producing an oxide film of a semiconductor device by thermal oxidation, a boat mounted with a wafer is mounted on an oxide tube and the Cleaning the inside by flowing an oxygen / DCE mixed gas inside, forming a thermal oxide film on the semiconductor wafer, and flowing an oxygen / DCE / nitrogen mixed gas through the oxide tube to compensate for the damage of the thermal oxide film And removing impurities in the tube.

이하, 본 발명에 따른 반도체소자의 산화막 제조방법에 관하여 첨부도면을 참조하여 상세히 설명한다.Hereinafter, an oxide film manufacturing method of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

제2도는 본 발명에 따른 반도체소자의 산화막 제조방법을 설명하기 위한 공정 흐름도로서, 고온 산화의 예이다.2 is a flowchart illustrating a method of manufacturing an oxide film of a semiconductor device according to the present invention, which is an example of high temperature oxidation.

먼저, 다수개의 반도체 웨이퍼들을 상온의 보트(boat)에 장착한 후, 상기 보트를 800℃ 정도 온도의 노에 장입되어 있는 산하 튜브에 적재한 후, 산소 및 디.씨.이(dichloroethylene; 이하 DCE라 칭함) 혼합가스를 각각 8:0.3 SLPM 정도 비율로 산화 튜브에 흘려주는 정화(cleaning)공정을 약 1∼10분 정도 실시한다.First, a plurality of semiconductor wafers are mounted in a boat at room temperature, and then the boats are loaded in an affiliated tube loaded in a furnace at a temperature of about 800 ° C., followed by oxygen and dichloroethylene (hereinafter referred to as DCE). A cleansing process is performed for about 1 to 10 minutes in which the mixed gas is flowed into the oxidation tube at a ratio of about 8: 0.3 SLPM, respectively.

이때 2O2+C2H2Cl2+2HCl+2CO2 2O 2 + C 2 H 2 Cl 2 + 2HCl + 2CO 2

로 반응한 후, 발생된 염소기가 산화 튜브의 내측이나 보트 및 반도체웨이퍼 상에 흡착되어 있는 알카리 이온들이나 금속성 불순물과 반응하여 제거하고, 산화 튜브 내측에 전 공정에서 형성된 산화막을 제거한다.After the reaction, the generated chlorine groups are removed by reaction with alkali ions or metallic impurities adsorbed on the inside of the oxidation tube, the boat and the semiconductor wafer, and the oxide film formed in the previous step inside the oxidation tube is removed.

그다음 예정된 온도, 예를들어 800℃ 정도의 온도에서 약 10분간 안정화시키고, 예정된 열산화 온도, 예를들어 800∼1200℃ 정도까지 약 30분에 걸쳐 온도를 상승시킨 후, 약 10분간을 안정상태로 유지한다.Then stabilize for about 10 minutes at a predetermined temperature, for example about 800 ° C., raise the temperature over a period of about 30 minutes to a predetermined thermal oxidation temperature, for example about 800 to 1200 ° C., and then stabilize for about 10 minutes. To keep.

그후, 5∼10분간의 예비산화와 예정된 시간 만큼의 주산화 및 약 5∼10분간에 걸친 후산화의 세단계를 연속적으로 실시하여 예정된 두께의 열산화막을 형성하고 약 35분에 걸쳐 초기 온도 약 800℃까지 온도를 낮춘다.Thereafter, three steps of pre-oxidation for 5 to 10 minutes, main oxidation for a predetermined time, and post-oxidation for about 5 to 10 minutes are successively performed to form a thermal oxide film having a predetermined thickness and an initial temperature of about 35 minutes. Lower the temperature to 800 ° C.

그다음 상기 산화 튜브의 내부로 산소/DCE/질소 혼합가스를 8:25:0.3∼0.4 SLPM 정도의 비율로 흘려주는 표면처리(Passivation)공정을 진행하면, 초기의 정화 공정에서 생성된 염소기가 산화 튜브 내부의 알카리 이온과 금속성 불순물을 제거한 것 처럼 후속 산화 공정에서의 불순물을 제거하며, 상기 질소 가스에 의해 정화 작업이 더욱 가속되며, 상기 열산화막의 표면 손상을 보상하여 준다.Then, the oxygenation / DCE / nitrogen mixed gas flows into the oxidation tube at a ratio of about 8: 25: 0.3 to 0.4 SLPM, and the chlorine group generated in the initial purification process is subjected to the oxidation tube. Impurities in subsequent oxidation processes are removed, such as alkali ions and metallic impurities therein, and the purge operation is further accelerated by the nitrogen gas, thereby compensating for surface damage of the thermal oxide film.

그후, 약 35분에 걸쳐 800℃까지 온도를 낮추고, 계속적으로 온도를 낮추며 웨이퍼들이 탑재되어 있는 보트를 산화 튜브에서 꺼낸 후, 약 40분간 냉각시켜 고온 열산화 공정을 완료한다.Thereafter, the temperature was lowered to 800 ° C. over 35 minutes, the temperature was continuously lowered, the boat on which the wafers were mounted was removed from the oxidation tube, and cooled for about 40 minutes to complete the high temperature thermal oxidation process.

상기에서는 고온 열산화를 예로들었으나, 700∼800℃ 정도에서 열산화시키고, 800∼900℃ 정도의 온도에서 열처리하는 저온 산화 공정에서도 동일한 효과를 얻을 수 있다.In the above, high temperature thermal oxidation is exemplified, but the same effect can be obtained in a low temperature oxidation process in which thermal oxidation is performed at about 700 to 800 ° C. and heat treated at a temperature of about 800 to 900 ° C.

이상에서 설명한 바와 같이, 본 발명에 따른 반도체소자의 산화막 제조방법은 열산화 공정의 전후에 각각 산소/DCE 및 산소/DCE/질소 혼합 가스를 흘려주는 정화 및 표면처리 공정을 진행하여 산화 튜브내의 알카리 이온 및 금속성 불순물을 제거하고, 산화막의 표면 손상을 보상하였으므로, 산화막의 절연 특성이 향상되고, 트랩사이트가 감소되어 소자동작의 신뢰성 및 공정수율을 향상시킬 수 있는 이점이 있다.As described above, in the method of manufacturing an oxide film of a semiconductor device according to the present invention, the alkali in the oxide tube is subjected to a purification and surface treatment process of flowing oxygen / DCE and oxygen / DCE / nitrogen mixed gas before and after the thermal oxidation process, respectively. Since ions and metallic impurities are removed and surface damage of the oxide film is compensated for, the insulating property of the oxide film is improved and the trap site is reduced, thereby improving the reliability and process yield of device operation.

Claims (8)

열산화에 의한 반도체소자의 산화막 제조방법에 있어서, 웨이퍼를 탑재한 보트를 산화 튜브에 탑재하고 상기 산화 튜브의 내측에 산소/DCE 혼합 가스를 흘려주어 내부를 정화시키는 공정과, 상기 반도체 웨이퍼 상에 열산화막을 형성하는 공정과, 상기 산화 튜브에 산소/DCE/질소 혼합가스를 흘려주어 열산화막의 손상을 보상하고 튜브 내부의 불순물을 제거하는 표면처리 공정을 구비하는 반도체소자의 산화막 제조방법.A method for producing an oxide film of a semiconductor device by thermal oxidation, comprising the steps of: mounting a boat on which a wafer is mounted on an oxide tube and purging the inside by flowing an oxygen / DCE mixed gas inside the oxide tube; And forming a thermal oxide film and a surface treatment step of flowing an oxygen / DCE / nitrogen mixed gas into the oxide tube to compensate for the damage of the thermal oxide film and to remove impurities in the tube. 제1항에 있어서, 상기 열산화 공정이 튜브의 초기 온도 보다 높은 고온 공정이거나, 낮은 저온 공정인 것을 특징으로하는 반도체소자의 산화막 제조방법.The method of claim 1, wherein the thermal oxidation process is a high temperature process higher than the initial temperature of the tube or a low temperature process. 제1항에 있어서, 상기 정화 공정시 산소/DCE 혼합가스를 각각 8:0.3 SLPM으로 1∼10분을 흘려주는 것을 특징으로하는 반도체소자의 산화막 제조방법.The method of manufacturing an oxide film of a semiconductor device according to claim 1, wherein the oxygen / DCE mixed gas is flowed at 8: 0.3 SLPM for 1 to 10 minutes in the purification process. 제1항에 있어서, 상기 열산화를 위한 온도 상승 공정전에 안정 상태를 유지시키는 공정을 추가로 실시하는 것을 특징으로하는 반도체소자의 산화막 제조방법.The method of manufacturing an oxide film of a semiconductor device according to claim 1, further comprising a step of maintaining a stable state before the temperature raising step for thermal oxidation. 제1항에 있어서, 상기 열산화 공정을 예비산화와, 주산화 및 후산화의 세단계를 연속적으로 실시하는 것을 특징으로하는 반도체소자의 산화막 제조방법.The method of manufacturing an oxide film of a semiconductor device according to claim 1, wherein the thermal oxidation process is performed three steps of pre-oxidation, main oxidation and post-oxidation in succession. 제5항에 있어서, 상기 예비산화 및 후산화를 각각 5~10분 씩 실시하는 것을 특징으로하는 반도체소자의 산화막 제조방법.The method of manufacturing an oxide film of a semiconductor device according to claim 5, wherein the preliminary oxidation and the post-oxidation are performed for 5 to 10 minutes, respectively. 제1항에 있어서, 상기 열처리 온도를 저온 산화시에는 700~800℃에서 열산화를 실시하고, 고온 산화에서는 900~1200℃에서 실시하는 것을 특징으로하는 반도체소자의 산화막 제조방법.The method of claim 1, wherein the heat treatment temperature is thermally oxidized at 700 to 800 ° C. during low temperature oxidation, and 900 to 1200 ° C. for high temperature oxidation. 제1항에 있어서, 상기 표면처리 공정시 산소/DCE/질소 혼합가스를 8:25:0.3~0.4 SLPM로 흘려주는 것을 특징으로하는 반도체소자의 산화막 제조방법.2. The method of claim 1, wherein an oxygen / DCE / nitrogen mixed gas is flown at 8: 25: 0.3 to 0.4 SLPM during the surface treatment process.
KR1019950008135A 1995-04-07 1995-04-07 Method for manufacturing oxide film of semiconductor device Expired - Lifetime KR0146173B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950008135A KR0146173B1 (en) 1995-04-07 1995-04-07 Method for manufacturing oxide film of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950008135A KR0146173B1 (en) 1995-04-07 1995-04-07 Method for manufacturing oxide film of semiconductor device

Publications (2)

Publication Number Publication Date
KR960039193A KR960039193A (en) 1996-11-21
KR0146173B1 true KR0146173B1 (en) 1998-11-02

Family

ID=19411755

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950008135A Expired - Lifetime KR0146173B1 (en) 1995-04-07 1995-04-07 Method for manufacturing oxide film of semiconductor device

Country Status (1)

Country Link
KR (1) KR0146173B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399907B1 (en) * 1996-12-28 2003-12-24 주식회사 하이닉스반도체 Method for forming oxide layer of semiconductor device
KR100687410B1 (en) * 2005-12-28 2007-02-26 동부일렉트로닉스 주식회사 Gate oxide film formation method of a semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100399907B1 (en) * 1996-12-28 2003-12-24 주식회사 하이닉스반도체 Method for forming oxide layer of semiconductor device
KR100687410B1 (en) * 2005-12-28 2007-02-26 동부일렉트로닉스 주식회사 Gate oxide film formation method of a semiconductor device

Also Published As

Publication number Publication date
KR960039193A (en) 1996-11-21

Similar Documents

Publication Publication Date Title
USRE38674E1 (en) Process for forming a thin oxide layer
KR100442167B1 (en) Method of removing native oxide film
US20030153186A1 (en) Apparatus and method using a remote RF energized plasma for processing semiconductor wafers
US20010053585A1 (en) Cleaning process for substrate surface
US5759426A (en) Heat treatment jig for semiconductor wafers and a method for treating a surface of the same
KR0146173B1 (en) Method for manufacturing oxide film of semiconductor device
JP3484480B2 (en) Method for manufacturing semiconductor device
JP2907095B2 (en) Method for manufacturing semiconductor device
JP2000058532A (en) Method and device for processing semiconductor and cleaning method for the device
JPH06244174A (en) Formation of insulating oxide film
JPH0536653A (en) Substrate surface treatment method
JPS6286731A (en) Laser beam irradiation si surface treating device
JPH06349839A (en) Heat treatment method of semiconductor substrate
KR100274351B1 (en) Method of gate oxide film in a semiconductor device
CN112185863B (en) Furnace tube cleaning method and cleaning equipment
JPH04290219A (en) Method of forming polycrystalline silicon film
JPH0684865A (en) Dry cleaning of semiconductor device
JPH0927488A (en) Heat treating device
JP2002093800A (en) Method of manufacturing silicon carbide semiconductor device
JPH05152309A (en) Heat treatment method for semiconductor substrate
WO2024009705A1 (en) Method for manufacturing epitaxial wafer
JPH04254328A (en) Manufacture of semiconductor device
JPH01293665A (en) Formation of gate oxide film in mos type transistor
JPH0955379A (en) Treatment method of semiconductor substrate and manufacture of semiconductor device
JPS62229845A (en) Vapor growth method

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19950407

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19950407

Comment text: Request for Examination of Application

PG1501 Laying open of application
E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 19980428

GRNT Written decision to grant
PR0701 Registration of establishment

Comment text: Registration of Establishment

Patent event date: 19980508

Patent event code: PR07011E01D

PR1002 Payment of registration fee

Payment date: 19980508

End annual number: 3

Start annual number: 1

PG1601 Publication of registration
PR1001 Payment of annual fee

Payment date: 20010417

Start annual number: 4

End annual number: 4

PR1001 Payment of annual fee

Payment date: 20020417

Start annual number: 5

End annual number: 5

PR1001 Payment of annual fee

Payment date: 20030417

Start annual number: 6

End annual number: 6

PR1001 Payment of annual fee

Payment date: 20040326

Start annual number: 7

End annual number: 7

PR1001 Payment of annual fee

Payment date: 20050422

Start annual number: 8

End annual number: 8

PR1001 Payment of annual fee

Payment date: 20060502

Start annual number: 9

End annual number: 9

PR1001 Payment of annual fee

Payment date: 20070419

Start annual number: 10

End annual number: 10

PR1001 Payment of annual fee

Payment date: 20080418

Start annual number: 11

End annual number: 11

PR1001 Payment of annual fee

Payment date: 20090421

Start annual number: 12

End annual number: 12

PR1001 Payment of annual fee

Payment date: 20100423

Start annual number: 13

End annual number: 13

PR1001 Payment of annual fee

Payment date: 20110421

Start annual number: 14

End annual number: 14

PR1001 Payment of annual fee

Payment date: 20120423

Start annual number: 15

End annual number: 15

FPAY Annual fee payment

Payment date: 20130422

Year of fee payment: 16

PR1001 Payment of annual fee

Payment date: 20130422

Start annual number: 16

End annual number: 16

FPAY Annual fee payment

Payment date: 20140421

Year of fee payment: 17

PR1001 Payment of annual fee

Payment date: 20140421

Start annual number: 17

End annual number: 17

EXPY Expiration of term
PC1801 Expiration of term

Termination date: 20151007

Termination category: Expiration of duration