KR0139348B1 - Liquid Crystal Display Panel Manufacturing Method - Google Patents
Liquid Crystal Display Panel Manufacturing MethodInfo
- Publication number
- KR0139348B1 KR0139348B1 KR1019940002119A KR19940002119A KR0139348B1 KR 0139348 B1 KR0139348 B1 KR 0139348B1 KR 1019940002119 A KR1019940002119 A KR 1019940002119A KR 19940002119 A KR19940002119 A KR 19940002119A KR 0139348 B1 KR0139348 B1 KR 0139348B1
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- South Korea
- Prior art keywords
- mask
- liquid crystal
- patterning
- crystal display
- gate
- Prior art date
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- 239000004973 liquid crystal related substance Substances 0.000 title claims abstract description 27
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 238000000151 deposition Methods 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 16
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 15
- 238000000059 patterning Methods 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims abstract description 14
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 12
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052804 chromium Inorganic materials 0.000 claims abstract description 8
- 239000011651 chromium Substances 0.000 claims abstract description 8
- 230000001681 protective effect Effects 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 238000007743 anodising Methods 0.000 claims abstract description 7
- 239000011159 matrix material Substances 0.000 claims abstract description 6
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 150000002739 metals Chemical class 0.000 claims description 4
- 239000010408 film Substances 0.000 abstract description 13
- 239000010409 thin film Substances 0.000 abstract description 6
- 230000008021 deposition Effects 0.000 abstract description 3
- 241000251468 Actinopterygii Species 0.000 abstract 1
- 238000002048 anodisation reaction Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 239000012535 impurity Substances 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- 239000004988 Nematic liquid crystal Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
Abstract
본 발명은 액정표시판넬의 전극 패드 및 박막트랜지스터 형성방법에 관한 것으로, 매트릭스 어레이로 배치되는 스위칭소자와 이에 연결된 화소전극 및 게이트, 데이타 전극 패드를 갖는 액정표시판넬 제작방법에 있어서, 기판위에 알루미늄을 증착한 후 제1마스크를 이용하여 게이트전극 및 게이트라인 패턴을 형성하고 제2마스크를 이용하여 양극산화 패턴닝 후 양극산화하는 단계와; 절연층, 실리콘층을 증착한 후 제3마스크를 이용하여 패터닝하여 스위칭부에 대한 실리콘층을 형성하는 단계와; 상기 패턴이 형성된 기판 전면에 ITO막을 증착한 후 제4마스크를 이용하여 화소전극 및 용장형 데이타라인을 형성하는 단계와; 게이트라인의 단부가 드러나도록 제5마스크를 이용하여 패터닝하여 게이트전극 패드부의 접촉개구부를 형성하는 단계와; 소오스/드레인용 크롬/알루미늄 금속을 증착한 후 제6마스크를 이용하여 패터닝하여 크롬/알루미늄 금속으로 이루어진 게이트전극 패드와 데이타전극 패드 및 소오스/드레인 전극 라인을 동시에 형성하는 단계; 및 상기 패턴 상에 보호막을 증착후 제7마스크를 이용하여 패터닝한 후 패드부 상의 알루미늄을 제거하는 단계를 거쳐 액정표시판넬 제조를 완료하므로써, 마스크수 절감으로 인한 공정 단순화를 기할 수 있게 되어 코스트 절감 및 생선성 증대를 꾀할 수 있을 뿐 아니라 크롬으로 패드를 형성하게 되므로 신뢰성이 높아져 고신뢰성의 액정표시판넬을 실현할 수 있게 된다.The present invention relates to a method for forming an electrode pad and a thin film transistor of a liquid crystal display panel. The present invention relates to a method for manufacturing a liquid crystal display panel having a switching element arranged in a matrix array, a pixel electrode, a gate and a data electrode pad connected thereto. Forming a gate electrode and a gate line pattern by using a first mask after deposition, and anodizing after anodizing by using a second mask; Depositing an insulating layer and a silicon layer and patterning the third layer using a third mask to form a silicon layer for the switching unit; Depositing an ITO film on the entire surface of the substrate on which the pattern is formed and forming a pixel electrode and a redundant data line using a fourth mask; Forming a contact opening of the gate electrode pad portion by patterning the gate line to expose an end portion of the gate line; Depositing a chromium / aluminum metal for source / drain and patterning the same using a sixth mask to simultaneously form a gate electrode pad, a data electrode pad, and a source / drain electrode line made of chromium / aluminum metal; After the deposition of the protective film on the pattern using a seventh mask and patterning and removing the aluminum on the pad to complete the liquid crystal display panel manufacturing, it is possible to simplify the process by reducing the number of masks to reduce the cost In addition to increasing fish properties, pads are formed of chromium, thereby increasing reliability and realizing a highly reliable liquid crystal display panel.
Description
제1도는 종래 기술에 따른 액정표시판넬의 구조를 도시한 단면도,1 is a cross-sectional view showing the structure of a liquid crystal display panel according to the prior art;
제2(a)도 및 제2(b)도는 종래 기술에 따른 액정표시판넬의 전극패드부를 도시한 것으로,2 (a) and 2 (b) show the electrode pad portion of the liquid crystal display panel according to the prior art.
제2(a)도는 전극패드부의 단면도,2 (a) is a cross-sectional view of the electrode pad portion,
제2(b)도는 제2(a)도의 평면도,2 (b) is a plan view of FIG. 2 (a),
제3(a)도 및 제3(b)도 내지 제8(a)도 및 제8(b)도는 본 발명에 의한 액정표시판넬의 전극패드부 제조공정을 도시한 공정도로,3 (a) and 3 (b) to 8 (a) and 8 (b) is a process diagram showing the manufacturing process of the electrode pad portion of the liquid crystal display panel according to the present invention,
제3(a)도 내지 제8(a)도는 액정표시판넬의 평면도를,3 (a) to 8 (a) show a plan view of the liquid crystal display panel,
제3(b)도 내지 제8(b)도는 액정표시판넬의 단면도를 나타낸다.3 (b) to 8 (b) show cross-sectional views of the liquid crystal display panel.
본 발명은 액정표시판넬에 관한 것으로, 보다 상세하게는 TFT-LCD(thin film transistor-liquid crystal display)의 전극 패드 및 박막트랜지스터 형성 방법에 관한 것이다.The present invention relates to a liquid crystal display panel, and more particularly, to an electrode pad and a thin film transistor forming method of a thin film transistor-liquid crystal display (TFT-LCD).
화상정보시대에 있어서, 정보전달의 최대 담당자인 표시장치에 많은 기대가 모아지고 있으며 이로인해 지금까지의 음극선관을 대신한 각종 평면 표시장치가 개발되어 급속히 보급되기 시작하고 있다.In the image information age, much expectation is gathered in the display device which is the largest person in charge of information transmission. As a result, various flat display devices replacing the cathode ray tube have been developed and are rapidly spreading.
그중에서도 액정 디스플레이는 극도로 경량으로 박형, 저가 저소비 전력구동으로 집적회로와의 정합성이 좋은 등의 특징으로 가져 랩 톱 컴퓨터나 포켓 컴퓨터의 차량적재용, 칼라 TV 화상용으로서 그 용도를 확대하고 있다.Among them, liquid crystal displays are extremely lightweight, thin, low-cost, low power consumption, and have good matching with integrated circuits. Therefore, the liquid crystal display is expanding its use as a vehicle for a laptop or pocket computer and for color TV images.
이러한 액정표시장치는 유전 이방성을 갖는 물질이 전계상에 놓일 때 배향되는 성질을 이용하여 화상표시를 하게 한 것으로, 투명전극과 배향막이 적층된 상하부 유리기판 주위를 밀봉재로 둘러쌓아 만들어진 액정셀에 콜레스테릭 또는 네마틱 액정을 주입한 구조로 되어 있다.Such a liquid crystal display device displays an image using a property of being oriented when a material having dielectric anisotropy is placed on an electric field. It has a structure in which steric or nematic liquid crystal is injected.
이 때 상기 상부기판은 칼라필터층을 포함하며 하부기판은 투명한 유리기판 위에 스위칭소자와 이에 연결된 화소전극으로 된 액정표시소자들을 포함한다.In this case, the upper substrate includes a color filter layer, and the lower substrate includes liquid crystal display devices including switching elements and pixel electrodes connected thereto on a transparent glass substrate.
스위치소자는 통상 박막트랜지스터로 구성되고 이들은 매트릭스 어레이로 배치되며, 트랜지스터의 드레인 전극은 화소전극에 연결되어 하나의 액정 판넬을 이룬다. 그리고, 스위칭소자들의 게이트라인과 소오스라인들 신호라인으로 종·횡방향으로 나란히 다수 배치된다.The switch element is usually composed of a thin film transistor and they are arranged in a matrix array, and the drain electrode of the transistor is connected to the pixel electrode to form one liquid crystal panel. In addition, a plurality of gate lines and source lines signal lines of the switching elements are arranged side by side in the vertical and horizontal directions.
상기 게이트라인과 소오스라이들은 스우칭소자들을 온·오프 제어하는 구동회로와 연결되어야 하기 때문에 양자를 연결하는 연결수단이 필요하고, 이것은 패드로서 상기 라인 형성시 동시에 형성된다. 이러한 일체의 액정판넬은 다음과 같이 통상 8장의 마스크를 이용하여 스위칭소자와 화소전극 및 패드부를 형성한다.Since the gate line and the source line must be connected to a driving circuit for controlling the switching elements on and off, a connecting means for connecting both is required, which is formed at the same time as the line as a pad. Such an integrated liquid crystal panel uses a mask of eight sheets to form a switching element, a pixel electrode, and a pad portion as follows.
제1도는 언급한 스위칭소자(1)와 이와 연결된 ITO재질의 화소전극(2)의 단면구조를 나타낸 것이고, 제2도는 게이트라인이 확장되어 그 단부에서 패드가 연결된 것으르 나타낸 것으로, 제2(a)도는 전극패드부(3)의 단면도를 제2(b)도는 제2(a)도의 평면도를 나타낸다.FIG. 1 illustrates a cross-sectional structure of the switching element 1 and the ITO pixel electrode 2 connected thereto, and FIG. 2 illustrates that a gate line is extended to connect a pad at an end thereof. FIG. a) shows the cross section of the electrode pad part 3, and FIG. 2 (b) shows the top view of FIG. 2 (a).
상기 도면을 참조하여 그 제조공정을 살펴보면, 먼저 제1마스크를 사용하여 유리기판(4) 위에 알루미늄을 증착한 후 게이트전극(5) 및 게이트라인 패턴(12)을 형성한다.Looking at the manufacturing process with reference to the drawings, first by depositing aluminum on the glass substrate 4 using the first mask to form a gate electrode 5 and a gate line pattern 12.
제2마스크를 사용하여 전극패드의 접속부분(제2도의 a부분)이 오픈되도록 양극산화패턴 후 양극산화층(12)을 형성한다.An anodization layer 12 is formed after the anodization pattern so that the connection portion (part a in FIG. 2) of the electrode pad is opened using the second mask.
제3마스크를 사용하여 제2(a)도 및 제2(b)도와 같이 크롬이나 탄탈륨 등의치밀한 재질의 금속을 도포하여 전극패드(13)를 형성한다.The electrode pad 13 is formed by applying a metal having a dense material such as chromium or tantalum as shown in FIGS. 2 (a) and 2 (b) using a third mask.
패드부를 포함하여 기판 전면에 절연층(6)을 증착하고 제4마스크를 사용하여 실리콘층(7), 오믹층(8)을 형성한 뒤 실리콘층(7), 오믹층(8) 패터닝한다. 이 때 절연층은 패드부를 덮고 있다.The insulating layer 6 is deposited on the entire surface of the substrate including the pad portion, and the silicon layer 7 and the ohmic layer 8 are formed using a fourth mask, and then the silicon layer 7 and the ohmic layer 8 are patterned. At this time, the insulating layer covers the pad part.
그 후, 제5마스크를 사용하여 패드부 위의 절연층을 제거하여 구동회로와 연결하는 접촉영역을 형성한다.Thereafter, the insulating layer on the pad portion is removed using a fifth mask to form a contact region for connecting with the driving circuit.
그다음 제6마스크를 사용하여 화소부(2)를 형성하도록 ITO층을 패터닝하고, 제7마스크를 사용하여 소오스/드레인 전극(9).(10)을 패터닝한다.The ITO layer is then patterned to form the pixel portion 2 using a sixth mask, and the source / drain electrodes 9 and 10 are patterned using the seventh mask.
이어서 기판 전면에 보호막을 증착한 후 제8마스크를 사용하여 구동회로와 연결되는 접촉영역을 오프닝시키기 위하여 패드부의 접촉영역 상에 형성 보호막을 오프닝시킨다.Subsequently, after the protective film is deposited on the entire surface of the substrate, the protective film is opened on the contact area of the pad part to open the contact area connected to the driving circuit using the eighth mask.
액정표시소자를 포함하는 액정판넬 제작에 있어서는 이와 같이 적어도 8개의 마스크를 요구된다.In manufacturing a liquid crystal panel including a liquid crystal display device, at least eight masks are thus required.
이러한 표시장치로서의 LCD는 그 자체가 많은 장점을 지니고 있으나, 상기와 같이(8개의마스크 이용) 공정이 복잡하여 코스트가 높다는 단점을 지니게 되므로, 코스트를 절감시키면서도 생산성을 향상시킬 수 있는 방향으로 연구의 촛점이 맞추어지고있다.The LCD as such a display device has many advantages in itself, but as described above (using eight masks), the process has a disadvantage in that the cost is high, and thus the research is being conducted in the direction of improving productivity while reducing the cost. The focus is on.
이에 본 발명은 상기와 같은 문제점을 해결하기 위한 것으로, 소오스/드레인 금속을 이용하여 패드부를 형성하므로써 공정 단순화를 기할 수 있게 되어 코스트 절감 및 생산성 증대를 꾀할 수 있는 액정 표시 판넬제조방법을 제공함에 그 목적이 있다.Accordingly, the present invention is to solve the above problems, it is possible to simplify the process by forming a pad portion by using a source / drain metal to provide a liquid crystal display panel manufacturing method that can reduce the cost and increase productivity There is a purpose.
상기와 같은 목적을 달성하기 위한 본 발명에 의한 액정표시판넬 제조방법은 매트릭스 어레이로 배치되는 스위칭소자와 이에 연결된 화소전 및 게이트, 데이타 전극 패드를 갖는 액정표시판넬 제작방법에 있어서,In the liquid crystal display panel manufacturing method according to the present invention for achieving the above object is a method for manufacturing a liquid crystal display panel having a switching element disposed in a matrix array, a pixel front and gate, and a data electrode pad connected thereto;
기판위에 알루미늄을 증착한 후 제1마스크를 이용하여 게이트전극 및 게이트라인 패턴을 형성하는 단계,Depositing aluminum on the substrate to form a gate electrode and a gate line pattern using a first mask,
제2마스크를 이용하여 양극산화 패턴닝 후 양극산화하는 단계,Anodizing after anodizing patterning using a second mask,
절연층, 실리콘층을 증착한 후 제3마스크를 이용하여 패터닝하여 스위칭부에 대한 실리콘층을 형성하는 단계;Depositing an insulating layer and a silicon layer and patterning the third layer using a third mask to form a silicon layer for the switching unit;
상기 패턴이 형성된 기판 전면에 ITO막을 증착한 후 제4마스크를 이용하여 화소전극 및 용장형 데이타라인을 형성하는 단계;Depositing an ITO film on the entire surface of the substrate on which the pattern is formed and forming a pixel electrode and a redundant data line using a fourth mask;
게이트라인의 단부가 드러나도록 제5마스크를 이용하여 패터닝하여 게이트전극 패드부의 접촉개구부를 형성하는 단계;Forming a contact opening of the gate electrode pad part by patterning the gate line to expose an end portion of the gate line;
소오스/드레인용 제1 및 제2금속을 증착한 후 제6마스크를 이용하여 패터닝하여 제1 및 제2금속으로 이루어진 게이트전극 패드와 데이타전극 패드 및 소오스/드레인 전극 라인을 동시에 형성하는 단계; 및Depositing the first and second metals for the source / drain and patterning the same using a sixth mask to simultaneously form a gate electrode pad, a data electrode pad, and a source / drain electrode line formed of the first and second metals; And
상기 패턴 상에 보호막 증착후 제7마스크를 이용하여 패터닝한 후 패드부 상의 제2금속을 제거하는 단계로 이루어진다.After the deposition of the protective film on the pattern is patterned using a seventh mask and the second metal on the pad portion is removed.
이하 첨부된 도면을 참조하여 본 발명의 실시예에 대해 상세히 설명한다.Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
제3도 내지 제8도는 본 발명에 따른 액정표시판넬의 박막트랜지스터 및 전극 패드부 제조공정을 도시해 놓은 것이다.3 to 8 illustrate a process of manufacturing a thin film transistor and an electrode pad unit of a liquid crystal display panel according to the present invention.
이미 언급하였듯이 액정판넬은 스위칭소자에 연결된 화소전극의 단위 셀이 매트릭스 어레이로 배치되고, 이 배치로부터 인출된 게이트라인들과 데이터 소오스라인들은 외부 구동회로와 접속하도록 하는 전극패드부들이 설치된 구조를 갖는다.As mentioned above, the liquid crystal panel has a structure in which unit cells of pixel electrodes connected to the switching elements are arranged in a matrix array, and electrode pad portions for connecting the gate lines and the data source lines drawn from the arrangement are connected to an external driving circuit. .
상기 구조로 이루어진 액정표시판넬이 제조방법을 살펴보면, 먼저 제3도에 도시된 바와 같이 기판위에 알루미늄을 증착한 후 제1마스크를 사용하여 게이트전극 및 게이트라인(100)을 형성하도록 패터닝한다. 이 때 제3(a)도는 동일 유리기판 위에 상기 패터닝된 게이트라인(100)이 전극패드 형성부까지 확장되어 있는 판넬의 평면을, 제3(b)도는 그 단면을 보여주고 있다. 그 후 패터닝된 알루미늄층에 대하여 양극산화 패턴닝하여 일부를 양극산화하여 양극산화 절연층(102)을 형성한다. 제3(a)도 및 제3(b)도에는 그 결과로 알루미늄 게이트라인(100) 상에 양극산화층(102)이 형성되었음을 나타내었다. 이 때 양극산화 패턴닝은 포토레지스트로써 형성하며 양극산화시 부분적으로 Al이 양극산화되지 않도록 방지하는 역할을 한다.Referring to the manufacturing method of the liquid crystal display panel having the above structure, first, as shown in FIG. 3, aluminum is deposited on the substrate and then patterned to form the gate electrode and the gate line 100 using a first mask. In this case, FIG. 3 (a) shows the plane of the panel in which the patterned gate line 100 extends to the electrode pad forming portion on the same glass substrate, and FIG. 3 (b) shows its cross section. Anodization patterning is then performed on the patterned aluminum layer to anodize a portion to form an anodization insulating layer 102. 3 (a) and 3 (b) show that the anodization layer 102 is formed on the aluminum gate line 100 as a result. At this time, anodization patterning is formed as a photoresist and prevents Al from anodizing partially during anodization.
다음으로 제4(a)도 및 제4(b)도에 도시된 바와 같이 매트릭스 어레이 배치되는 스위칭소자인 박막트랜지스터를 형성하도록 먼저 플라즈마 CVD 장치에서 절연층(104), 비정질 실리콘으로 이루어진 반도체층(103), 오믹접촉을 위한 고농도 불순물 반도체층을 차례로 형성한다. 절연막(104)은 전면에 도포되어 패드부에도 형성되므로 제4(b)도에는 절연막(104)이 도포됨을 도시하고 잇다. 그러나 오믹층은 제1도에 준하므로 도시 생략하였으며 제1도의 소자형성에 따른다. 여기서 제3마스크를 사용하여 증착형성된 반도체층, 고농도 불순물 반도체층을 스위칭소자 형성부위에만 남겨두고 모두 제거한다. 제4(a)도 및 제4(b)도는 절연층(104)에 반도체층이 전면 증착되어 있었으나 상기 과정에 의해 패터닝된 것을 보여준다.Next, as shown in FIGS. 4 (a) and 4 (b), an insulating layer 104 and a semiconductor layer made of amorphous silicon are first formed in the plasma CVD apparatus to form a thin film transistor, which is a switching element arranged in a matrix array. 103), a high concentration impurity semiconductor layer for ohmic contact is sequentially formed; Since the insulating film 104 is applied to the entire surface and formed in the pad part, the insulating film 104 is coated in FIG. 4 (b). However, the ohmic layer is omitted according to FIG. 1 and follows the device formation of FIG. 1. Here, the semiconductor layer and the high concentration impurity semiconductor layer deposited using the third mask are removed, leaving only the switching element formation portion. 4 (a) and 4 (b) show that the semiconductor layer is entirely deposited on the insulating layer 104, but is patterned by the above process.
그후 상기 패턴이 형성된 판넬 전면에 ITO막을 증착한 후 제4마스크를 이용하여 패터닝하여 제5(a)도 및 제5(b)도에 도시된 바와 같이 화소전극(105)과 ITO로 이루어진 용장형 데이타라인(105')을 형성한다.Thereafter, an ITO film is deposited on the entire surface of the panel on which the pattern is formed, and then patterned using a fourth mask to form a redundant type of pixel electrode 105 and ITO, as shown in FIGS. 5 (a) and 5 (b). Data line 105 'is formed.
계속해서 전극패드부에 대해서 제6(a)도 및 제6(b)도에 도시된 바와 같이 패드형성을 위한 접촉개구부를 형성하는 공정을 진행한다. 상기 접촉개구부(106)는 기판 전면에 포토레지스트층을 코팅하여 형성한 뒤 제5마스크를 사용하여 드러난 막질들을 식각하여 제거한다. 이 때 상기 개구부는 유리기판과 알루미늄 게이트라인(100)의 단부 일부가 드러나도록 식각한다. 여기서 상기 포토레지스트층이 마스크 패턴대로 노광, 현상되어 개구부 형성부분에서 절연층(104)을 노출시킬 때 이 절연층이 질화실리콘인 경우에는 암모니움 플로라이드로 플라즈마 에칭하여 제거한다.Subsequently, as shown in FIGS. 6 (a) and 6 (b), the process of forming contact openings for forming pads is performed. The contact opening 106 is formed by coating a photoresist layer on the entire surface of the substrate, and then removing the film quality exposed by using a fifth mask. At this time, the opening is etched to expose a portion of the end portion of the glass substrate and the aluminum gate line 100. Here, when the photoresist layer is exposed and developed according to a mask pattern to expose the insulating layer 104 in the opening forming portion, when the insulating layer is silicon nitride, it is removed by plasma etching with ammonium fluoride.
상기 단계는 전후 패드부의 접촉개구부 형성과 함께 스위칭소자의 일부가 형성되어 있는 단계이다.The step is a step in which a part of the switching element is formed together with the contact openings of the front and rear pads.
이후 소오스/드레인용 크롬/알루미늄금속층(107-2), (107-1)을 증착한 후 제7(a)도 및 제7(b)도에 도시된 바와 같이 제6마스크를 이용하여 크롬/알루미늄으로 이루어진 게이트전극 패드와 데이타전극 패드(107) 및 소오스/드레인 전극라인을 동시에 형성한다. 즉, 상기 전극패드는 게이트라인부에만 있는 것은 아니고 소오스라인에 연결되는 데이터패드도 형성됨을 알 수 있다.After depositing the chromium / aluminum metal layers 107-2 and 107-1 for the source / drain, the chromium / aluminum layer is formed using the sixth mask as shown in FIGS. 7 (a) and 7 (b). A gate electrode pad, a data electrode pad 107, and a source / drain electrode line made of aluminum are simultaneously formed. That is, the electrode pad is not only in the gate line part but also in the data pad connected to the source line.
그다음 상기 패턴이 형성된 기판 전면에 보호막을 증착하고 제7마스크를 이용하여 패터닝한다. 이 때 상기 보호막은 제8(a)도에 도시된 바와 같이 상기 패드부 상에 형성된 보호막 영역(108)도 함께 제거되도록 패터닝한다. 그 후 상기패드부 상에 형성된 알루미늄(107-1)을 추가 에칭처리하여 본 공정을 완료한다. 그 결과 크롬만으로 이루어진 패드부를 형성할 수 있게 되어 신뢰성이 향상될 수 있게 되며, 또한 소오스/드레인 형성시 패드부도 함께 형성되므로 패드 공장 단순화를 기할 수 있게 된다.Then, a protective film is deposited on the entire surface of the substrate on which the pattern is formed and patterned using a seventh mask. At this time, the protective film is patterned so that the protective film region 108 formed on the pad portion is also removed as shown in FIG. 8 (a). Thereafter, the aluminum 107-1 formed on the pad part is further etched to complete the present process. As a result, it is possible to form a pad portion consisting of only chromium, thereby improving reliability. In addition, the pad portion is also formed at the time of source / drain formation, thereby simplifying the pad factory.
상술한 바와 같이 본 발명에 의하면, 패드부 형성시 패드용 마스크가 별도로 필요없으므로 마스크수를 줄일 수 있게 되어 공정단순화를 이룰 수 있으며, 이로 인하여 제작기간의 단축, 재료절감, 생산성 향상등의 효과를 얻을 수 있게 된다.As described above, according to the present invention, since the pad mask is not required separately when forming the pad part, the number of masks can be reduced, thereby simplifying the process, thereby shortening the manufacturing period, reducing materials, and improving productivity. You can get it.
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