KR0124722Y1 - TBC circuit - Google Patents
TBC circuitInfo
- Publication number
- KR0124722Y1 KR0124722Y1 KR2019920002706U KR920002706U KR0124722Y1 KR 0124722 Y1 KR0124722 Y1 KR 0124722Y1 KR 2019920002706 U KR2019920002706 U KR 2019920002706U KR 920002706 U KR920002706 U KR 920002706U KR 0124722 Y1 KR0124722 Y1 KR 0124722Y1
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- tbc
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- Expired - Lifetime
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- 238000005070 sampling Methods 0.000 claims abstract description 8
- 239000002131 composite material Substances 0.000 claims description 5
- 238000001914 filtration Methods 0.000 claims description 3
- 238000000926 separation method Methods 0.000 abstract description 7
- 230000000903 blocking effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10037—A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10046—Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/77—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase
- H04N9/78—Circuits for processing the brightness signal and the chrominance signal relative to each other, e.g. adjusting the phase of the brightness signal relative to the colour signal, correcting differential gain or differential phase for separating the brightness signal or the chrominance signal from the colour television signal, e.g. using comb filter
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/79—Processing of colour television signals in connection with recording
- H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Television Signal Processing For Recording (AREA)
Abstract
본 고안은 TBC(Time Base Correction)회로에 관한 것으로 종래의 TBC회로에 의하면 휘도/칼라분리회로에서 4.2MHz에 이르는 휘도신호를 충실하게 재현해내는데 있어 차단특성이 예리한 아날로그 앤티얼라이어싱 저역통과필터가 A/D변환기 전단에 구비되어야 하는데 이의 구현이 매우 어렵고 따라서 휘도신호의 기록, 재생에 얼라이어싱이 초래되는 문제점을 해결하기 위한 것이다.The present invention relates to a TBC (Time Base Correction) circuit. According to the conventional TBC circuit, an analog antialiasing low pass filter with sharp cutoff characteristics in faithfully reproducing a luminance signal up to 4.2 MHz in the luminance / color separation circuit is provided. Is to be provided in front of the A / D converter, which is very difficult to implement, and thus is intended to solve the problem of aliasing in the recording and reproduction of the luminance signal.
본 고안은 TBC라이트 클록의 주파수를 정수배(n)(n≥2)로 체배시켜 오우버 샘플링을 수행하고 이를 다시 원래의 데이타 비율로 다운시켜 주는 신호처리를 수행하므로서 얼라이어싱없이 휘도신호를 광대역에 걸쳐 충실하게 기록 및 재생할 수 있고 또한 FIFO메모리의 용량을 상대적으로 감소시킬 수 있도록 한 것으로 VCR, VDP의 TBC회로에 채용한다.The present invention multiplies the frequency of the TBC light clock by an integer multiple (n) (n≥2) to perform over-sampling and to perform signal processing to lower it back to the original data rate, thereby widening the luminance signal without aliasing. It is possible to record and play back faithfully and to relatively reduce the capacity of the FIFO memory. It is adopted in the TBC circuits of VCR and VDP.
Description
제1도는 종래의 TBC회로의 블록구성도.1 is a block diagram of a conventional TBC circuit.
제2도는 본 고안 TBC회로의 블록구성도.2 is a block diagram of a TBC circuit of the present invention.
제3도는 본 고안 TBC회로에서 디지탈 저역통과필터의 주파수 특성도.3 is a frequency characteristic diagram of a digital low pass filter in the TBC circuit of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1' : A/D변환기 2 : FIFO메모리1 ': A / D converter 2: FIFO memory
3 : D/A변환기 4 : 디지탈 저역통과필터3: D / A Converter 4: Digital Low Pass Filter
5 : 데시 메이터5: desi mater
본 고안은 TBC(Time Base Correction) 회로에 관한 것으로 특히, 입력신호를 차단특성이 완만한 아날로그 앤티얼라이싱(Antialiasing) 저역통과필터로 필터링한 후 라이트 클록의 정수배(n)(n≥2)로 디지탈 변환시키고 디지탈 저역통과필터로 필터링하여 데시메이션(Decimation)한 다음 FIFO메모리에 기록 및 재생토록 하므로서 휘도신호를 얼라이어싱(Aliasing)없이 처리할 수 있도록 한 TBC회로에 관한 것이다.The present invention relates to a TBC (Time Base Correction) circuit. In particular, the input signal is filtered by an analog antialiasing lowpass filter with a moderate blocking characteristic, and then the integer multiple of the write clock (n) (n≥2). The present invention relates to a TBC circuit that is capable of processing luminance signals without aliasing by digitally converting, filtering by digital low pass filter, decimating, and then recording and reproducing to a FIFO memory.
종래의 TBC회로는 제1도를 참조하면, 입력단(IN)을 통해 공급되는 합성영상신호 또는 재생 휘도신호를 디지탈 신호로 변환하는 A/D변환기(1)와, 디지탈 신호가 라이트 클록(WCLK) 또는 리드클록(RCLK)에 의하여 저장 또는 해독되는 FIFO메모리(2)와, 메모리 출력 디지탈 신호를 아날로그 신호로 변환하여 출력하는 D/A변환기(3)로 구성되며, 그 동작은 다음과 같다.In the conventional TBC circuit, referring to FIG. 1, an A / D converter 1 for converting a composite video signal or a reproduction luminance signal supplied through an input terminal IN into a digital signal, and the digital signal is a write clock WCLK. Or a FIFO memory 2 stored or decoded by the read clock RCLK, and a D / A converter 3 for converting the memory output digital signal into an analog signal and outputting the analog signal.
입력단(IN)으로 공급된 영상신호(또는 재생휘도신호)는 동기분리 회로에서 얻은 재생 수평동기신호에 록크(LOCK)된 라이트 클록(WCLK)에 따라 A/D변환기(1)에서 디지탈 신호로 변환되어 FIFO메모리(2)에 공급되고, 또한 디지탈 휘도/칼라 분리회로에서 필요한 샘플링과 양자화된 디지탈 합성영상신호로서 출력단(OUT1)을 통해 출력한다.The video signal (or the reproduction luminance signal) supplied to the input terminal IN is converted into a digital signal by the A / D converter 1 according to the write clock WCLK locked to the reproduction horizontal synchronization signal obtained from the synchronization separation circuit. And is supplied to the FIFO memory 2 and output through the output terminal OUT1 as sampling and quantized digital composite video signals required by the digital luminance / color separation circuit.
그리고 FIFO메모리(2)에 저장된 디지탈 신호는 리드클록(RCLK) (동기분리 회로에서 출력된 기준 수평동기신호에 록크됨)에 따라 D/A변환기(3)로 리드되어 아날로그 신호로 변환되므로서 출력단(OUT2)을 통해 TBC된 재생 휘도신호로 출력되고 TBC된 재생휘도신호는 TBC된 색도신호와 혼합하여 TV튜너에 인가되는 것이다.The digital signal stored in the FIFO memory 2 is read into the D / A converter 3 according to the read clock RCLK (locked to the reference horizontal synchronous signal output from the synchronous separation circuit) and converted into an analog signal, thereby outputting the output signal. A TBC reproduced luminance signal is outputted through OUT2 and the TBC reproduced luminance signal is mixed with the TBC chromaticity signal and applied to the TV tuner.
그러나 이와같은 종래의 TBC회로에 의하면 휘도/칼라 분리회로에서 4.2MHz에 이르는 휘도신호를 충실하게 재현해내는데 있어 차단특성이 예리한 아날로그 앤티얼라이어싱 저역통과필터가 A/D변환기 전단에 구비되어야 하는데 이의 구현이 매우 어렵고 따라서 휘도신호의 기록, 재생에 얼라이어싱이 초래되는 문제점이 있었다.However, according to the conventional TBC circuit, an analog antialiasing low pass filter with sharp cutoff characteristics must be provided in front of the A / D converter to faithfully reproduce the luminance signal up to 4.2 MHz in the luminance / color separation circuit. This is very difficult to implement, and therefore, there is a problem that aliasing is caused to record and reproduce the luminance signal.
본 고안은 TBC라이트 클록의 주파수를 정수비(n)(n2)로 체배시켜 오우버 샘플링을 수행하고 이를 다시 원래의 데이타 비율로 다운시켜 주는 신호처리를 수행하므로서 얼라이어싱없이 휘도신호를 광대역에 걸쳐 충실하게 기록 및 재생할 수 있고 또한 FIFO메모리의 용량을 상대적으로 감소시킬 수 있도록 한 TBC회로를 제공함을 목적으로 하며, 이하 제2도를 참조하여 본 고안의 회로구성을 설명하면 다음과 같다.The present invention provides a frequency ratio of the TBC light clock (n) (n By multiplying by 2), performing over-sampling and then processing the signal back down to the original data rate, it is possible to faithfully record and reproduce the luminance signal over the broadband without aliasing, and also to increase the capacity of the FIFO memory. An object of the present invention is to provide a TBC circuit which can be reduced as described below. Referring to FIG. 2, the circuit configuration of the present invention will be described below.
즉, 제2도를 참조하면 본 고안의 TBC회로는 입력되는 합성영상신호를 라이트 클록(WCLK)에 따라 오우버 샘플링 및 양자화하여 디지탈 신호로 출력하는 A/D변환기(1')와, 상기 A/D변환기(1')의 출력 비디오 신호를 필터링하는 디지탈 저역통과필터(4)와, 필터링된 디지탈 신호를 원래의 샘플링 신호로 환원시키기 위하여 오우버 샘플링된 양만큼 다운 샘플링시켜 출력하는 데시메이터(5)와, 상기 데시메이터(5)의 출력 디지탈 신호가 기록 및 해독되는 FIFO메모리(2)와, 리드 클록(RCLK)에 따라 메모리(2)출력 비디오 신호를 아날로그 신호로 변환하여 TBC된 휘도신호로 출력하는 D/A변환기(3)로 구성되며 그 동작은 다음과 같다.That is, referring to FIG. 2, the TBC circuit of the present invention includes an A / D converter 1 'that over-samples and quantizes an input composite video signal according to a write clock WCLK and outputs it as a digital signal. A digital low pass filter (4) for filtering the output video signal of the / D converter (1 '), and a decimator for downsampling and outputting an over-sampled amount to reduce the filtered digital signal to the original sampling signal. 5), the FIFO memory 2 in which the output digital signal of the decimator 5 is recorded and decoded, and the luminance signal TBC converted by converting the memory 2 output video signal into an analog signal in accordance with the read clock RCLK. It consists of a D / A converter (3) for outputting and its operation is as follows.
먼저, 기록하는 경우의 동작은, 입력단(IN)을 통해 차단특성이 원만한 아날로그 저역통과필터를 통과한 합성영상신호가 공급되면 A/D변환기(1')는 오우버 샘플링 주파수를 유지하는 라이트 클록(WCLK)(예: 20MHz)에 따라 입력신호를 오우버 샘플링 및 양자화하여 디지탈 신호로 출력한다.First, in the case of recording, the A / D converter 1 'maintains an oversampling frequency when the composite video signal is passed through the analog low pass filter having a smooth blocking characteristic through the input terminal IN. Input signals are oversampled and quantized according to (WCLK) (e.g., 20MHz) and output as digital signals.
이 디지탈 신호는 제3도와 같은 주파수 특성을 갖는 디지탈 저역통과필터(4)로 필터링되어 얼라이어싱이 발생되지 않도록 처리된 후 데시메이터(5)(Decimator)에 공급된다.This digital signal is filtered by a digital low pass filter 4 having a frequency characteristic as shown in FIG. 3, processed to prevent aliasing from occurring, and then supplied to the decimator 5.
데시메이터(5)는 입력된 디지탈 신호를 A/D변환기(1')에서 오우버 샘플링된 양만큼 다운 샘플링시켜 원래의 샘플링 데이타 비율로 환원시켜 주고, 이와같이 된 디지탈 신호는 출력단(OUT1)을 통해 휘도/칼라 분리회로에 공급된다.The decimator 5 down-samples the input digital signal by the over-sampled amount from the A / D converter 1 'and reduces it to the original sampling data rate. The digital signal thus obtained is output through the output terminal OUT1. It is supplied to the luminance / color separation circuit.
이와같이 종래에 비하여 n배(n2)의 라이트 클록(WCLK)으로 오우버 샘플링함에 따라 A/D변환기(1') 전단에 요구되는 아날로그 앤티얼라이어싱 저역통과필터의 차단특성을 완만한 필터로 구성 가능하다.Like this, n times (n By over-sampling with the write clock (WCLK) of 2), the blocking characteristic of the analog antialiasing low pass filter required at the front end of the A / D converter 1 'can be configured as a gentle filter.
이는 종래에 차단특성을 예리하게 구성하는 경우 위상특성이 비선형적인 영역으로 어긋나게 되는 양이 증가하기 때문에 그룹지연이 주파수의 함수로 되어 입력영상신호를 왜곡시키게 되지만 본 고안에서는 오우버 샘플링과 디지탈 저역통과필터(4)에 의한 얼라이어싱 방지가 병행되므로 완만한 차단특성이 아날로그 저역통과필터 및 FIR(Finite Impulse Response) 타입의 디지탈 저역통과필터(4)를 사용하게 되면 위상 비선형성에 기인하는 상기의 영상 왜곡현상을 격감시킬 수 있다.In the case of sharply configuring the blocking characteristic in the related art, since the amount of the phase characteristic is shifted to the nonlinear region increases, the group delay becomes a function of the frequency and distorts the input video signal. The anti-aliasing by the filter 4 is performed in parallel, so that the slow cut-off characteristics are caused by the phase nonlinearity when the analog low pass filter and the digital low pass filter of the finite impulse response (FIR) type are used. Distortion can be greatly reduced.
한편, 본 고안 TBC회로에서 재생시의 동작을 설명하면, 상기한 바와같은 경로와 신호처리를 거쳐 데시메이터(5)에서 출력된 디지탈 신호가 FIFO메모리(2)에 저장되고, 리드클록(RCLK)에 따라 해독되어 D/A변환기(3)를 통해 출력단(OUT2)으로 출력되어 TBC된 휘도신호로서 TBC된 색도신호와 함께 혼합되어 TV튜너에 공급된다.On the other hand, the operation during reproduction in the TBC circuit of the present invention will be described. The digital signal output from the decimator 5 through the path and the signal processing as described above is stored in the FIFO memory 2 and stored in the read clock RCLK. The signal is decoded and output to the output terminal OUT2 through the D / A converter 3, mixed with the TBC chromaticity signal as the TBC luminance signal, and supplied to the TV tuner.
이 경우에 A/D변환기(1')의 데이타 비율이 n배로 증가되었으나 데시메이터(5)에 의하여 원래의 데이타 비율로 다운되어 FIFO메모리(2)에 인가시켜 주므로 기존의 FIFO메모리와 동일한 액세스 시간 및 용량을 갖는 메모리 사용이 가능하여 상대적으로 감소된 용량을 유지할 수 있게 된다.In this case, the data rate of the A / D converter 1 'is increased by n times, but it is down to the original data rate by the decimator 5 and applied to the FIFO memory 2 so that the same access time as the existing FIFO memory is obtained. And the use of memory with capacity to maintain a relatively reduced capacity.
이상에서 설명한 바와같이 본 고안에 의하면 기존의 메모리 용량으로 얼라이어싱 없이 디지탈 영상신호를 휘도/칼라 분리회로에 제공 가능함은 물론 TBC를 동시 실현할 수 있고, 영상 왜곡 방지를 통한 화질향상과 제품의 품질향상이 가능한 효과가 있다.As described above, according to the present invention, it is possible to provide a digital image signal to a luminance / color separation circuit without aliasing with existing memory capacity, and to simultaneously realize TBC, and to improve image quality and prevent product distortion. There is an effect that can be improved.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019920002706U KR0124722Y1 (en) | 1992-02-24 | 1992-02-24 | TBC circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019920002706U KR0124722Y1 (en) | 1992-02-24 | 1992-02-24 | TBC circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR930020369U KR930020369U (en) | 1993-09-24 |
| KR0124722Y1 true KR0124722Y1 (en) | 1998-10-15 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019920002706U Expired - Lifetime KR0124722Y1 (en) | 1992-02-24 | 1992-02-24 | TBC circuit |
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| Country | Link |
|---|---|
| KR (1) | KR0124722Y1 (en) |
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1992
- 1992-02-24 KR KR2019920002706U patent/KR0124722Y1/en not_active Expired - Lifetime
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| Publication number | Publication date |
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| KR930020369U (en) | 1993-09-24 |
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