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JPS648629A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS648629A
JPS648629A JP16422687A JP16422687A JPS648629A JP S648629 A JPS648629 A JP S648629A JP 16422687 A JP16422687 A JP 16422687A JP 16422687 A JP16422687 A JP 16422687A JP S648629 A JPS648629 A JP S648629A
Authority
JP
Japan
Prior art keywords
insulating film
opening
film
sog
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16422687A
Other languages
Japanese (ja)
Inventor
Koji Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16422687A priority Critical patent/JPS648629A/en
Publication of JPS648629A publication Critical patent/JPS648629A/en
Pending legal-status Critical Current

Links

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To prevent an SOG film from being exposed to an opening and from cracking, and to prevent metal wirings from chipped or disconnecting by making an opening in an insulating film containing the SOG film, depositing an insulating film on the whole surface, then etching it until the opening is opened again by anisotropical etching, and allowing the insulating film deposited on the sidewall of the opening to remain. CONSTITUTION:An insulating film of 3-layer structure of a first insulating film 2-an SOG film 3-a second insulating film 4 is formed on lower layer wirings 8 on and insulating film 1 formed on a lower base stepwise difference 7. Then, a through hole is patterned by photolithography, and a through-hole is opened by 2-step etchings. Thereafter, an insulating film 6 is deposited on the whole surface by chemically deposing. An anisotropic etching is conducted to allow only the insulating film on the sidewall of the film 6 to remain. Thus, the through-hole in which the SOG film is not exposed to the opening is formed in the insulating film of the 3-layer structure. Subsequently, when upper layer wirings 5 are formed, a semiconductor device which is not cracked and in which the metal wirings are not chipped or disconnected is obtained.
JP16422687A 1987-06-30 1987-06-30 Manufacture of semiconductor device Pending JPS648629A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16422687A JPS648629A (en) 1987-06-30 1987-06-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16422687A JPS648629A (en) 1987-06-30 1987-06-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS648629A true JPS648629A (en) 1989-01-12

Family

ID=15789068

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16422687A Pending JPS648629A (en) 1987-06-30 1987-06-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS648629A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5420077A (en) * 1990-06-29 1995-05-30 Sharp Kabushiki Kaisha Method for forming a wiring layer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594057A (en) * 1982-06-30 1984-01-10 Toshiba Corp Formation of contact hole
JPS607737A (en) * 1983-06-27 1985-01-16 Nec Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS594057A (en) * 1982-06-30 1984-01-10 Toshiba Corp Formation of contact hole
JPS607737A (en) * 1983-06-27 1985-01-16 Nec Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5420077A (en) * 1990-06-29 1995-05-30 Sharp Kabushiki Kaisha Method for forming a wiring layer

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