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JPS6476732A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6476732A
JPS6476732A JP62234654A JP23465487A JPS6476732A JP S6476732 A JPS6476732 A JP S6476732A JP 62234654 A JP62234654 A JP 62234654A JP 23465487 A JP23465487 A JP 23465487A JP S6476732 A JPS6476732 A JP S6476732A
Authority
JP
Japan
Prior art keywords
pads
leads
chip
prevent
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62234654A
Other languages
Japanese (ja)
Other versions
JP2567870B2 (en
Inventor
Toshiyuki Sakuta
Kazuyuki Miyazawa
Satoshi Oguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62234654A priority Critical patent/JP2567870B2/en
Priority to KR1019880007311A priority patent/KR960013778B1/en
Publication of JPS6476732A publication Critical patent/JPS6476732A/en
Priority to KR1019920012675A priority patent/KR970004216B1/en
Priority to US08/000,125 priority patent/US5365113A/en
Priority to US08/329,824 priority patent/US5514905A/en
Priority to US08/458,166 priority patent/US5742101A/en
Application granted granted Critical
Publication of JP2567870B2 publication Critical patent/JP2567870B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce in size a semiconductor device, to prevent the bonding part of a bonding pad to a wire from breaking down and to further prevent a signal from delaying by providing a peripheral circuit and the pad substantially at the center of a semiconductor chip, and employing a tabless lead frame. CONSTITUTION:A peripheral circuit 6 is provided at the center of a semiconductor chip 1, and bonding pads P1-P18 are concentrically provided along the long side of the circuit 6. Since the ends of leads L1-L18 are so provided as to be disposed adjacently to the pads P1-P18, the extensions of the leads from the chip are eliminated, and the size of a package can be reduced that much. A stress generated in a boundary between the chip 1 and resin 2 is small near the pads P1-P18. Accordingly, the stress can prevent wirings W to the pads P1-P18, or the pads to the leads L1-L18 from breaking down.
JP62234654A 1987-06-30 1987-09-17 Semiconductor memory device Expired - Lifetime JP2567870B2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP62234654A JP2567870B2 (en) 1987-09-17 1987-09-17 Semiconductor memory device
KR1019880007311A KR960013778B1 (en) 1987-06-30 1988-06-17 Semiconductor memory device
KR1019920012675A KR970004216B1 (en) 1987-06-30 1992-07-16 Semiconductor memory
US08/000,125 US5365113A (en) 1987-06-30 1993-01-04 Semiconductor device
US08/329,824 US5514905A (en) 1987-06-30 1994-10-27 Semiconductor device
US08/458,166 US5742101A (en) 1987-06-30 1995-06-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62234654A JP2567870B2 (en) 1987-09-17 1987-09-17 Semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS6476732A true JPS6476732A (en) 1989-03-22
JP2567870B2 JP2567870B2 (en) 1996-12-25

Family

ID=16974397

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62234654A Expired - Lifetime JP2567870B2 (en) 1987-06-30 1987-09-17 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JP2567870B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01123428A (en) * 1987-11-06 1989-05-16 Mitsubishi Electric Corp Resin sealed semiconductor device
JPH02251149A (en) * 1989-03-24 1990-10-08 Nec Corp Semiconductor device
EP1111672A2 (en) * 1990-09-24 2001-06-27 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US7098078B2 (en) 1990-09-24 2006-08-29 Tessera, Inc. Microelectronic component and assembly having leads with offset portions

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01123428A (en) * 1987-11-06 1989-05-16 Mitsubishi Electric Corp Resin sealed semiconductor device
JPH02251149A (en) * 1989-03-24 1990-10-08 Nec Corp Semiconductor device
EP1111672A2 (en) * 1990-09-24 2001-06-27 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
EP1111672B1 (en) * 1990-09-24 2005-06-01 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US7098078B2 (en) 1990-09-24 2006-08-29 Tessera, Inc. Microelectronic component and assembly having leads with offset portions
US7271481B2 (en) 1990-09-24 2007-09-18 Tessera, Inc. Microelectronic component and assembly having leads with offset portions

Also Published As

Publication number Publication date
JP2567870B2 (en) 1996-12-25

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term