JPS6476330A - Interruption processing system - Google Patents
Interruption processing systemInfo
- Publication number
- JPS6476330A JPS6476330A JP23442387A JP23442387A JPS6476330A JP S6476330 A JPS6476330 A JP S6476330A JP 23442387 A JP23442387 A JP 23442387A JP 23442387 A JP23442387 A JP 23442387A JP S6476330 A JPS6476330 A JP S6476330A
- Authority
- JP
- Japan
- Prior art keywords
- reinterruption
- epu
- task
- command code
- ioc
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To decide the task executing form of an arithmetic processor based on the priority level of the task by designating the reinterruption frequency to a field in a reinterruption permission command code which is produced to an input/output controller from the arithmetic processor. CONSTITUTION:A peripheral input/output controller IOC 4 performs the transfer of data between a main memory MEM 3 and an input/output device according to an action command code given from an arithmetic processor EPU 2. An interruption is applied to the EPU 2 as an action end report for the transfer of data, etc., by an interruption command code. Thus the EPU 2 produces a reinterruption permission command code including a field showing the reinterruption frequency to the IOC 4. Thus the IOC 4 kept under an interruption holding state performs the reinterruptions to the EPU 2 based on the reinterruption frequency and accepts the reinterruptions according to the priority level of a task. As a result, the task executing form of the EPU 2 is decided based on the task priority level.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23442387A JPS6476330A (en) | 1987-09-18 | 1987-09-18 | Interruption processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23442387A JPS6476330A (en) | 1987-09-18 | 1987-09-18 | Interruption processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6476330A true JPS6476330A (en) | 1989-03-22 |
Family
ID=16970786
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23442387A Pending JPS6476330A (en) | 1987-09-18 | 1987-09-18 | Interruption processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6476330A (en) |
-
1987
- 1987-09-18 JP JP23442387A patent/JPS6476330A/en active Pending
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