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JPS647341Y2 - - Google Patents

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Publication number
JPS647341Y2
JPS647341Y2 JP1980105226U JP10522680U JPS647341Y2 JP S647341 Y2 JPS647341 Y2 JP S647341Y2 JP 1980105226 U JP1980105226 U JP 1980105226U JP 10522680 U JP10522680 U JP 10522680U JP S647341 Y2 JPS647341 Y2 JP S647341Y2
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JP
Japan
Prior art keywords
signal
circuit
output signal
component
radar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1980105226U
Other languages
Japanese (ja)
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JPS5729875U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Priority to JP1980105226U priority Critical patent/JPS647341Y2/ja
Publication of JPS5729875U publication Critical patent/JPS5729875U/ja
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Expired legal-status Critical Current

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Description

【考案の詳細な説明】 本考案はパルスレーダにおける海面反射妨害を
自動的に除去して目標信号のみを検出するレーダ
信号処理装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a radar signal processing device that automatically removes sea surface reflection interference in a pulse radar and detects only a target signal.

海上物標のレーダ探索に際して生じる海面反射
は、波浪の強弱によつて変動し、本来探知すべき
目標(船浮標等)からの反射信号に妨害を与え、
目標検出に大きな支障を及ぼす。この海面反射妨
害を除去するため、従来は(a)STC(Sensitivity
Time Control)回路を用いる方式、(b)FTC
(Fast Time Constant)回路を用いる方式、(c)
対数増幅器、CFAR回路を用いる方式、(d)アジリ
テイレーダにより相関積分を行う方式等が採用さ
れている。
Sea surface reflections that occur during radar searches for maritime targets vary depending on the strength of waves, and can interfere with reflected signals from targets that should be detected (ship buoys, etc.).
This will greatly impede target detection. In order to remove this sea surface reflection disturbance, conventional methods were (a) STC (Sensitivity
(b)FTC
Method using (Fast Time Constant) circuit, (c)
Methods that use logarithmic amplifiers, CFAR circuits, and (d) correlation integration using an agility radar have been adopted.

ところで、上記(a)の方式は、レーダ受信機の中
間周波増幅器の感度を、近距離のレーダエコーに
対しては低く、遠距離のレーダエコーに対しては
高くするようにSTC回路により制御することに
よつて、近距離のエコーが大振幅であるために受
信機が飽和して弱い目標信号の検出が不可能にな
るのを防ぐものである。しかしSTC回路を最適
に設定しても、360度全方位に対して効果的に動
作させることは不可能であり、また単に受信機感
度を抑圧することは、S/Nの改善にはならず、
海面反射波より小さい目標信号を検出できない欠
点があつた。
By the way, in method (a) above, the STC circuit controls the sensitivity of the intermediate frequency amplifier of the radar receiver so that it is low for short-range radar echoes and high for long-range radar echoes. This prevents the large amplitude of near-field echoes from saturating the receiver and making it impossible to detect weak target signals. However, even if the STC circuit is set optimally, it is impossible to operate effectively in all 360-degree directions, and simply suppressing receiver sensitivity will not improve S/N. ,
The drawback was that it could not detect target signals smaller than waves reflected from the sea surface.

また前記(b)の方式は、レーダエコーの映像を
FTC回路により微分して一様な反射波中にある
特定目標を見出そうとするものであるが、FTC
回路は時定数の短かい微分回路であつて応答特性
が悪いために感度を低下させる領域が発生する欠
点があつた。
In addition, method (b) above uses images of radar echoes.
It attempts to find a specific target in a uniform reflected wave by differentiating it using an FTC circuit.
The circuit is a differential circuit with a short time constant and has poor response characteristics, which has the disadvantage of creating a region where sensitivity is reduced.

また前記(c)の方式は、レーダ受信機の中間周波
信号をCFAR回路に導き、低域フイルタにより直
流成分を除去するものであるが、フイルタ特性に
より応答特性上感度低下があり、直流成分除去だ
けでは限界があつた。
In addition, in the method (c) above, the intermediate frequency signal of the radar receiver is guided to the CFAR circuit and the DC component is removed by a low-pass filter. There was a limit to just doing that.

また前記(d)の方式は、送信パルス毎に周波数を
異ならせてパルス毎あるいは走査毎の相関をとる
ものであるが、直流成分を含んだまま相関をとる
ことから必ずしもS/N比の改善に大きな期待は
得られていなかつた。
In addition, in the method (d) above, the frequency is varied for each transmitted pulse and the correlation is taken for each pulse or each scan, but since the correlation is taken while including the DC component, it is not necessarily possible to improve the S/N ratio. High expectations were not met.

本考案は上記の事情に鑑みてなされたもので、
レーダエコー信号入力のゆらぎ成分を取り出し、
このゆらぎ成分信号から直流成分を除去したのち
固定目標の相関をとることによつて、S/N比を
改善でき、海面反射妨害を除去できるレーダ信号
処理装置を提供するものである。
This idea was made in view of the above circumstances.
Extract the fluctuation component of the radar echo signal input,
The present invention provides a radar signal processing device that can improve the S/N ratio and eliminate sea surface reflection interference by removing the DC component from the fluctuation component signal and then correlating it with a fixed target.

以下図面を参照して本考案の一実施例を詳細に
説明する。
An embodiment of the present invention will be described in detail below with reference to the drawings.

第1図において、1はレーダアンテナであり送
受切換器2を介してレーダ送信機3およびレーダ
受信系に接続されている。このレーダ受信系にお
いて、4はミクサー、5は対数増幅器を用いた
IF(中間周波)増幅器であり、この増幅器5の後
段にゆらぎ成分(FLUCTUATION)検出回路
6および信号レベル変換回路7が順に接続されて
いる。
In FIG. 1, a radar antenna 1 is connected to a radar transmitter 3 and a radar receiving system via a transmitter/receiver switch 2. In FIG. In this radar receiving system, 4 uses a mixer and 5 uses a logarithmic amplifier.
This is an IF (intermediate frequency) amplifier, and a fluctuation component (FLUCTUATION) detection circuit 6 and a signal level conversion circuit 7 are connected in sequence at the downstream stage of this amplifier 5.

一方、8,9は互いに連動駆動される第1、第
2の切換器であり、第1の切換器8は上記信号レ
ベル変換回路7または前記IF増幅器5の出力を
切換選択して直流分除去回路10へ導く。この除
去回路10の後段に相関積分器11が接続され、
前記第2の切換器9は上記相関積分器11または
前記直流分除去回路10の出力を切換選択して映
像出力端子12へ導出する。
On the other hand, 8 and 9 are first and second switching devices driven in conjunction with each other, and the first switching device 8 selects the output of the signal level conversion circuit 7 or the IF amplifier 5 to remove the DC component. Lead to circuit 10. A correlation integrator 11 is connected to the subsequent stage of this removal circuit 10,
The second switch 9 switches and selects the output of the correlation integrator 11 or the DC component removal circuit 10 and outputs the selected output to the video output terminal 12.

而して上記構成において、レーダ受信信号はミ
クサー4によりIF信号に変換されたのちIF増幅
器5により対数増幅される。この増幅出力は、レ
ーダパルス1〜nに各対応して第2図a〜nに示
すように、海面反射から得られる直流成分Aとゆ
らぎ成分Bと固定目標成分Cが含まれる。なおゆ
らぎ成分Bは、IF増幅器5の対数増幅器により、
近距離の振幅成分と遠距離の振幅成分が一様にな
つている。この増幅出力はゆらぎ成分検出回路6
に導かれ、第3図a〜nに示すようにゆらぎ成分
Bに僅かの固定目標成分Cが含まれた信号が取り
出される。
In the above configuration, the radar reception signal is converted into an IF signal by the mixer 4 and then logarithmically amplified by the IF amplifier 5. This amplified output includes a direct current component A obtained from sea surface reflection, a fluctuation component B, and a fixed target component C, as shown in FIG. 2 a to n, corresponding to radar pulses 1 to n, respectively. The fluctuation component B is generated by the logarithmic amplifier of the IF amplifier 5.
The near-field amplitude component and the long-range amplitude component are uniform. This amplified output is the fluctuation component detection circuit 6
As shown in FIGS. 3 a to 3 n, a signal is extracted in which the fluctuation component B includes a small amount of the fixed target component C.

ところで上記ゆらぎ成分検出回路6はたとえば
第8図に示すように構成される。すなわち入力信
号をPRF(パルス繰返し周波数)遅延回路81お
よび遅延補正回路82にそれぞれ導き、この各遅
延出力を減算回路83に導いて減算処理するもの
である。このPRF遅延回路81は、1〜n番目
の任意のPRF遅延が可能なように可変形になつ
ている。またこのPRF遅延回路81を入力信号
が流れることによつて遅延する僅かの遅延量に見
合うだけ、遅延補正回路82に流れる入力信号を
遅延補正するようになつている。
Incidentally, the fluctuation component detection circuit 6 is configured as shown in FIG. 8, for example. That is, the input signal is guided to a PRF (pulse repetition frequency) delay circuit 81 and a delay correction circuit 82, and each delayed output is guided to a subtraction circuit 83 for subtraction processing. This PRF delay circuit 81 is variable so that any PRF delay from 1st to nth is possible. Further, the delay of the input signal flowing to the delay correction circuit 82 is compensated for the slight amount of delay caused by the input signal flowing through the PRF delay circuit 81.

なお、第3図の波形は、PRF遅延回路81が
1PRF周期遅延のときに対応し、たとえば1番目
の送信パルスにより受信された信号(第2図a)
を、PRF遅延回路81により1PRF周期分遅延さ
せ、2番目送信パルスにより受信された信号(第
2図b)との間で減算処理して得たものである
が、PRF遅延回路81の1〜nのPRF遅延はゆ
らぎ成分Bと固定目標成分Cとを有効に取り出し
最適出力を得るように1PRF以上、1〜nPRFの
任意の値まで可変調整される。
Note that the waveform in FIG. 3 is generated by the PRF delay circuit 81.
Corresponding to the case of 1 PRF period delay, e.g. the signal received by the first transmitted pulse (Fig. 2a)
is delayed by one PRF cycle by the PRF delay circuit 81, and is obtained by subtracting it from the signal received by the second transmission pulse (Fig. 2b). The PRF delay of n is variably adjusted to an arbitrary value of 1PRF or more, 1 to nPRF, so as to effectively extract the fluctuation component B and the fixed target component C and obtain the optimum output.

上記したゆらぎ成分検出回路6の出力信号は、
信号レベル変換回路7によりレベル変換される。
このレベル変換は、ある直流レベルから第3図a
〜nのような信号を減じることにより、その反転
信号レベルとして第4図a〜nに示すようにゆら
ぎ成分B、固定目標成分Cを取り出すものであ
る。このように取り出された信号が第1の切換器
8を介して直流分除去回路10に導かれ、直流分
が除去されて第5図a〜nに示すようにゆらぎ成
分B、固定目標成分Cが取り出される。
The output signal of the fluctuation component detection circuit 6 described above is
The signal level conversion circuit 7 performs level conversion.
This level conversion is performed from a certain DC level to Figure 3a.
By subtracting signals such as .about.n, fluctuation component B and fixed target component C are extracted as the inverted signal levels as shown in FIG. 4 a to n. The signal extracted in this way is led to the DC component removal circuit 10 via the first switch 8, where the DC component is removed and the fluctuation component B and the fixed target component C are removed as shown in FIG. 5 a to n. is taken out.

第7図は、前記ゆらぎ成分検出回路6から直流
分除去回路10までの信号処理過程を分り易く説
明するために示したものであり、同図イ〜ハは第
3図〜第5図に対応する波形である。
FIG. 7 is shown to clearly explain the signal processing process from the fluctuation component detection circuit 6 to the DC component removal circuit 10, and A to C correspond to FIGS. 3 to 5. This is the waveform.

前記直流分除去回路10の出力は相関積分器1
1に導かれ、ここで非相関信号(第5図のゆらぎ
成分B)と相関信号(第5図の固定目標成分C)
との相関がとられ、非相関性信号は平均化され、
相関性の強い信号は加算されることによつて、第
6図に示すように相対的にS/Nが改善されたゆ
らぎ成分B、固定目標成分Cが得られ、第2の切
換器9を介して導出される。この場合、相関性の
強い信号が加算されることによつて、近距離から
遠距離まで自動的に最大感度の状態となるので、
S/Nは従来方式に比べて大幅に改善される。
The output of the DC component removal circuit 10 is sent to the correlation integrator 1.
1, and here the uncorrelated signal (fluctuation component B in Fig. 5) and the correlated signal (fixed target component C in Fig. 5)
The uncorrelated signals are averaged and
By adding the highly correlated signals, a fluctuation component B and a fixed target component C with relatively improved S/N ratios are obtained as shown in FIG. derived through. In this case, by adding signals with strong correlation, the state of maximum sensitivity is automatically achieved from short distance to long distance.
The S/N ratio is significantly improved compared to the conventional method.

なお上記相関積分器11は、第9図に示すよう
に入力信号および積分フアクタKの帰還信号を加
算する加算器91と、この加算器91の加算出力
を1PRF周期遅延させる1PRF遅延回路92と、
この遅延回路92の出力を帰還させる帰還回路9
3とよりなる。
As shown in FIG. 9, the correlation integrator 11 includes an adder 91 that adds the input signal and the feedback signal of the integration factor K, and a 1PRF delay circuit 92 that delays the addition output of the adder 91 by 1PRF cycle.
A feedback circuit 9 that feeds back the output of this delay circuit 92
3 and more.

また第1図において、切換器8,9は海面反射
等(クラツタ等ふらつきの大きい交流成分)が少
ない場合に図示状態とは逆状態に切換えられるも
のであり、これによつていかなる受信信号に対し
ても最良の受信感度が得られる。
In addition, in Fig. 1, the switches 8 and 9 are switched to the opposite state from the one shown when there is little sea surface reflection, etc. (alternating current components with large fluctuations such as clutter). The best reception sensitivity can be obtained.

本考案は上述したように、海面反射波妨害を除
去可能であつて、出力ビデオのS/Nを改善し得
るレーダ信号処理装置を提供できる。
As described above, the present invention can provide a radar signal processing device that can remove sea surface reflected wave interference and improve the S/N of output video.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案に係るレーダ信号処理装置の一
実施例を示すブロツク図、第2図乃至第6図は第
1図の各部信号をレーダパルス毎に示す波形図、
第7図は第1図の動作を説明するために示す波形
図、第8図は第1図のゆらぎ成分検出回路の一例
を示すブロツク図、第9図は第1図の相関積分器
の一例を示すブロツク図である。 6……ゆらぎ成分検出回路、7……信号レベル
変換回路、10……直流分除去回路、11……相
関積分器。
FIG. 1 is a block diagram showing an embodiment of a radar signal processing device according to the present invention, and FIGS. 2 to 6 are waveform diagrams showing each part of the signals in FIG. 1 for each radar pulse.
7 is a waveform diagram shown to explain the operation of FIG. 1, FIG. 8 is a block diagram showing an example of the fluctuation component detection circuit of FIG. 1, and FIG. 9 is an example of the correlation integrator of FIG. 1. FIG. 6... Fluctuation component detection circuit, 7... Signal level conversion circuit, 10... DC component removal circuit, 11... Correlation integrator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] レーダ送信繰返し信号を送出する送信手段と、
この送信手段の出力信号が送受切換器を介して供
給され空間に電磁波を放射するとともに目標から
の反射波を捕捉する空中線と、この空中線の出力
信号が前記送受切換器を介して供給される受信手
段と、この受信手段の出力信号が供給されn送信
繰返し周期(nは1以上の整数)の時間差を有す
る信号どうしで減算して相関性のない信号を検出
する検出回路と、この検出回路の出力信号レベル
を予め決められた直流レベルから減算するレベル
変換回路と、このレベル変換回路の出力信号から
直流成分を除去する直流成分除去回路と、この直
流成分除去回路の出力信号から相関性の大きい信
号を抽出する抽出手段とを具備するレーダ信号処
理装置。
a transmitting means for transmitting a radar transmission repetition signal;
An antenna to which the output signal of the transmitting means is supplied via the transmitting/receiving switch and radiating electromagnetic waves into space and capturing reflected waves from the target; and a receiver to which the output signal of this antenna is supplied via the transmitting/receiving switch. a detection circuit that is supplied with the output signal of the receiving means and that detects uncorrelated signals by subtracting signals having a time difference of n transmission repetition periods (n is an integer of 1 or more); A level conversion circuit that subtracts the output signal level from a predetermined DC level, a DC component removal circuit that removes the DC component from the output signal of this level conversion circuit, and a signal that has a high correlation from the output signal of this DC component removal circuit. A radar signal processing device comprising an extraction means for extracting a signal.
JP1980105226U 1980-07-25 1980-07-25 Expired JPS647341Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1980105226U JPS647341Y2 (en) 1980-07-25 1980-07-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1980105226U JPS647341Y2 (en) 1980-07-25 1980-07-25

Publications (2)

Publication Number Publication Date
JPS5729875U JPS5729875U (en) 1982-02-17
JPS647341Y2 true JPS647341Y2 (en) 1989-02-27

Family

ID=29466609

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1980105226U Expired JPS647341Y2 (en) 1980-07-25 1980-07-25

Country Status (1)

Country Link
JP (1) JPS647341Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002243842A (en) * 2001-02-21 2002-08-28 Furuno Electric Co Ltd Detector

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54161290A (en) * 1977-10-21 1979-12-20 Furuno Electric Co Radar and simulator

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54161290A (en) * 1977-10-21 1979-12-20 Furuno Electric Co Radar and simulator

Also Published As

Publication number Publication date
JPS5729875U (en) 1982-02-17

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