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JPS6471125A - Exposure of semiconductor - Google Patents

Exposure of semiconductor

Info

Publication number
JPS6471125A
JPS6471125A JP62227842A JP22784287A JPS6471125A JP S6471125 A JPS6471125 A JP S6471125A JP 62227842 A JP62227842 A JP 62227842A JP 22784287 A JP22784287 A JP 22784287A JP S6471125 A JPS6471125 A JP S6471125A
Authority
JP
Japan
Prior art keywords
alignment
wafer
marks
signals
beams
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62227842A
Other languages
Japanese (ja)
Inventor
Tomoji Sekiya
Akira Ono
Yasutomo Fujimori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP62227842A priority Critical patent/JPS6471125A/en
Publication of JPS6471125A publication Critical patent/JPS6471125A/en
Pending legal-status Critical Current

Links

Landscapes

  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

PURPOSE:To align a mask and a wafer with high accuracy by exposing the wafer only when the quantities of positional displacement in each fixed direction from respective alignment marks put to the mask and the wafer respectively are kept within a tolerance. CONSTITUTION:Alignment beams 34, 35 are passed through alignment marks 30, 31, and applied to each alignment mark 22, 23 put onto a wafer 21, and the reflected beams of the marks 22, 23 are reflected by mirrors 36, 37 and projected to alignment photo-detectors 32, 33. The detectors 32, 33 output these incident beams to a servo control section 40 and an exposure timing generating section 41 as alignment detecting signals a1, a2. The control section 40 moves a wafer stage so that the quantities of the X and Y directions of the marks 22 and 30, 23 and 31 are brought to zero by the signals a1, a2. Even when vibrations are applied from the outside, on the other hand, the generating section 41 transmits an exposure signal S over a pulse laser oscillator 24. when the signals a1, a2 are kept within the tolerance of a positional displacement allowance setting section 43 simultaneously.
JP62227842A 1987-09-11 1987-09-11 Exposure of semiconductor Pending JPS6471125A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62227842A JPS6471125A (en) 1987-09-11 1987-09-11 Exposure of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62227842A JPS6471125A (en) 1987-09-11 1987-09-11 Exposure of semiconductor

Publications (1)

Publication Number Publication Date
JPS6471125A true JPS6471125A (en) 1989-03-16

Family

ID=16867222

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62227842A Pending JPS6471125A (en) 1987-09-11 1987-09-11 Exposure of semiconductor

Country Status (1)

Country Link
JP (1) JPS6471125A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0215614A (en) * 1988-07-04 1990-01-19 Nikon Corp Aligner

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0215614A (en) * 1988-07-04 1990-01-19 Nikon Corp Aligner

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