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JPS6461176A - Solid-state image pickup device - Google Patents

Solid-state image pickup device

Info

Publication number
JPS6461176A
JPS6461176A JP62217582A JP21758287A JPS6461176A JP S6461176 A JPS6461176 A JP S6461176A JP 62217582 A JP62217582 A JP 62217582A JP 21758287 A JP21758287 A JP 21758287A JP S6461176 A JPS6461176 A JP S6461176A
Authority
JP
Japan
Prior art keywords
plural
vertical
transfer section
scanning pulse
vertical scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62217582A
Other languages
Japanese (ja)
Inventor
Tadakuni Narabe
Tetsuo Kumezawa
Hiromichi Matsui
Maki Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP62217582A priority Critical patent/JPS6461176A/en
Publication of JPS6461176A publication Critical patent/JPS6461176A/en
Pending legal-status Critical Current

Links

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

PURPOSE:To contrive to improve the transfer efficiency at vertical transfer section and to reduce fixed pattern noise by dividing the vertical transfer section into plural blocks comprising plural packets so as to deviate the phase of a vertical scanning pulse supplied to a gate electrode section corresponding to plural packets in the blocks. CONSTITUTION:The vertical transfer section 12 is divided into plural blocks B1-B10 comprising plural packets P1-P7, each packet consists of plural and same number of gate electrode (G1-G8) and a signal charge is read in a prescribed packet by one or two photodetectors and transferred to a horizontal transfer section 13. In this case, vertical scanning pulses phiV1-1-phiV1-8, phiV2-1-phiV2-8...phiV7-1-phiV7-8 supplied to the electrode sections G1-G8 are deviated for the phase. Thus, even when a low frequency is selected as the frequency of the vertical scanning pulse, the frequency of the scanning pulse as the entire vertical transfer section 12 is increased. Thus, the transfer time of the signal charge is increased to improve the transfer efficiency and the fixed pattern noise caused by the vertical scanning pulse is reduced.
JP62217582A 1987-08-31 1987-08-31 Solid-state image pickup device Pending JPS6461176A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62217582A JPS6461176A (en) 1987-08-31 1987-08-31 Solid-state image pickup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62217582A JPS6461176A (en) 1987-08-31 1987-08-31 Solid-state image pickup device

Publications (1)

Publication Number Publication Date
JPS6461176A true JPS6461176A (en) 1989-03-08

Family

ID=16706539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62217582A Pending JPS6461176A (en) 1987-08-31 1987-08-31 Solid-state image pickup device

Country Status (1)

Country Link
JP (1) JPS6461176A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5517043A (en) * 1994-10-25 1996-05-14 Dalsa, Inc. Split pixel interline transfer imaging device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5517043A (en) * 1994-10-25 1996-05-14 Dalsa, Inc. Split pixel interline transfer imaging device

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