JPS6457675U

JPS6457675U -

Info

Publication number: JPS6457675U
Application number: JP15202387U
Authority: JP
Priority date: 1987-10-02
Filing date: 1987-10-02
Publication date: 1989-04-10

Description

[Brief explanation of the drawing]

第１図は本考案の広面積パターンの原理平面図
、第２図は一実施例の広面積パターンの平面図、
第３図は他の実施例の広面積パターンの平面図、
第４図は表面実装技術における部品実装模式図で
ある。図において、１はプリント配線板、２は回路パ
ターン、３は実装部品、４は端子ピン、５は半田
ペースト、６は広面積パターン、７は接続用ラン
ド、８は細線パターンを示している。 FIG. 1 is a plan view of the principle of a wide area pattern of the present invention, FIG. 2 is a plan view of a wide area pattern of an embodiment,
FIG. 3 is a plan view of a wide area pattern of another embodiment;
FIG. 4 is a schematic diagram of component mounting in surface mounting technology. In the figure, 1 is a printed wiring board, 2 is a circuit pattern, 3 is a mounted component, 4 is a terminal pin, 5 is a solder paste, 6 is a wide area pattern, 7 is a connection land, and 8 is a thin line pattern.

Claims

[Claims for Utility Model Registration] A printed wiring board in which a pattern 6 having a wide width and a pattern having a narrow width coexist, and a terminal pin 4 of a mounted component 3 is brought into contact with both patterns to solder between them. In, the pattern 6 having a wide width and a predetermined gap W
A printed wiring board characterized in that it has a pattern in which narrow width connection lands 7 separated by holding are provided, and a thin line pattern 8 connects the connection lands and the wide width pattern.