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JPS6457648A - Manufacture of multilayer interconnection - Google Patents

Manufacture of multilayer interconnection

Info

Publication number
JPS6457648A
JPS6457648A JP21408887A JP21408887A JPS6457648A JP S6457648 A JPS6457648 A JP S6457648A JP 21408887 A JP21408887 A JP 21408887A JP 21408887 A JP21408887 A JP 21408887A JP S6457648 A JPS6457648 A JP S6457648A
Authority
JP
Japan
Prior art keywords
insulating film
interlayer insulating
holes
wiring
aluminum wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21408887A
Other languages
Japanese (ja)
Inventor
Jiro Nakanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Minolta Co Ltd
Original Assignee
Minolta Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Minolta Co Ltd filed Critical Minolta Co Ltd
Priority to JP21408887A priority Critical patent/JPS6457648A/en
Publication of JPS6457648A publication Critical patent/JPS6457648A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To prevent blister, exfoliation, etc., of wiring without arranging venting holes on an interlayer insulating film, by a method wherein, when a multilayer wiring is manufactured by using organic high-molecular material as an interlayer insulating film, plasma treatment using inactive gas is performed after through holes are formed. CONSTITUTION:When a multilayer interconnection is manufactured by using organic polymer material as an interlayer insulating film 3, plasma treatment using inactive gas is performed after through holes are formed. For example, a first aluminum wiring 2 is formed on a semiconductor substrate 1, polyimide resin is spread, which is cured by baking to form an interlayer insulating film 3, and then through holes are formed. By exposing the semiconductor substrate 1 to plasma generated in a plasma treating equipment, water content containing in the interlayer insulating film 3 is discharged, and at the same time, a fine bridging layer is formed on a surface layer. After the surface of the first aluminum wiring layer 2 exposed from through holes is treated by using sulfamine acid and the like, a second aluminum wiring 4 is formed.
JP21408887A 1987-08-27 1987-08-27 Manufacture of multilayer interconnection Pending JPS6457648A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21408887A JPS6457648A (en) 1987-08-27 1987-08-27 Manufacture of multilayer interconnection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21408887A JPS6457648A (en) 1987-08-27 1987-08-27 Manufacture of multilayer interconnection

Publications (1)

Publication Number Publication Date
JPS6457648A true JPS6457648A (en) 1989-03-03

Family

ID=16650031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21408887A Pending JPS6457648A (en) 1987-08-27 1987-08-27 Manufacture of multilayer interconnection

Country Status (1)

Country Link
JP (1) JPS6457648A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04257826A (en) * 1991-02-13 1992-09-14 Sharp Corp Manufacture of active matrix substrate
JP2005135929A (en) * 2001-02-19 2005-05-26 Semiconductor Energy Lab Co Ltd Formation method of light emitting device
US8497525B2 (en) 2001-02-19 2013-07-30 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing the same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04257826A (en) * 1991-02-13 1992-09-14 Sharp Corp Manufacture of active matrix substrate
JP2005135929A (en) * 2001-02-19 2005-05-26 Semiconductor Energy Lab Co Ltd Formation method of light emitting device
US8497525B2 (en) 2001-02-19 2013-07-30 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing the same
US8679875B2 (en) 2001-02-19 2014-03-25 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing the same
US8866184B2 (en) 2001-02-19 2014-10-21 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing the same
US9502679B2 (en) 2001-02-19 2016-11-22 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing the same
US9768405B2 (en) 2001-02-19 2017-09-19 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing the same
US9954196B2 (en) 2001-02-19 2018-04-24 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and method of manufacturing the same

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