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JPS6441329A - Frequency dividing circuit - Google Patents

Frequency dividing circuit

Info

Publication number
JPS6441329A
JPS6441329A JP19634487A JP19634487A JPS6441329A JP S6441329 A JPS6441329 A JP S6441329A JP 19634487 A JP19634487 A JP 19634487A JP 19634487 A JP19634487 A JP 19634487A JP S6441329 A JPS6441329 A JP S6441329A
Authority
JP
Japan
Prior art keywords
circuit
mixing
frequency division
signal
inverse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19634487A
Other languages
Japanese (ja)
Inventor
Masafumi Shigaki
Hiroshi Kurihara
Tamio Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP19634487A priority Critical patent/JPS6441329A/en
Publication of JPS6441329A publication Critical patent/JPS6441329A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To attain stable operation even at a high frequency region by feeding back a frequency division signal from a differentiation amplifying circuit receiving a complementary mixing signal from a mixing circuit to the mixing circuit, where said amplifying circuit mixes an input signal and a feedback frequency division signal and outputs a couple of mixture signals in the opposite phase relation to each other, and generates a frequency division signal to the mixing circuit. CONSTITUTION:The frequency division circuit consists of the mixing circuit 1 and the differential amplifying circuit 2, where frequency division output signals SO, the inverse of SO being in opposite phase relation from the differential amplifier circuit are fed back to the mixing circuit 1, and mixed with input signals SIN, the inverse of SIN each is in the opposite relation of the mixing circuit 1, and the two complementary mixing signals SX, the inverse of SX are applied as the differential input of the differential amplifier circuit 2. The mixing circuit 1 is connected with 1st-4th mixing elements 11-14. Thus, the frequency division circuit operated stably at the high frequency region, suitable for a monolithic IC and possible for multistage connection is formed.
JP19634487A 1987-08-07 1987-08-07 Frequency dividing circuit Pending JPS6441329A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19634487A JPS6441329A (en) 1987-08-07 1987-08-07 Frequency dividing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19634487A JPS6441329A (en) 1987-08-07 1987-08-07 Frequency dividing circuit

Publications (1)

Publication Number Publication Date
JPS6441329A true JPS6441329A (en) 1989-02-13

Family

ID=16356273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19634487A Pending JPS6441329A (en) 1987-08-07 1987-08-07 Frequency dividing circuit

Country Status (1)

Country Link
JP (1) JPS6441329A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007037212A1 (en) * 2005-09-28 2007-04-05 Nec Corporation Light receiving circuit and digital system
KR100804265B1 (en) * 2006-11-28 2008-02-18 한국단자공업 주식회사 Component integration box
KR100804264B1 (en) * 2006-11-28 2008-02-18 한국단자공업 주식회사 Component integration box
KR100826915B1 (en) * 2006-11-28 2008-05-06 한국단자공업 주식회사 Component integration box
WO2009033420A1 (en) * 2007-09-10 2009-03-19 The Hong Kong University Of Science And Technology Quadrature-input quadrature-output divider and phase locked loop, frequency synthesiser or single side band mixer

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007037212A1 (en) * 2005-09-28 2007-04-05 Nec Corporation Light receiving circuit and digital system
US8023832B2 (en) 2005-09-28 2011-09-20 Nec Corporation Light receiving circuit and digital system
JP4936071B2 (en) * 2005-09-28 2012-05-23 日本電気株式会社 Light receiving circuit and digital system
KR100804265B1 (en) * 2006-11-28 2008-02-18 한국단자공업 주식회사 Component integration box
KR100804264B1 (en) * 2006-11-28 2008-02-18 한국단자공업 주식회사 Component integration box
KR100826915B1 (en) * 2006-11-28 2008-05-06 한국단자공업 주식회사 Component integration box
WO2009033420A1 (en) * 2007-09-10 2009-03-19 The Hong Kong University Of Science And Technology Quadrature-input quadrature-output divider and phase locked loop, frequency synthesiser or single side band mixer

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