JPS6439644U - - Google Patents
Info
- Publication number
- JPS6439644U JPS6439644U JP13376687U JP13376687U JPS6439644U JP S6439644 U JPS6439644 U JP S6439644U JP 13376687 U JP13376687 U JP 13376687U JP 13376687 U JP13376687 U JP 13376687U JP S6439644 U JPS6439644 U JP S6439644U
- Authority
- JP
- Japan
- Prior art keywords
- ceramic frame
- strip
- strip lines
- package
- exposing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Waveguides (AREA)
Description
第1図は本考案にかかるICパツケージの斜視
図、第2図は第1図のB―B′,C―C′,D―
D′断面図、第3図は従来のICパツケージの斜
視図、第4図はそのA―A′断面図である。
図において、1,11はストリツプ線路の内部
リード、2は上部誘電体、3は下部誘電体、4は
金属基板、5は封止接着用金属板、6はストリツ
プ線路の外部リード、1Pは金メツキ部分、Hは
空隙、を示している。
Figure 1 is a perspective view of an IC package according to the present invention, and Figure 2 is B-B', CC', D- of Figure 1.
3 is a perspective view of a conventional IC package, and FIG. 4 is a sectional view taken along line AA'. In the figure, 1 and 11 are the inner leads of the strip line, 2 is the upper dielectric, 3 is the lower dielectric, 4 is the metal substrate, 5 is the metal plate for sealing adhesive, 6 is the outer lead of the strip line, and 1P is gold. The plating part and H indicate the void.
Claims (1)
備え、該セラミツク枠のストリツプ線路導入部に
該ストリツプ線路を表出させる部分的空隙が設け
られていることを特徴とする高周波ICパツケー
ジ。 1. A high-frequency IC package comprising a ceramic frame provided with a plurality of strip lines, and a partial gap for exposing the strip lines at the strip line introduction part of the ceramic frame.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13376687U JPS6439644U (en) | 1987-08-31 | 1987-08-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13376687U JPS6439644U (en) | 1987-08-31 | 1987-08-31 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6439644U true JPS6439644U (en) | 1989-03-09 |
Family
ID=31391930
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13376687U Pending JPS6439644U (en) | 1987-08-31 | 1987-08-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6439644U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0794912A (en) * | 1993-07-12 | 1995-04-07 | Nec Corp | Loading structure of microwave circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54117683A (en) * | 1978-03-06 | 1979-09-12 | Nec Corp | Package for semiconductor device |
-
1987
- 1987-08-31 JP JP13376687U patent/JPS6439644U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54117683A (en) * | 1978-03-06 | 1979-09-12 | Nec Corp | Package for semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0794912A (en) * | 1993-07-12 | 1995-04-07 | Nec Corp | Loading structure of microwave circuit |
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