[go: up one dir, main page]

JPS6429957A - Serial interface circuit - Google Patents

Serial interface circuit

Info

Publication number
JPS6429957A
JPS6429957A JP62185904A JP18590487A JPS6429957A JP S6429957 A JPS6429957 A JP S6429957A JP 62185904 A JP62185904 A JP 62185904A JP 18590487 A JP18590487 A JP 18590487A JP S6429957 A JPS6429957 A JP S6429957A
Authority
JP
Japan
Prior art keywords
data
output
internal bus
flop
reception
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62185904A
Other languages
Japanese (ja)
Other versions
JPH053023B2 (en
Inventor
Masayuki Endo
Yasushi Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62185904A priority Critical patent/JPS6429957A/en
Publication of JPS6429957A publication Critical patent/JPS6429957A/en
Publication of JPH053023B2 publication Critical patent/JPH053023B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To send an acknowledge signal via an internal bus after the reception of data, by providing a data latch which sets the output of a shift register and the data from the internal bus as input and can output those data selectively. CONSTITUTION:The data latch 13 is provided which sets the output (i) of a D-type flip-flop 10 and the data (h) from a CPU via the internal bus 20 as the input I1 and I2, respectively, and performs three operations: the delivery of Q output with the same phase as that of the output (i) of the D-type flip-flop, the holding of a previous state, and the delivery of the Q output with the same phase as that of the data (h) from the internal bus 20, by the levels of a control signal (clock signal) phi1 and a control signal phi2 inputted from the CPU separately. Then, the output of the shift register and the data from the internal bus are outputted selectively. In such a way, it is possible to send the acknowledge signal from the internal bus after the reception of the data.
JP62185904A 1987-07-24 1987-07-24 Serial interface circuit Granted JPS6429957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62185904A JPS6429957A (en) 1987-07-24 1987-07-24 Serial interface circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62185904A JPS6429957A (en) 1987-07-24 1987-07-24 Serial interface circuit

Publications (2)

Publication Number Publication Date
JPS6429957A true JPS6429957A (en) 1989-01-31
JPH053023B2 JPH053023B2 (en) 1993-01-13

Family

ID=16178917

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62185904A Granted JPS6429957A (en) 1987-07-24 1987-07-24 Serial interface circuit

Country Status (1)

Country Link
JP (1) JPS6429957A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105980301B (en) 2014-02-05 2018-03-06 电化株式会社 The manufacture method and carbon nano-fiber of carbon nano-fiber

Also Published As

Publication number Publication date
JPH053023B2 (en) 1993-01-13

Similar Documents

Publication Publication Date Title
ES2004148A6 (en) LOOK AHEAD TERMINAL COUNTER and method for generating a terminal count output signal.
JPS6429957A (en) Serial interface circuit
JPS6429956A (en) Serial interface circuit
JPS6412328A (en) Interface for printer
JPS54107629A (en) Key input unit
JPS5595155A (en) Operation check system for counter
JPS551735A (en) Synchronism detection circuit
JPH01128152A (en) Serial i/o circuit
JPS57125425A (en) System for information transmission
JPS5498149A (en) Microprocessor
KR900003664B1 (en) Control circuit of modem
KR880002793Y1 (en) Synchronization signal supply circuit of a plurality of microprocessors
JPS57116431A (en) Programmable logic array
JPS6417515A (en) Phase comparator
JPS5685127A (en) Digital signal processor
SU903865A1 (en) Controllable arithmetic module
KR900004864B1 (en) The circuit of generation of 1bit to 4bit data clock
JPS54122944A (en) Logic circuit
JPS6455647A (en) Interruption unit for sequencer
JPS5629892A (en) Clear control circuit
JPS54109733A (en) Synchronous control system for interface device
JPS5677991A (en) Shift register circuit
JPS5564456A (en) Error code generating circuit
JPS6459449A (en) Asynchronous signal synchronizing circuit
JPS6448160A (en) Serial interface control system

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees