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JPS6422049A - Method for forming solder bump - Google Patents

Method for forming solder bump

Info

Publication number
JPS6422049A
JPS6422049A JP62179508A JP17950887A JPS6422049A JP S6422049 A JPS6422049 A JP S6422049A JP 62179508 A JP62179508 A JP 62179508A JP 17950887 A JP17950887 A JP 17950887A JP S6422049 A JPS6422049 A JP S6422049A
Authority
JP
Japan
Prior art keywords
substrate
solder balls
plate
superposed
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62179508A
Other languages
Japanese (ja)
Inventor
Kiyokazu Moriizumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62179508A priority Critical patent/JPS6422049A/en
Publication of JPS6422049A publication Critical patent/JPS6422049A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To reduce the number of steps and to improve the reliability by positioning a substrate on which a plate is superposed close to the upper surface of a table on which solder balls are arranged, and causing the solder balls to be attracted to hold the solder balls on the respective pads. CONSTITUTION:A solder flux 7 is applied on the respective pads 2 of a substrate 1 to form a film having a predetermined thickness, a plate 3 is superposed on the surface of the substrate 1 and engaged by a clamp 13 so that a predetermined spacing S is formed between the substrate 1 and the plate 3. By reversing the clamped substrate 1 on a table 6 on which solder balls 5 are arranged, the substrate 1 is superposed so that the plate 3 side is positioned close to the upper surface of the table 6, and a charge of +V is applied to the substrate l and a charge of -V is applied to the table 6. The attracted solder balls 5 are held by the tack strength of the solder flux applied on the pads 2. Then, by reversing the clamped substrate 1 to cause it to depart from the upper surface of the table 6, the solder balls 5 are inserted into the respsective throughholes 4.
JP62179508A 1987-07-17 1987-07-17 Method for forming solder bump Pending JPS6422049A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62179508A JPS6422049A (en) 1987-07-17 1987-07-17 Method for forming solder bump

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62179508A JPS6422049A (en) 1987-07-17 1987-07-17 Method for forming solder bump

Publications (1)

Publication Number Publication Date
JPS6422049A true JPS6422049A (en) 1989-01-25

Family

ID=16067031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62179508A Pending JPS6422049A (en) 1987-07-17 1987-07-17 Method for forming solder bump

Country Status (1)

Country Link
JP (1) JPS6422049A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6042953A (en) * 1996-03-21 2000-03-28 Matsushita Electric Industrial Co., Ltd. Substrate on which bumps are formed and method of forming the same
US6095398A (en) * 1997-06-02 2000-08-01 Nec Corporation Solder ball arrangement device
US7891538B2 (en) * 2008-05-15 2011-02-22 International Business Machines Corporation Techniques for arranging solder balls and forming bumps

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6042953A (en) * 1996-03-21 2000-03-28 Matsushita Electric Industrial Co., Ltd. Substrate on which bumps are formed and method of forming the same
US6095398A (en) * 1997-06-02 2000-08-01 Nec Corporation Solder ball arrangement device
US6378756B1 (en) 1997-06-02 2002-04-30 Nec Corporation Solder ball arrangement device
US7891538B2 (en) * 2008-05-15 2011-02-22 International Business Machines Corporation Techniques for arranging solder balls and forming bumps

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