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JPS6414800A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS6414800A
JPS6414800A JP62171537A JP17153787A JPS6414800A JP S6414800 A JPS6414800 A JP S6414800A JP 62171537 A JP62171537 A JP 62171537A JP 17153787 A JP17153787 A JP 17153787A JP S6414800 A JPS6414800 A JP S6414800A
Authority
JP
Japan
Prior art keywords
spare
line
information reading
rrd
rcd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62171537A
Other languages
Japanese (ja)
Inventor
Masaaki Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62171537A priority Critical patent/JPS6414800A/en
Publication of JPS6414800A publication Critical patent/JPS6414800A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

PURPOSE:To obtain a semiconductor memory device having an error correcting circuit reducing the loss of an area and having highly reliable redundancy constitution by connecting a line information reading line and a row information reading line to each spare bit line. CONSTITUTION:The spare information reading lines RRD, RCD are inputted to parity forming circuits 3, 4 together with original information reading lines RD, CD from the 1st stage, and when the reading lines RRD, RCD are not used, their potential is set up to logic 'O'. Since a spare bit line RBL is not used, a spare line selecting signal RSR and a spare column selecting signal RSC are not activated, a switch circuit 5 is not opened and the information of the spare bit line RBL is not transmitted to the spare line information reading line RRD and the spare row information reading line RCD. In case of using the spare information reading lines RRD, RCD, the potential of the reading information reading lines RD, CD for reading out the information of the bit line BL to be replaced is set up to logic 'O' to obtain correct parity.
JP62171537A 1987-07-08 1987-07-08 Semiconductor memory device Pending JPS6414800A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62171537A JPS6414800A (en) 1987-07-08 1987-07-08 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62171537A JPS6414800A (en) 1987-07-08 1987-07-08 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS6414800A true JPS6414800A (en) 1989-01-18

Family

ID=15924963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62171537A Pending JPS6414800A (en) 1987-07-08 1987-07-08 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6414800A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5227999A (en) * 1990-04-19 1993-07-13 Sharp Kabushiki Kaisha Semiconductor memory device capable of replacing faulty bit lines with redundant bit lines
JP2006199419A (en) * 2005-01-20 2006-08-03 Mitsubishi Electric Corp Elevator device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5227999A (en) * 1990-04-19 1993-07-13 Sharp Kabushiki Kaisha Semiconductor memory device capable of replacing faulty bit lines with redundant bit lines
JP2006199419A (en) * 2005-01-20 2006-08-03 Mitsubishi Electric Corp Elevator device

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