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JPS6414653A - Input/output controller system - Google Patents

Input/output controller system

Info

Publication number
JPS6414653A
JPS6414653A JP17041687A JP17041687A JPS6414653A JP S6414653 A JPS6414653 A JP S6414653A JP 17041687 A JP17041687 A JP 17041687A JP 17041687 A JP17041687 A JP 17041687A JP S6414653 A JPS6414653 A JP S6414653A
Authority
JP
Japan
Prior art keywords
channel
input
reception
transmission
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17041687A
Other languages
Japanese (ja)
Inventor
Minoru Mahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17041687A priority Critical patent/JPS6414653A/en
Publication of JPS6414653A publication Critical patent/JPS6414653A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To prevent time required for transmission and reception of a signal between input/output controllers, from being influenced by the processing time of a channel interface, by executing independently the transmission and reception of the signal between the input/output controllers, and the transmission and reception of the signal of the channel interface. CONSTITUTION:Each input/output controller 1, 2 is provided with channel connecting parts 11, 21 connected to channel devices 4, 6, and channel connection control parts 12, 23 for controlling an operation between the channel devices, 4, 6 by an instruction of microprocessors 14, 24, and each channel connecting part 11, 21 is connected to the channel connection control parts 13, 23 of a first and second input/output controllers 1, 2. The channel connection control parts 13, 23 are provided with a counter for bringing the number of data requests to the channel devices 4, 6 to an increase count, and bringing the number of responses from the channel devices 4, 6 to a decrease count, execute a precedence request to the channel connecting parts 11, 21, when the counter is below a prescribed value, and the channel connecting parts 11, 21 execute a confirmation response of an interface. In such a ways, the time required for transmission and reception of a signal between the input/output controllers is not influenced by the processing time of a channel interface.
JP17041687A 1987-07-08 1987-07-08 Input/output controller system Pending JPS6414653A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17041687A JPS6414653A (en) 1987-07-08 1987-07-08 Input/output controller system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17041687A JPS6414653A (en) 1987-07-08 1987-07-08 Input/output controller system

Publications (1)

Publication Number Publication Date
JPS6414653A true JPS6414653A (en) 1989-01-18

Family

ID=15904520

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17041687A Pending JPS6414653A (en) 1987-07-08 1987-07-08 Input/output controller system

Country Status (1)

Country Link
JP (1) JPS6414653A (en)

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