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JPS6412707A - Bias circuit in monolithic microwave integrated circuit - Google Patents

Bias circuit in monolithic microwave integrated circuit

Info

Publication number
JPS6412707A
JPS6412707A JP16915587A JP16915587A JPS6412707A JP S6412707 A JPS6412707 A JP S6412707A JP 16915587 A JP16915587 A JP 16915587A JP 16915587 A JP16915587 A JP 16915587A JP S6412707 A JPS6412707 A JP S6412707A
Authority
JP
Japan
Prior art keywords
positive voltage
terminal
ground
positive
microwave integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16915587A
Other languages
Japanese (ja)
Inventor
Takamitsu Kitayama
Naoki Okamoto
Masao Miyazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP16915587A priority Critical patent/JPS6412707A/en
Publication of JPS6412707A publication Critical patent/JPS6412707A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent a monolithic microwave integrated circuit from being damaged, by grounding a negative voltage supplying terminal, connecting a resistor and a capacitor in parallel between a ground terminal and the ground, and obtaining the optimum positive and negative voltages by supplying a power source only from a positive voltage supplying terminal. CONSTITUTION:A positive voltage stabilization circuit 7 is connected to the positive voltage supplying terminal 2, and a positive voltage supplied from the outside to a terminal (positive voltage) 8 is converted to the optimum positive voltage by the positive voltage stabilization circuit 7, then, it is supplied to the monolithic microwave integrated circuit (MMIC) 1. Also, the resistor 11 and the capacitor 12 are connected in parallel between the ground terminal 4 and the ground, and the ground terminal 4 is set at positive potential by the positive voltage supplied to the MMIC1 by permitting a current to flow on the resistor 11, and also, the current by a high frequency signal is bypassed through the capacitor 12. In such a way, the negative voltage supplying terminal 3 is biased at negative potential equivalent to the ground terminal 4, and a bias voltage is applied on the MMIC1.
JP16915587A 1987-07-07 1987-07-07 Bias circuit in monolithic microwave integrated circuit Pending JPS6412707A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16915587A JPS6412707A (en) 1987-07-07 1987-07-07 Bias circuit in monolithic microwave integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16915587A JPS6412707A (en) 1987-07-07 1987-07-07 Bias circuit in monolithic microwave integrated circuit

Publications (1)

Publication Number Publication Date
JPS6412707A true JPS6412707A (en) 1989-01-17

Family

ID=15881305

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16915587A Pending JPS6412707A (en) 1987-07-07 1987-07-07 Bias circuit in monolithic microwave integrated circuit

Country Status (1)

Country Link
JP (1) JPS6412707A (en)

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