JPS6411360A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS6411360A JPS6411360A JP62166782A JP16678287A JPS6411360A JP S6411360 A JPS6411360 A JP S6411360A JP 62166782 A JP62166782 A JP 62166782A JP 16678287 A JP16678287 A JP 16678287A JP S6411360 A JPS6411360 A JP S6411360A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- groove
- shaped capacitor
- connection part
- gate electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
Landscapes
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To simplify a manufacturing process and to reduce an area of a cell by a method wherein a word line of a memory cell having a groove-shaped capacitor is formed by a first conductive layer and a connection part between the groove-shaped capacitor and a switching MOS transistor is formed by a second conductive layer. CONSTITUTION:After a groove-shaped capacitor having an accumulation electrode 38 and a capacitor insulating film 37 has been formed, an insulating film 39 is formed only on the surface. Gate electrodes 40a, 40b, 40c are processed together with an insulating film 41 and are formed; after that, source-drain impurity regions 42a, 42b are formed. Then, an insulating film is applied; an insulating film 43' is left only on side walls of the gate electrodes 40a, 40b, 40c; a connection part 44a is formed. It is possible to remove the insulating film on the source-drain impurity region 42b and on the accumulation electrode 38 in a self-aligned manner; it is possible to simplify a manufacturing process. In addition, it is possible to make a layout without keeping an interval between the connection part 44a and the gate electrodes 40a and 40b; it is possible to reduce a distance between the gate electrode 40a and a groove-shaped capacitor 10a to a minimum; an area of a cell can be reduced.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62166782A JPS6411360A (en) | 1987-07-06 | 1987-07-06 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62166782A JPS6411360A (en) | 1987-07-06 | 1987-07-06 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6411360A true JPS6411360A (en) | 1989-01-13 |
Family
ID=15837578
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62166782A Pending JPS6411360A (en) | 1987-07-06 | 1987-07-06 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6411360A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0629485A (en) * | 1992-03-30 | 1994-02-04 | Toshiba Corp | Semiconductor device and manufacture thereof |
JPH06252359A (en) * | 1993-03-01 | 1994-09-09 | Toshiba Corp | Manufacture of semiconductor device |
US5410169A (en) * | 1990-02-26 | 1995-04-25 | Kabushiki Kaisha Toshiba | Dynamic random access memory having bit lines buried in semiconductor substrate |
KR100292279B1 (en) * | 1997-07-22 | 2001-09-17 | 다니구찌 이찌로오, 기타오카 다카시 | Semiconductor device and its manufacturing method |
-
1987
- 1987-07-06 JP JP62166782A patent/JPS6411360A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5410169A (en) * | 1990-02-26 | 1995-04-25 | Kabushiki Kaisha Toshiba | Dynamic random access memory having bit lines buried in semiconductor substrate |
JPH0629485A (en) * | 1992-03-30 | 1994-02-04 | Toshiba Corp | Semiconductor device and manufacture thereof |
US5691550A (en) * | 1992-03-30 | 1997-11-25 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US5959324A (en) * | 1992-03-30 | 1999-09-28 | Kabushiki Kaisha Toshiba | Semiconductor device including an improved terminal structure |
JPH06252359A (en) * | 1993-03-01 | 1994-09-09 | Toshiba Corp | Manufacture of semiconductor device |
KR100292279B1 (en) * | 1997-07-22 | 2001-09-17 | 다니구찌 이찌로오, 기타오카 다카시 | Semiconductor device and its manufacturing method |
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