JPS639684B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention performs frequency conversion twice in the signal receiving system (although it may be done more than once, it will be referred to as twice for simplicity below).
Regarding a receiving device using a double super reception method, when the first and second local oscillators are finely frequency controlled by a phase-locked loop (hereinafter referred to as PLL) circuit, it is particularly important to The present invention relates to a PLL synthesizer receiving device that can easily suppress two image signal frequencies and realize this at low cost.

Conventionally, this type of receiver extracts the signal frequency from a high frequency input terminal 1 using a filter 2, and converts the frequency of this output using a first local oscillator 9 for coarse tuning and a first mixer 3, as shown in FIG. Then, the first intermediate frequency is taken out by the first intermediate frequency filter 4, the output thereof is frequency-converted by the second mixer 5 by fine adjustment of the output frequency of the second local oscillator 10, and the second intermediate frequency is extracted by the second intermediate frequency filter 6. The intermediate frequency is extracted, sufficiently amplified by the second intermediate frequency amplifier 7, and then outputted to the second intermediate frequency output terminal 8. In this type of receiver, the coarse tuning frequency interval Δ of the output frequency _V1 of the first local oscillator 9 and the second
Attempts have also been made to equalize the frequency range Δ that can be finely tuned with the output frequency _V2 of the local oscillator 10, and to link the two to receive a desired reception band.

In such a receiver, for example, the first intermediate frequency _I1 is set to a frequency higher than the upper limit frequency of the desired shortwave reception band 1.6 to 30 MHz, and the second intermediate frequency _I2 is set to 455 KHz, which is sufficiently lower than the first intermediate frequency.
etc., the first and second image signal frequencies _in1 and _in2 are simultaneously received in addition to the desired signal frequency _s through the first and second frequency conversion. The degree of suppression (image ratio) of the first and second image signal frequencies _in1 and _in2 varies depending on the quality of the filter characteristics of the filter 2 and the first intermediate frequency filter 4 at the input of the first mixer 3 and the second mixer 5. different. Among these, the first image signal frequency _in1 becomes _s +2 _I1 , which is a frequency sufficiently higher than the upper limit frequency of the desired reception band, so that a sufficient first image ratio can be obtained by using the filter 2 as a simple low-pass filter or the like. But the second
The image signal frequency _in2 is always _I1 −2 _I2 , and the first
In order to finely tune the output frequency _v2 of the second local oscillator 10, which exists near the intermediate frequency _I1 and converts it to the second intermediate frequency _I2 , it must change by Δ, so _I1 and _in2 are _I1 − _in2 = 2 _I
2
Δ changes depending on the relationship.

In other words, the first intermediate frequency _I1
The characteristics of the first intermediate frequency filter that sufficiently suppresses the second image signal frequency _in2 , with the pass frequency being Δnax, is that the maximum frequency range Δ _nax in which the second local oscillation frequency can be finely tuned must be equal to the pass band, and a second image signal frequency existing nearby
In order to sufficiently suppress _in2 , an expensive filter such as a crystal filter must be used, and this has been a major factor in increasing the cost of the receiver. Further, since the first and second local oscillation frequencies also use variable capacitors as frequency variable elements, the frequency stability is not sufficient.

The present invention overcomes these conventional drawbacks.
It provides a PLL synthesizer receiver.

FIG. 2 shows an embodiment of the present invention. In FIG. 2, a desired signal from a high frequency input terminal 1 is passed through a filter 2 to sufficiently suppress the first image signal frequency, and then sent to the output of a first local oscillator 13 and a mixer 3 to generate a first intermediate frequency signal and a second image signal. The first intermediate frequency signal is selected by passing through a variable first intermediate frequency filter 11 and a variable trap circuit 12, which will be described later. and is extracted as a second intermediate frequency signal via the second intermediate frequency filter 6.

On the other hand, one of the outputs of the first local oscillator 13 is composed of a variable frequency divider, a reference frequency generator (output frequency _F1 ), a phase comparator, a reduction filter, and the like. is supplied to the PLL circuit 14, and is supplied to the tuning control section 21.
The output frequency of the first local oscillator 13 is controlled to be _NF1 by the frequency division ratio code N output from the PLL circuit 14 and the control output of the PLL circuit 14. This is the first
1PLL circuit 22.

Also, one of the outputs of the oscillator 15 is connected to the PLL circuit 16.
The oscillator 15 is supplied to the oscillator 15 by the division ratio code n outputted from the channel selection control section 21 and the control output of the PLL circuit 16 in the same manner as described for the first PLL circuit 22 above.
The frequency of is controlled to be NF ₂ (where F ₂ is the output frequency of the reference frequency generation circuit forming the PLL circuit 16). This will be referred to as the second PLL circuit 23. Further, one of the outputs of the oscillator 15 is frequency-divided by 1/M by the fixed frequency divider 17, mixed with the output frequency _x of the reference frequency oscillator 19 by the mixer 18, and frequency-converted. However, only the frequency components (hereinafter referred to as the sum for simplicity) are extracted and supplied to the second mixer 5 in the signal path. That is, the output of the oscillator 15 is not directly used as the second local oscillation frequency, but is used as the second local oscillator 24 after being divided into 1/M. Therefore, the minimum frequency interval at which the second local oscillation frequency can change is equal to 1/M of the minimum frequency interval that can be locked by the second PLL circuit 23, and if a microcomputer or the like is used for the tuning control section 21, Interlocking control of the oscillation frequencies of the first PLL circuit 22 and the second PLL circuit 23 can be easily realized.

The above explanation can be summarized using mathematical formulas as follows.

The first local oscillation frequency is NF ₁ The second local oscillation frequency is _x + nF ₂ /M Also, the minimum frequency interval that allows coarse tuning of the first local oscillation frequency is equal to the maximum frequency range ΔF that allows fine tuning of the second local oscillator 24. Therefore, ΔF=F ₁ =(n _nax −n _nio )F ₂ /M (where n _nax ·n _nio are the maximum and minimum frequency division ratios supplied to the second PLL circuit 23).

From this, the relationship between the desired signal frequency _s and the first and second image frequencies _in1 and _in2 is as follows. That is, if _s = NF ₁ - _I1 and _I1 = ( _x + nF ₂ /M) + _I2 ... (1), then _s becomes _s = NF ₁ - ( _x + nF ₂ /M + _I2 ) ... (2). On the other hand, since _in1 = _s + 2 _I1 , _in1 becomes _in1 = _s + 2 ( _x + nF ₂ /M + _I2 ) ... (3). On the other hand, since _in2 is _in2 = _I1 - 2 _I2 , _in2 becomes _in2 = ( _x + nF ₂ /M) - _I2 (4).

Here, the first image signal frequency is a high frequency as shown in equation (3), and can be sufficiently suppressed by the filter 2 such as a simple low-pass filter. On the other hand, in the second mixer 5, the first intermediate frequency ( _x + nF ₂ /M) + I2, which is frequency-converted to the second intermediate frequency _I2 by the output frequency x + nF 2 /M of the second local oscillator 24, and the first intermediate frequency ( _x + nF ₂ /M) + _I2 , which becomes an interference wave, are 2
Image signal frequency ( _x + nF ₂ /M) − _I2 is simple LC
Variable first intermediate frequency filter 11 configured by tuning
Select and tune in. However, the second image signal is output without being sufficiently suppressed. Therefore, by passing the output containing the second image signal frequency through the variable trap circuit 12, the second image signal frequency can be sufficiently pressed steeply without affecting the first intermediate frequency signal. This trap circuit 12
This can be easily realized using a bridge T-type trap made of LC.

Furthermore, by finely tuning the second local oscillation frequency, the first intermediate frequency signal and second image signal frequency can also be adjusted.
Since the frequency changes as shown in equations (2) and (4), the passing frequency of the variable first intermediate frequency filter 11 and the blocking frequency of the variable trap circuit 12 must also be varied in accordance with the changes. Therefore, the control voltage of the PLL circuit 16 which controls the frequency of the oscillator 15 is utilized and applied to the variable first intermediate frequency filter 11 and the variable trap circuit 12 to control them in conjunction. Here, a varactor diode similar to the frequency variable element constituting the oscillator 15 may be used as the variable frequency element of the variable first intermediate frequency filter 11 and the variable trap circuit 12.

As described above, according to the present invention, the oscillator control output of the PLL circuit constituting the second PLL circuit is supplied to the variable intermediate frequency filter to selectively tune the first intermediate frequency.
Since the interference second image signal frequency is removed, the second image signal frequency can be easily suppressed sufficiently with a simple configuration.
Furthermore, since both the first and second local oscillators are configured with PLLs, it is possible to configure a receiver with excellent frequency stability, and the minimum interval between variable frequencies is also the same as that of F ₁ , F 2 and F ₂ described above. It has the great feature that it can be made arbitrarily fine by M.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional example, and FIG. 2 is a block diagram showing an embodiment of a PLL synthesizer receiver according to the present invention. 13...first local oscillator, 15...oscillator, 2
2...First PLL circuit, 23...Second PLL circuit, 1
1... variable first intermediate frequency filter, 12... variable trap, 18... mixer, 17... fixed frequency divider, 19... reference frequency oscillator, 21... channel selection control section.

Claims (1)

[Claims] 1 The first phase-locked loop circuit controlled by the first phase-locked loop circuit.
The high frequency input signal frequency is converted into a first intermediate frequency by the output of the oscillation circuit, and the output of the second oscillation circuit controlled by the second phase-locked loop circuit is divided by a fixed frequency divider. The first intermediate frequency is converted into a second intermediate frequency using the output of the mixer that converts the frequency of the divided output, and the output of the second oscillation circuit is converted into a variable frequency of the second phase-locked loop circuit. The output of the second phase-locked loop is supplied to a frequency divider to control the frequency of the second oscillation circuit, and the control voltage at the downstream stage of the low-pass filter of the second phase-locked loop circuit is used. A PLL synthesizer receiving device characterized in that the frequency characteristics of a variable intermediate frequency filter or a variable trap circuit inserted in a signal path are controlled in conjunction with each other.