JPS6381537A - Computer system - Google Patents

Abstract

PURPOSE:To attain a complete resumption function by allowing a CPU to read a required data via its copying register at reapplication of power supply through the provision of the copying register. CONSTITUTION:When a power interruption request comes, the program is intermitted and the required data are saved in a nonvolatile memory. In such a computer system, the system has a register being indispensable of execution of continuance of the program and storing the data relating to the hardware state disabled to read by the CPU. That is, together with all registers of the CPU 11 just before the power interruption, the contents of the input/output registers 13, 14 built in a peripheral control LSI are saved. In this case, the CPU 11 reads the contents of each register and writes them into the nonvolatile memory. When the CPU executes the read instruction to the write only input/ output register built in the peripheral control LSI, the data are read from a copying register 16. In case of the reapplication of power, all data saved in the nonvolatile memory are restored to the original state.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a computer system configured with a micro CPU and a memory peripheral control LSI.

(Prior Art) In an electronic device whose memory contents are backed up by a battery, all states necessary for the currently running program are retained even when the power is turned off, and the program continues to be executed when the power is turned on again. There are some that have the ability to do this.

Here, this function is referred to as a resume function (Resume), and the following explanation will be given. In order to realize this function, it is necessary to maintain the contents of all registers used by the program being executed.

By the way, in many conventional devices of this type, this is achieved by retaining only the contents of registers held by the CPU. However, in this case, the state of the circuit that controls peripheral input/output devices connected to the CPUK is not maintained, and therefore a complete resume function is not provided. In order to hold the control circuits of peripheral input/output devices, it is necessary to hold data indicating their control states, similar to the registers of the CPU.

The system configuration of this type of device is shown in FIG. In the figure, 33
．． 34 is an input/output control device (IOC), which is composed of a commercially available LSI for input/output control. These can be controlled by input/output commands issued from CPUJJ. The memory 32 is a non-volatile memory that receives power from a main power source (not shown) when the power is on, receives power from a backup power source such as a battery (not shown) when the power is off, and can retain its stored data even when the power is off. It is.

The CPUJJ and input/output control devices 33 and 34 are supplied with power only from the main power source, and are not backed up when the power is turned off.

(Problems to be Solved by the Invention) Recently, with the progress of semiconductor technology, microcomputers, memories, and LSIs for peripheral control have become available at low cost. By appropriately combining these components, a relatively high-performance computer system can be constructed. The peripheral control LSI is controlled by an input/output register that can be accessed by an input/output (INPUTloUTPUT) command from the CPU. Therefore, by retaining the data in the input/output registers built into these peripheral control LSIs, the status of not only the CPU but also the input/output devices can be retained, making it possible to maintain a complete resume function (when the power is turned on, the A function that allows the program to continue running as it is when the program is turned off can be realized. However, many L8Is for peripheral control have input/output registers exclusively used for prerequisites. If there is such an input/output register, when the power is turned off, the CPU cannot read the contents of the input/output register (S included only) of the control tlLsI and save it in memory, so the state of the LSI cannot be saved. It is impossible to hold it completely.

The present invention has been made based on the above circumstances, and an object of the present invention is to provide a computer system that realizes a more complete resume function.

[Structure of the invention]

(Means for Solving the Problems) When backing up (saving) the input/output registers built into a peripheral control LSI onto a non-volatile memory, the present invention provides for In addition to the possible input/output registers, it is also possible to back up input/output registers dedicated to loading, thereby realizing a complete resume function. When writing data to the output register (which the CPU can read and cine), the same data is also written to the newly added copy register, and when the power is turned on again, the CPU reads the data and continues executing the program. This is what I did.

(Function) In the above configuration, immediately before the power is turned off, the contents of the input/output registers built into the peripheral control LSI are saved together with all the registers of the CPU. At this time, the CPU reads the contents of each register and writes them to nonvolatile memory. Here, when the CPU executes a continuation instruction to the write-only input/output register built into the peripheral control LSI, the data is read from the copy register. When the power is turned on again, all data saved in nonvolatile memory is restored to its original state. As a result, a program that was interrupted due to a power cut request can be re-executed from that state. This makes it possible to realize a complete resume function.

(Example) Hereinafter, examples of the present invention will be described in detail using the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention.

In the figure, 11 is a microprocessor (μCPU) J
J is a memory, 13.14 is a peripheral control LSI, and a computer system is constructed by connecting these components in common to the input/output bus 15. In the present invention, the input/output register file 16 is further connected to this input/output bus 151C. LS11 for peripheral control
Among the input/output registers built into 3.14, there is a write-only input/output register. The externally connected input/output register file 16 is a circuit block provided to copy these write-only input/output registers and enable the micro CPU II to read the data. Specifically, when the microprocessor 9-11 executes all output instructions to the write-only input/output registers built into the peripheral control LS113 and 14, the write data from the microprocessor Tuna 1 is transferred to the write-only input/output registers. It is also written to the corresponding input/output register location in the input/output register file 16 at the same time as the register.

This input/output register file 16 can be read as well as written.

FIG. 2 is a flowchart showing the operation of the embodiment of the present invention.

The operation of the embodiment shown in FIG. 1 will be described in detail below with reference to the flowchart shown in FIG. Power supply O
Immediately before the FF, the contents of the input/output registers built into the peripheral control LS 113.14 are saved along with all the registers built into the microprocessor 11. At this time,
Microprocessor 11 reads the contents of each register and writes them to non-volatile memory. Normally, it is written to the stack location in the memory 12 indicated by the stack point of the microprocessor file. Here, if the microprocessor 1 inputs an instruction (read instruction) to the glance-only input/output register built into the peripheral control LS113.14,
When executed, the data is sent to peripheral control LS113.14.
K is read from the input/output register file 16 rather than from the input/output register file 16.

When the power is turned on (returned on), all data saved on the nonvolatile memory 12 is returned to its original state.

A program that was interrupted due to a power-off request can now be re-executed from that state. Here, the state of not only the microprocessor 11 but also the peripheral input/output control circuits can be re-executed.

〔Effect of the invention〕

According to the present invention as explained above, when the power is turned on again, the CPU
Since it is possible to return other peripheral control LSIs to the state immediately before the power was turned off, the program can continue to be executed, and a complete resume function can be realized. .

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention. FIG. 2 is a flowchart showing the operation of the embodiment of the present invention, and FIG. 3 is a block diagram showing an example of the construction of a conventional computer system. 11... Microprocessor (μCPU), 12...
・Memory, 13, 14... Peripheral control LSI, J5・
...I/O bus, 16...I/O register file. Applicant's agent Patent attorney Takehiko Suzue 1/l) 1
1102 Figure 1 Figure 3 Figure 2 Cap OFF

Claims (1)

[Claims] A computer system that suspends a currently running program when a power-off request is received, and saves data related to the hardware state necessary for continuing execution of the program when the power is turned on again to a nonvolatile memory, The computer system includes a register that is essential for the continued execution of the program and holds data related to the hardware state that cannot be read by the CPU, and a copying register that is added when the CPU writes data to the register. Write the same data to the register, and when the power is turned on again, the CPU
A computer system that reads necessary data through its copying register and continuously executes a program.