JPS6371579U - - Google Patents
Info
- Publication number
- JPS6371579U JPS6371579U JP16575486U JP16575486U JPS6371579U JP S6371579 U JPS6371579 U JP S6371579U JP 16575486 U JP16575486 U JP 16575486U JP 16575486 U JP16575486 U JP 16575486U JP S6371579 U JPS6371579 U JP S6371579U
- Authority
- JP
- Japan
- Prior art keywords
- circuit boards
- circuit board
- conductive patterns
- utility
- model registration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012528 membrane Substances 0.000 claims description 5
- 125000006850 spacer group Chemical group 0.000 claims description 4
- 238000010030 laminating Methods 0.000 claims 1
Description
第１図は本考案の一実施例の部分分解斜視図、
第２図は本考案をキースイツチに適用した実施例
の部分分解斜視図である。
１……マウンテイングプレート、２，３，４…
…メンブレンシート、５……絶縁性スペーサ、６
……メンブレンシート、７……上蓋板、８……導
電ゴム、９……コイルバネ、１１……マウントプ
レート、１２……メンブレンシート、１３……絶
縁性スペーサ、１４……メンブレンシート、１５
……ラバーシート、１６……ハウジング、１７…
…キートツプ。
FIG. 1 is a partially exploded perspective view of an embodiment of the present invention;
FIG. 2 is a partially exploded perspective view of an embodiment in which the present invention is applied to a key switch. 1...Mounting plate, 2, 3, 4...
... Membrane sheet, 5 ... Insulating spacer, 6
... Membrane sheet, 7 ... Top cover plate, 8 ... Conductive rubber, 9 ... Coil spring, 11 ... Mount plate, 12 ... Membrane sheet, 13 ... Insulating spacer, 14 ... Membrane sheet, 15
...Rubber sheet, 16...Housing, 17...
...keytop.
Claims (1)
メンブレンシート、フレキシブルプリント基板等
の回路基板を複数枚積層し、これら上下の回路基
板間に介装された他の回路基板や絶縁性スペーサ
には上下の回路基板の各導電パターンに対応する
位置に穴を開設し、前記上下の回路基板の導電パ
ターンをこの穴を通して電気的に接続したことを
特徴とする回路基板の多層化構造。 (2) 他の回路基板や絶縁性スペーサに設けた穴
内に弾性の導電部材を介装し、この導電部材を介
して上下の回路基板の各導電パターンを電気接続
してなる実用新案登録請求の範囲第１項記載の回
路基板の多層化構造。 (3) 上下の回路基板のいずれか一方の導電パタ
ーン部位を、他方の回路基板に向けて弾性変形さ
せ、前記穴を通して両導電パターンを直接接触さ
せてなる実用新案登録請求の範囲第１項記載の回
路基板の多層化構造。[Claims for Utility Model Registration] (1) Other circuit boards made by laminating multiple circuit boards such as membrane sheets and flexible printed circuit boards with conductive patterns formed on at least one side and interposed between the upper and lower circuit boards. A multilayer circuit board characterized in that the insulating spacer is provided with holes at positions corresponding to the respective conductive patterns of the upper and lower circuit boards, and the conductive patterns of the upper and lower circuit boards are electrically connected through the holes. structure. (2) A utility model registration request in which an elastic conductive member is inserted into a hole provided in another circuit board or an insulating spacer, and the conductive patterns of the upper and lower circuit boards are electrically connected via this conductive member. A multilayer structure of a circuit board according to scope 1. (3) Utility model registration claimed in claim 1, in which a conductive pattern portion of one of the upper and lower circuit boards is elastically deformed toward the other circuit board, and both conductive patterns are brought into direct contact through the hole. Multilayer structure of circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16575486U JPS6371579U (en) | 1986-10-30 | 1986-10-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16575486U JPS6371579U (en) | 1986-10-30 | 1986-10-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6371579U true JPS6371579U (en) | 1988-05-13 |
Family
ID=31096081
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16575486U Pending JPS6371579U (en) | 1986-10-30 | 1986-10-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6371579U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04318998A (en) * | 1991-04-18 | 1992-11-10 | Nec Corp | Hybrid integrated circuit |
-
1986
- 1986-10-30 JP JP16575486U patent/JPS6371579U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04318998A (en) * | 1991-04-18 | 1992-11-10 | Nec Corp | Hybrid integrated circuit |