JPS637016B2 - - Google Patents
Info
- Publication number
- JPS637016B2 JPS637016B2 JP55044574A JP4457480A JPS637016B2 JP S637016 B2 JPS637016 B2 JP S637016B2 JP 55044574 A JP55044574 A JP 55044574A JP 4457480 A JP4457480 A JP 4457480A JP S637016 B2 JPS637016 B2 JP S637016B2
- Authority
- JP
- Japan
- Prior art keywords
- laminate
- conductor
- insulator
- manufacturing
- forming
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004020 conductor Substances 0.000 claims description 23
- 239000002131 composite material Substances 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 18
- 238000004519 manufacturing process Methods 0.000 claims description 17
- 239000012212 insulator Substances 0.000 claims description 14
- 239000003990 capacitor Substances 0.000 claims description 9
- 238000010304 firing Methods 0.000 claims description 8
- 239000000843 powder Substances 0.000 claims description 7
- 239000000696 magnetic material Substances 0.000 claims description 3
- 239000006247 magnetic powder Substances 0.000 claims 1
- 238000007639 printing Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 3
- 238000003475 lamination Methods 0.000 description 3
- 235000012431 wafers Nutrition 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052573 porcelain Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910010413 TiO 2 Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000013329 compounding Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 229910000859 α-Fe Inorganic materials 0.000 description 1
Landscapes
- Laminated Bodies (AREA)
- Coils Or Transformers For Communication (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
【発明の詳細な説明】
本発明は複合部品の製造方法に関し、さらに詳
しくは印刷・積層技術を利用した複合電子部品の
製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a composite component, and more particularly to a method for manufacturing a composite electronic component using printing and lamination techniques.
従来、IC、LSI等の集積技術が開発されて電子
部品の複合化及び小型化に大いに役立つている
が、インダクタ、コンデンサ及び抵抗部分につい
ては未だ充分に実用的な技術がなく、これらの部
分の大型化は避けられなかつた。これらの複合機
能を自由に持たせた複合部品としてはマイクロモ
ジユールがあるに過ぎない。マイクロモジユール
技術は、各種機能要素を塔載し且つ必要な配線を
行つた一定厚さ及び一定四角形の各種ウエーハを
複数用意し、各ウエーハは接続用端子ピンを四辺
から突出させ、ウエーハに形成した整列孔または
整列用切欠きに支持棒を挿通して一定間隔にスタ
ツクしたものから成る。このような構造であるか
ら、マイクロモジユールの寸法はかなり大形にな
るのみならず、端子ピン間のリード線取付け等面
倒な手間がかかる。しかもリード線によるストレ
イ容量や抵抗のためウエーハ自身が設計通りに構
成されていてもモジユール化したときには設計し
た特性からのずれが生じることが多い。 Until now, integration technologies such as ICs and LSIs have been developed and have greatly helped in the compounding and miniaturization of electronic components, but there is still no sufficiently practical technology for inductors, capacitors, and resistors, and Upsizing was inevitable. Micromodules are the only composite parts that can freely have these multiple functions. Micromodule technology involves preparing multiple wafers of a certain thickness and square shape on which various functional elements are mounted and the necessary wiring, and each wafer has connection terminal pins protruding from its four sides. Support rods are inserted into alignment holes or alignment notches and stacked at regular intervals. Due to this structure, the size of the micromodule is not only quite large, but also requires troublesome work such as attaching lead wires between terminal pins. Moreover, even if the wafer itself is configured as designed, deviations from the designed characteristics often occur when modularized due to stray capacitance and resistance due to lead wires.
本発明の目的は種々の機能素子部分を有する一
体化した小型の複合電子部品を製造する方法を提
供することを目的とする。 SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for manufacturing an integrated compact composite electronic component having various functional element parts.
本発明は従来のマイクロモジユールに付随した
欠点のないすぐれた特性の複合電子部品を提供す
る。 The present invention provides a composite electronic component with superior properties without the drawbacks associated with conventional micromodules.
簡単に述べると、本発明は積層法によつて製造
されるインダクタ用積層体と、コンデンサ用積層
体及び抵抗体用積層体のうちの少くとも1種
(各々は単一または複数個)用意し、これらを重
畳させた上、圧縮力を加えて合体させた上、所定
の焼成温度において焼結することにより一体化し
た焼結体を作り、焼結体の外部に露出する引出導
体の部分に外部端子を被覆することから成る複合
電子部品の製造方法である。 Briefly stated, the present invention provides at least one type (single or plural pieces of each) of a laminate for an inductor, a laminate for a capacitor, and a laminate for a resistor manufactured by a lamination method. , these are superimposed, combined by applying compressive force, and then sintered at a predetermined firing temperature to create an integrated sintered body. This is a method of manufacturing a composite electronic component comprising coating external terminals.
このような積層・重畳・焼成によつて得られる
複合電子部品は、全体がモノリシツクな強固な構
造を有するから、機械的にも電気的にも安定であ
り、工程が一貫したものとなつて各機能素子を全
く異つた方法で作る必要がなくなり、回路の接続
距離が短かくなつて設計通りの特性値が達成で
き、また規格化したL、C、R積層体を適宜に組
合せて所定の回路機能を持たせることができるの
で、工程の単純化、大量生産化が達成できるなど
の多くの利益が提供できる。 Composite electronic components obtained through such lamination, superimposition, and firing have a solid, monolithic structure as a whole, so they are mechanically and electrically stable, and the process is consistent, making it possible to It is no longer necessary to create functional elements using completely different methods, the connection distance of the circuit is shortened, and the characteristic values as designed can be achieved, and the standardized L, C, and R laminates can be appropriately combined to create a predetermined circuit. Since it can be provided with various functions, it can provide many benefits such as simplifying the process and achieving mass production.
本発明で積層体とは単一のインダクタ、コンデ
ンサ、または抵抗を必ずしも意味せず、一般的に
は多数の同一素子を有する広面積の積層体を意味
し、焼成前または焼成後に切断されて各個の積層
体にされるものと理解されたい。 In the present invention, a laminate does not necessarily mean a single inductor, capacitor, or resistor, but generally refers to a large-area laminate having a large number of identical elements, which are cut into individual pieces before or after firing. It should be understood that it is made into a laminate of.
本発明で使用されるインダクタ用積層体にはト
ランス機能を有するものも含まれる。インダクタ
積層体は、絶縁体粉末をブチラール樹脂等のバイ
ンダーで結合したペーストを延伸して形成した絶
縁体シート(磁器、誘電体、磁性体を含む。好ま
しくは磁性フエライト)またはもつと柔質の磁性
粉末ペースト等の印刷で作られる絶縁体シート
と、Pd、Ag−Pd等の耐熱性金属粉末のペースト
を前記絶縁体シートの面に印刷したコイル形成導
体との交互積層体より成る。この場合に、導体は
絶縁体シートの面から面へと延び且つ全体として
コイル状をなすように形成される。 The inductor laminate used in the present invention includes one having a transformer function. The inductor laminate is made of an insulating sheet (including porcelain, dielectric material, and magnetic material, preferably magnetic ferrite) formed by stretching a paste made by bonding insulating powder with a binder such as butyral resin, or a soft magnetic material. It consists of an alternating laminate of an insulating sheet made by printing powder paste or the like, and a coil-forming conductor made by printing a paste of heat-resistant metal powder such as Pd, Ag-Pd, etc. on the surface of the insulating sheet. In this case, the conductor is formed so as to extend from surface to surface of the insulating sheet and to form a coil shape as a whole.
本発明で使用されるコンデンサ用積層体はイン
ダクタ用積層体と同様の絶縁体シート及び導体を
交互積層して形成される。この場合に導体は絶縁
体シートを挾む対面積を有する電極となるように
形成される。絶縁体用シートにおける粉末は好ま
しくは誘電体(TiO2、BaTiO3など)から選択す
る。 The capacitor laminate used in the present invention is formed by alternately laminating insulating sheets and conductors similar to the inductor laminate. In this case, the conductor is formed to be an electrode having a facing area that sandwiches the insulating sheet. The powder in the insulator sheet is preferably selected from dielectrics (TiO 2 , BaTiO 3 , etc.).
本発明で使用される抵抗体用積層体はインダク
タ用積層体と同様の絶縁シート(好ましくはアル
ミナ、フオリステライト、ステアタイト等の磁器
の粉末を主体とするもの)に、酸化ルテニウム等
の抵抗体の粉末のペーストを印刷して積層体とし
たものである。 The laminated body for a resistor used in the present invention is an insulating sheet similar to the laminated body for an inductor (preferably one made mainly of porcelain powder such as alumina, phoristerite, steatite, etc.), and a resistor such as ruthenium oxide. This is a laminate made by printing a paste of body powder.
なお、各種積層体を重畳して圧縮合体させたも
のを焼成する関係で、各積層体間に大きな熱収縮
差があると割れや歪みの原因となるから、重畳時
に積層体間に中間的な性質を有するシート(ダン
パー材と称する)を介在させてもよい。なお、本
発明の方法で得られる複合部品の表面はプリント
配線基板と同等の表面として利用できる。例えば
複合部品の表面にプリント配線を施こし、トラン
ジスタ等の能動部品を取付けることができる。 In addition, since various laminates are piled up and compressed and combined and then fired, large differences in thermal shrinkage between each laminate may cause cracks or distortions, so A sheet having properties (referred to as a damper material) may be interposed. Note that the surface of the composite component obtained by the method of the present invention can be used as a surface equivalent to that of a printed wiring board. For example, printed wiring can be applied to the surface of a composite component to attach active components such as transistors.
次に本発明の実施例を述べる。絶縁体シートが
印刷法で形成される場合のみを例示するが、延伸
法の場合も含まれるものと理解されたい。また絶
縁体シートは広面積のものを用いるが、説明の都
合上各単位に区画されたものとして述べる。 Next, examples of the present invention will be described. Although only the case where the insulating sheet is formed by the printing method is illustrated, it should be understood that the case where the insulating sheet is formed by the stretching method is also included. Further, although a wide-area insulating sheet is used, for convenience of explanation, it will be described as being divided into each unit.
第1〜7図はインダクタ用積層体Aの製造方法
の1例を示す。第1図のように先ず絶縁体シート
1を印刷し、その上に第2図のように導体2を印
刷する。このとき導体2は絶縁体シート1の下辺
に露出する引出部を有する。次に第3図のように
導体2の末端を残して絶縁性の磁性体シート3を
印刷し、次に第4図のように導体2に接続する導
体4を印刷し、さらに第5図のように導体4の末
端を残して絶縁性の磁性体シート5を印刷し、そ
の上に導体4に接続する導体6を印刷する。この
とき導体6は積層体の上辺に露出する。第7図の
ようにさらに絶縁体シート7を印刷する。こうし
て得られるインダクタ用積層体Aは実際には第1
5図に示されるように単位素子A(点線は仮想線
であり、単位素子の外周部となるべき位置を示
す)を縦横に整然と配列した一枚の厚物シートの
形をしている。 1 to 7 show an example of a method for manufacturing the laminate A for an inductor. First, an insulating sheet 1 is printed as shown in FIG. 1, and a conductor 2 is printed thereon as shown in FIG. At this time, the conductor 2 has a lead-out portion exposed at the lower side of the insulating sheet 1. Next, as shown in Fig. 3, an insulating magnetic sheet 3 is printed leaving the end of the conductor 2, and then a conductor 4 to be connected to the conductor 2 is printed as shown in Fig. 4, and then as shown in Fig. 5. An insulating magnetic sheet 5 is printed leaving the end of the conductor 4, and a conductor 6 connected to the conductor 4 is printed on it. At this time, the conductor 6 is exposed on the upper side of the laminate. An insulator sheet 7 is further printed as shown in FIG. The inductor laminate A thus obtained is actually the first
As shown in FIG. 5, the unit elements A (the dotted lines are imaginary lines and indicate the positions that should be the outer periphery of the unit elements) are arranged in an orderly manner vertically and horizontally in the form of a single thick sheet.
第8〜11図はコンデンサ用積層体の製造方法
を示し、先ず第8図のように絶縁体シート8を印
刷し、次で上辺左寄りに引出部を有する電極9を
印刷する。次に第9図のように誘電体シート10
を全面に印刷し、さらに第10図のように積層体
の下辺左寄りに引出部を有する電極11を下側の
電極9に誘電体シート10を介在して重なるよう
に印刷し、さらに第11図のように絶縁体シート
12を印刷する。形成された積層体Bは第15図
に示すように単位積層体B′を縦横に整列した形
をなしている。 8 to 11 show a method of manufacturing a laminate for a capacitor. First, an insulator sheet 8 is printed as shown in FIG. 8, and then an electrode 9 having a lead-out portion on the left side of the upper side is printed. Next, as shown in FIG.
is printed on the entire surface, and furthermore, as shown in FIG. 10, an electrode 11 having a lead-out portion on the lower left side of the laminate is printed so as to overlap the lower electrode 9 with a dielectric sheet 10 interposed therebetween, and further, as shown in FIG. Print the insulator sheet 12 as shown below. The formed laminate B has a shape in which unit laminates B' are arranged vertically and horizontally, as shown in FIG.
第12〜14図は抵抗体用積層体の製造方法を
示し、先ず第12図のように絶縁体シート13を
印刷し、その面に抵抗体14を印刷し、次に第1
3図のように引出導体15,16を印刷し、その
上に第17図のように絶縁体シート17を印刷す
る。こうして得られた積層体Cは第15図に示す
ように単位積層体C′を縦横に整列した形の厚物シ
ートである。 12 to 14 show a method of manufacturing a laminate for a resistor. First, as shown in FIG. 12, an insulator sheet 13 is printed, a resistor 14 is printed on that surface, and then a first
The lead conductors 15 and 16 are printed as shown in FIG. 3, and an insulator sheet 17 is printed thereon as shown in FIG. 17. The thus obtained laminate C is a thick sheet in which the unit laminates C' are arranged vertically and horizontally as shown in FIG.
第15図において、積層体A,B,Cの単位積
層体A′,B′,C′の外形寸法は同一であり、且つ
間隔も同一であることに注意されたい。 In FIG. 15, it should be noted that the outer dimensions of the unit laminates A', B', and C' of the laminates A, B, and C are the same, and the intervals are also the same.
次に、第15図に示すように積層体A,B,C
を上下に正しく整列させ、第16図のようにこれ
らの積層体を重畳させ、全面を上下より圧縮(圧
締め)して一体的な重畳体を得る。この重畳体は
単位積層体の輪郭のところに沿つた切断線18,
19でカツトされて、次で焼成炉において焼成さ
れる。別法として、線18,19のところに単に
刻目を入れておき、焼成炉で焼成した後に、刻目
に沿つて折ることにより単位の重畳体即ち、複合
電子部品にすることができる。 Next, as shown in FIG.
are properly aligned vertically, and the stacked bodies are superimposed as shown in FIG. 16, and the entire surface is compressed (tightened) from above and below to obtain an integral stacked body. This superimposed body has a cutting line 18 along the outline of the unit laminated body,
It is cut in step 19 and then fired in a firing furnace. Alternatively, it can be simply scored at lines 18 and 19 and folded along the scores after firing in a firing oven to form a stack of units, ie, a composite electronic component.
第18図はこのようにして得られた複合部品に
外部端子を形成した拡大斜視図である。即ち、焼
結した重畳体の側辺にはインダクタ用導体の引出
部が露出しているからこれに導電ペースト(銀、
銅等の粉末のペースト)を焼付けて外部端子2
0,21とし、コンデンサ用電極の引出部には外
部端子22,23を焼付け、また抵抗15,16
の引出部には外部端子24,25を被着し焼付け
る。なおこれらの端子間に結線が必要なら、これ
らの端子の被着・焼付けと同時にかかる結線用の
導体を被着・焼付けることができる。 FIG. 18 is an enlarged perspective view of the composite component thus obtained with external terminals formed thereon. That is, since the lead-out part of the inductor conductor is exposed on the side of the sintered stacked body, a conductive paste (silver,
External terminal 2 by baking a paste of copper powder etc.
0, 21, external terminals 22, 23 are baked on the lead-out part of the capacitor electrode, and resistors 15, 16 are attached.
External terminals 24 and 25 are attached and baked on the drawn-out portion. If a connection is required between these terminals, a conductor for such connection can be applied and baked at the same time as these terminals are applied and baked.
なお、すでに述べたように、第18図において
重畳体の表面のペーストを利用してプリント配
線、トランジスタ等の素子の固定等を行つて集積
回路を構成することができる。 As already mentioned, an integrated circuit can be constructed by using the paste on the surface of the superimposed body in FIG. 18 to fix printed wiring, transistors, and other elements.
以上のように、本発明は単一の実施例について
説明したが、変形例が多く考えられる。先ず、各
積層体A,B,Cにおける積層数は任意に変えう
る。また絶縁シートの材料も色々に変えることが
できる。また中間シートを各積層体A,B,Cの
間に介在させて層間の結合と割れや歪の問題を回
避することが可能である。また積層体A,B,C
のすべての面が絶縁体シート7,12,17等で
保護される必要がないことも明らかであろう。 As described above, the present invention has been described with reference to a single embodiment, but many variations are possible. First, the number of layers in each of the laminates A, B, and C can be changed arbitrarily. Furthermore, the material of the insulating sheet can be changed in various ways. It is also possible to interpose an intermediate sheet between each of the laminates A, B, and C to avoid bonding between layers and problems of cracking and distortion. Also, laminates A, B, C
It will also be clear that it is not necessary that all sides of the insulating sheet 7, 12, 17 etc. be protected.
以上のように構成したから、本発明の方法はモ
ノリシツクな構造の複合部品を提供することがで
きる。積層体A,B,Cは何種づつかの規格化し
たものをそろえておけば、これらを適当な順序及
び適当な数で重畳させ、圧縮し、焼成し、外部端
子を形成すれば、少数の積層体から多種の複合部
品を製造することができる。その外、剛性、特性
の安定化等すでに述べた諸利益が得られる。 With the above configuration, the method of the present invention can provide a composite part with a monolithic structure. If you prepare a number of standardized laminates A, B, and C, you can stack them in an appropriate order and in an appropriate number, compress them, fire them, and form external terminals. A wide variety of composite parts can be manufactured from the laminates. In addition, the benefits already mentioned, such as stiffness and stabilization of properties, can be obtained.
第1図ないし第7図は本発明に用いられるイン
ダクタ用積層体の製造における順次工程を示す平
面図、第8図ないし第11図は本発明に用いられ
るコンデンサ用積層体を製造する順次工程を示す
平面図、第12図ないし第14図は本発明に用い
られる抵抗体用積層体を製造する順次工程を示す
平面図、第15図はL、C、R複合部品を製造す
るための本発明の方法の第1工程を示す斜視図、
第16図は同第2工程を示す斜視図、第17図は
同第3工程を示す斜視図、及び第18図は完成し
た積層複合部品の斜視図である。
図中主な部分は次の通りである。A:インダク
タ用積層体、B:コンデンサ用積層体、C:抵抗
体用積層体、20,21,22,23,24:外
部端子。
1 to 7 are plan views showing the sequential steps in manufacturing the laminate for an inductor used in the present invention, and FIGS. 8 to 11 are plan views showing the sequential steps in manufacturing the laminate for a capacitor used in the present invention. 12 to 14 are plan views showing the sequential steps of manufacturing a laminate for a resistor used in the present invention, and FIG. 15 is a plan view showing the present invention for manufacturing an L, C, R composite part. A perspective view showing the first step of the method,
FIG. 16 is a perspective view showing the second step, FIG. 17 is a perspective view showing the third step, and FIG. 18 is a perspective view of the completed laminated composite part. The main parts in the figure are as follows. A: Laminated body for inductor, B: Laminated body for capacitor, C: Laminated body for resistor, 20, 21, 22, 23, 24: External terminal.
Claims (1)
の複数の導体とを交互に積層し、その際に特定の
絶縁体シート上の前記導体の始端部と下側の導体
の終端部とが該特定の絶縁体シートの一縁部であ
つてその下隣りの絶縁体シートの周辺よりも内方
にある縁部を介して行われるようにし、こうして
絶縁体シートの面から面に延びる少くとも1本の
コイル状の導体を有するインダクタ形成用積層体
Aを形成し、未焼成の複数の絶縁体シートとこれ
らの面に形成された電極とより成るコンデンサ形
成用積層体B及び(又は)未焼成の複数の絶縁体
シートとこれらの面に形成された抵抗体とより成
る抵抗形成用積層体Cを上記積層体Aと重畳さ
せ、圧縮力を加えて一体化した重畳体とし、次い
で所定の焼成温度で焼成し、さらに前記重畳体の
周辺に前記導体と、電極及び(又は)抵抗体とへ
電気接続する外部端子を形成することを特徴とす
る複合部品の製造方法。 2 積層体A,B,Cにおける絶縁体が磁性体で
ある特許請求の範囲第1項記載の複合部品の製造
方法。 3 積層体Aにおける絶縁体が磁性体であり、積
層体Bにおける絶縁体が誘電体である特許請求の
範囲第1項記載の複合部品の製造方法。 4 積層体Aにおける絶縁体が磁性粉末ペースト
から形成され、積層体Bにおける絶縁体が誘電体
粉末ペーストから形成される特許請求の範囲第1
項記載の複合部品の製造方法。 5 導体及び電極が耐熱性である特許請求の範囲
第1項ないし第4項のいずれかに記載の複合部品
の製造方法。[Claims] 1. A plurality of unfired insulator sheets and a plurality of conductors of about half a turn are alternately laminated, and at that time, the starting end of the conductor on a specific insulator sheet and the lower side of the conductor are laminated alternately. The termination of the conductor is made through one edge of the particular insulating sheet that is inward from the periphery of the adjacent insulating sheet, and thus the surface of the insulating sheet A laminate A for forming an inductor having at least one coil-shaped conductor extending from the surface to the surface thereof, and a laminate for forming a capacitor comprising a plurality of unfired insulator sheets and electrodes formed on these surfaces. B and/or a resistance forming laminate C consisting of a plurality of unfired insulating sheets and a resistor formed on these surfaces are superimposed on the above laminate A, and a compressive force is applied to integrate them. A method for producing a composite component, the method comprising: forming a composite body into a body, then firing at a predetermined firing temperature, and further forming an external terminal around the superimposed body to electrically connect the conductor to an electrode and/or a resistor. . 2. The method for manufacturing a composite component according to claim 1, wherein the insulators in the laminates A, B, and C are magnetic. 3. The method of manufacturing a composite component according to claim 1, wherein the insulator in the laminate A is a magnetic material, and the insulator in the laminate B is a dielectric. 4. Claim 1, wherein the insulator in the laminate A is formed from a magnetic powder paste, and the insulator in the laminate B is formed from a dielectric powder paste.
Method for manufacturing composite parts described in Section 1. 5. The method for manufacturing a composite component according to any one of claims 1 to 4, wherein the conductor and the electrode are heat resistant.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4457480A JPS56142622A (en) | 1980-04-07 | 1980-04-07 | Method of manufacturing composite part |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4457480A JPS56142622A (en) | 1980-04-07 | 1980-04-07 | Method of manufacturing composite part |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56142622A JPS56142622A (en) | 1981-11-07 |
JPS637016B2 true JPS637016B2 (en) | 1988-02-15 |
Family
ID=12695270
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4457480A Granted JPS56142622A (en) | 1980-04-07 | 1980-04-07 | Method of manufacturing composite part |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56142622A (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5917233A (en) * | 1982-07-20 | 1984-01-28 | 日本電気株式会社 | Method of producing composite laminated ceramic part |
JPS5917232A (en) * | 1982-07-20 | 1984-01-28 | 日本電気株式会社 | Composite laminated ceramic part and method of producing same |
JPS59107109U (en) * | 1983-01-06 | 1984-07-19 | ティーディーケイ株式会社 | Laminated composite parts |
JPS628512A (en) * | 1985-07-04 | 1987-01-16 | 株式会社村田製作所 | Ic composite part |
JPH0447950Y2 (en) * | 1986-02-18 | 1992-11-12 | ||
JPH0360148A (en) * | 1989-07-28 | 1991-03-15 | Murata Mfg Co Ltd | Laminated type lcr element |
JP3073035B2 (en) * | 1991-02-21 | 2000-08-07 | 毅 池田 | LC noise filter |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3765082A (en) * | 1972-09-20 | 1973-10-16 | San Fernando Electric Mfg | Method of making an inductor chip |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4893347U (en) * | 1972-02-15 | 1973-11-08 | ||
JPS5044259U (en) * | 1973-08-22 | 1975-05-06 |
-
1980
- 1980-04-07 JP JP4457480A patent/JPS56142622A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3765082A (en) * | 1972-09-20 | 1973-10-16 | San Fernando Electric Mfg | Method of making an inductor chip |
Also Published As
Publication number | Publication date |
---|---|
JPS56142622A (en) | 1981-11-07 |
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