JPS6356936A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To shorten the production time by using an silicon substrate, to which hydrophilic treatment is executed, as a support substrate for a semiconductor substrate isolated by a dielectric. CONSTITUTION:An oxide film 102 is formed onto the surface of a substrate 101 consisting of N-type single crystal silicon, predetermined sections in the oxide film 102 are removed, and grooves 103 are shaped, using residual sections as masks. The oxide films 102 are gotten rid of, and the oxide film 102 is formed onto the upper surfaces of the grooves 103 and the surface of the substrate 101 again. Polycrystalline silicon is grown thicker than the depth of the grooves 103 and a polycrystalline silicon layer 104 is formed and polycrystalline silicon except the insides of the grooves 103 is taken away, thus flattening the surface. The oxide film 102 and the surface of the polycrystalline silicon layer 104 are hydrophilic-treated. The back of the substrate 101 is ground, the noses of the oxide film 102 are exposed, an impurity is introduced to a ground surface to shape P layers 106 and 107, and an N<+> layer 108 is formed to the P layer 106. Electrodes 109, 110 and 111 are each shaped. Accordingly, the production time is shortened while the semiconductor substrate can be ground uniformly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing a semiconductor device using a dielectric isolation method.

[Conventional technology]

Conventionally, as a method for manufacturing semiconductor devices using a dielectric separation method, a method using polycrystalline silicon as a support substrate was developed by NEC Research and Development (NECRESE).
RCII & DEVEL, OPMENT) Volume 57 (1
980), published on page 39.

Next, an example of the manufacturing method will be explained using the drawings.

FIGS. 2(a) to 2(d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining a conventional method of manufacturing a high voltage dielectric isolation type thyristor.

First, as shown in FIG. 2(a), selective etching is performed on a semiconductor substrate 101 made of N-type single crystal silicon to form a layer 103 for separating element regions, and then the surface is thermally oxidized. , an acid-1 arsenic film 102 is formed.

Next, as shown in the second [2(b), ? A polycrystalline silicon layer 104 is thickly deposited on the oxide film 102 on which r8103 is formed to completely fill the area.

Next, as shown in FIG. 2(c), the back surface of the semiconductor substrate 101 is polished using the polycrystalline silicon layer 104 as a support substrate to form a single crystal silicon island 101A.

Next, as shown in FIG. 2(d), a thyristor having an anode 110, a gate 109, and a cathode 111 is formed on the single crystal island 10IA, thereby completing the semiconductor device.

[Problem that the invention seeks to solve]

However, in the conventional semiconductor device manufacturing method described above, the polycrystalline silicon used as the support substrate has a thickness of several hundred μm.
It takes a lot of time and money to deposit, and when polishing a single crystal silicon substrate using the polycrystalline silicon layer 104 as a support substrate, the polycrystalline silicon layer 104 does not have a uniform thickness. Furthermore, there were other problems such as the inability to uniformly polish a semiconductor substrate made of single-crystal silicon because polycrystalline silicon also grows on the opposite surface to the growth surface during growth of polycrystalline silicon. .

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that can shorten manufacturing time and uniformly polish a semiconductor substrate.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the steps of forming a groove for separating element regions on the surface of a semiconductor substrate, forming an insulating film on the entire surface including the groove, and then layering a polycrystalline silicon layer on the surface of the semiconductor substrate including the groove. a step of etching this polycrystalline silicon layer to planarize the surface of the semiconductor substrate leaving the polycrystalline silicon layer only in the groove; and etching the insulating film and the polycrystalline silicon layer in the groove. a step of making the surface of the semiconductor substrate hydrophilic, and then adhering and fixing the surface of the silicon substrate that has been made hydrophilic to the surface of the semiconductor substrate; polishing the back surface of the semiconductor substrate to which the silicon substrate is fixed; The method includes a step of exposing the tip of the insulating film formed during the polishing, and a step of forming a semiconductor element on the polished surface of the semiconductor substrate.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(g) are cross-sectional views of a semiconductor chip shown in order of steps for explaining an embodiment of the present invention.

First, as shown in FIG. 1(a), an oxide film 102 made of silicon dioxide is formed on the surface of a semiconductor substrate 101 made of N-type single crystal silicon, and then this oxide film 102 is made of silicon dioxide.
A predetermined portion of the oxide film 102 is removed by photolithography, and a vortex 103 for separating device regions is formed in the semiconductor substrate 101 using the remaining oxide film 102 as a mask. This groove 103 can be formed by dry etching or anisotropic etching using a potassium hydroxide solution, ethylenediamine pyrocatechol, or the like.

Next, as shown in FIG. 1(b), the oxide film 102 used as a mask is removed, and an oxide film 102 is again formed using silicon dioxide on the upper surface of the full 103 and the surface of the semiconductor substrate 101 between the full 103. do.

Next, as shown in FIG. 1C, polycrystalline silicon is grown to a thickness equal to or greater than the depth of the groove 103 by vapor phase growth to form a polycrystalline silicon layer 104 that fills the area 7111103.

Next, as shown in FIG. 1(d), a polycrystalline silicon layer 10
4, the polycrystalline silicon on the surface of the semiconductor substrate 101 except in the groove 103 is removed using a method such as dry etching or polishing to flatten the surface.

Next, as shown in FIG. 1(e), the surfaces of the oxide film 102 and the polycrystalline silicon layer 104 are subjected to hydrophilic treatment.

This treatment is carried out, for example, by immersing it in a mixture of sulfuric acid and hydrogen peroxide. A silicon substrate 105 that has been separately subjected to hydrophilic treatment is prepared and brought into close contact with the surface of the semiconductor substrate that has been subjected to the hydrophilic treatment to perform silanol bonding.

Sila-knoll bonding is a process in which the wafer surfaces that have been subjected to hydrophilic treatment are brought into close contact with each other and heat treated (for example, at 000°C), so that the hydroxyl groups on the wafer surface become 1120 by the heat treatment, and dehydration condensation does not occur. This means that the resulting wafers are bonded. This method is used, for example, at the International Electron Device Meeting (IEEE, International
onal Electro[I Device M
eat-ing) technical digest (Tech
nical DigesL) pages 684-687 (19
It was reported in 1985).

Next, as shown in FIG. 1(f), the back surface of the semiconductor substrate 101 is polished, and the oxide film 1.02 formed in the vortex 103 is
expose the tip. In this polishing method, colloidal silica is used as the abrasive grains and organic amine is used as the chemical liquid, so the processing speed of the oxide film 102 covering R4103 is lower than that of the semiconductor substrate ]01, so the polishing process is performed on the oxide film 102. It is easy to stop at the tip of 102.

Next, as shown in 1st [3(g)], impurities are introduced into the polished surface of the semiconductor substrate 101 using the conventional technique to form two layers 106 and 107 of a desired depth, and further PJ? W
An N4 layer 108 is formed on 106. Then, two layers 106
A dielectrically isolated semiconductor device is completed by forming a goo1-electrode 109 on top, an anode electrode 110 on P Pit 107, and a canned electrode [1] on N+ layer 108.

In this way, by using the silicon substrate 105 as a supporting substrate in this embodiment, it is not necessary to deposit polycrystalline silicon as in the case of the above example, and the back surface of the semiconductor substrate 101 can be polished more uniformly. becomes possible.

In the two-layer embodiment, the method for manufacturing a thyristor has been described, but the method is not limited to that and can be similarly applied to the manufacturing of MOS or bipolar multiplication circuits with high withstand voltage. .

〔Effect of the invention〕

As explained above, the present invention uses a silicon substrate with a hydrophilicity of 1 to 11 as a support substrate for a semiconductor substrate separated by a dielectric material, thereby making it possible to deposit polycrystalline silicon as in the conventional method. This eliminates the need for polishing, which has the effect of shortening manufacturing time and uniformly polishing the semiconductor substrate.

[Brief explanation of drawings]

FIGS. 1(a) to (g) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention, and FIG.
) to (d) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a conventional method of manufacturing a semiconductor device. 1, 01... Semiconductor substrate, 102... Oxide film, 10
3... Groove, ]04... Polycrystalline silicon layer, 105...
...Silicon substrate, 106.107...Y) layer, 10
8...N+ layer, 109...to game 1, 110...a, note, 111...cathode. The first lθ3 no Ichi! χ2 diagram

Claims (1)

[Claims] forming a trench for element region isolation on the surface of the semiconductor substrate; forming an insulating film over the entire surface including the trench; and then forming a polycrystalline silicon layer on the surface of the semiconductor substrate including the trench;
etching the polycrystalline silicon layer to planarize the semiconductor substrate surface by leaving the polycrystalline silicon layer only in the groove; and a step of planarizing the semiconductor substrate surface including the insulating film and the polycrystalline silicon layer in the groove. a step of making the semiconductor substrate hydrophilic and then adhering and fixing the hydrophilic silicon substrate surface to the surface of the semiconductor substrate; and polishing the back surface of the semiconductor substrate to which the silicon substrate is fixed to form a groove in the groove. A method for manufacturing a semiconductor device, comprising: exposing a tip of the insulating film that has been polished; and forming a semiconductor element on the polished surface of the semiconductor substrate.