JPS6356504B2 - - Google Patents
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- Publication number
- JPS6356504B2 JPS6356504B2 JP58048124A JP4812483A JPS6356504B2 JP S6356504 B2 JPS6356504 B2 JP S6356504B2 JP 58048124 A JP58048124 A JP 58048124A JP 4812483 A JP4812483 A JP 4812483A JP S6356504 B2 JPS6356504 B2 JP S6356504B2
- Authority
- JP
- Japan
- Prior art keywords
- phase difference
- power
- voltage
- circuit
- delay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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- Measuring Phase Differences (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は給電線における位相差あるいは力率を
計測する電気計器の改良に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an improvement in an electric meter for measuring phase difference or power factor in a power supply line.
第1図は給電線における位相差あるいは力率を
計測する従来の電気計器の構成図である。この電
気計器は、給電線(不図示)における負荷電圧を
計器用変圧器1により変圧して負荷電圧に比例し
た第1の電圧信号evとして出力し、また計器用
変流器2により給電線に流れる消費電流に比例し
た第2の電圧信号eiとして出力する。ここで第1
および第2の電圧信号ev,eiは、その位相差を
とすると、
ev=√2Vsinωt …(1)
ei=√2lsin(ωt−) …(2)
として表わされる。これら第1および第2の電圧
信号ev,eiは有効電力測定部3および皮相電力測
定部4へ送られる。ここで、有効電力測定部3は
下式に基づいて有効電力Wを求める。
FIG. 1 is a block diagram of a conventional electric meter for measuring phase difference or power factor in a power supply line. This electric meter transforms the load voltage on a power supply line (not shown) using a meter transformer 1 and outputs it as a first voltage signal ev proportional to the load voltage. It is output as a second voltage signal ei proportional to the flowing current consumption. Here the first
And the second voltage signals ev, ei are expressed as ev=√2Vsinωt...(1) ei=√2lsin(ωt−)...(2), assuming their phase difference. These first and second voltage signals ev, ei are sent to the active power measuring section 3 and the apparent power measuring section 4. Here, the active power measuring section 3 calculates the active power W based on the following formula.
W=∫T Oev・eidt=VIcos …(3)
一方、皮相電力測定部4は下式に基づいて皮相
電力Pを測定する
P=∫T O|ev|dt
・∫T O|ei|dt=VI …(4)
Tは第1および第2の電圧信号ev,eiの一周期
である。これらの測定部3,4で計測された各電
力W,Pは除算部5に送られ、この除算部5によ
り(W/P)なる演算が行なわれる。すなわち第
(3)式および第(4)式から(W/P)は、
W/P=vIcos/VI=cos …(5)
となる。 W=∫ T O ev・eidt=VIcos…(3) On the other hand, the apparent power measurement unit 4 measures the apparent power P based on the following formula. P=∫ T O |ev|dt ・∫ T O |ei|dt =VI (4) T is one period of the first and second voltage signals ev, ei. The electric powers W and P measured by these measuring sections 3 and 4 are sent to a dividing section 5, and the dividing section 5 performs the calculation (W/P). That is, the first
From equation (3) and equation (4), (W/P) becomes W/P=vIcos/VI=cos (5).
しかして、力率cosが求められ、さらに図示
しないマイクロコンピユータ等によりcos-1
(cos)なる演算が行なわれて、位相差が求め
られる。 Then, the power factor cos is determined, and then cos -1 is calculated using a microcomputer, etc. (not shown).
(cos) is performed to determine the phase difference.
しかし、第1図に示すような電気計器では、(3)
式、(4)式、(5)式に示される計測手段および演算に
より力率cosを求めているために、有効電力測
定部、皮相電力測定部および除算部のそれぞれの
部分で発生する誤差が重畳された誤差が最終誤差
となつてしまう。従つてこれらの各部には、特性
がリニアリテイに優れた測定手段が要求された。
However, in the electric meter shown in Figure 1, (3)
Because the power factor cos is determined by the measurement means and calculations shown in equations (4) and (5), errors occurring in the active power measurement section, apparent power measurement section, and division section are The superimposed error becomes the final error. Therefore, each of these parts required a measuring means with excellent linearity of characteristics.
又、特に有効電力測定部は、位相差が大きく
なると、それにともなつて測定誤差が大きくなる
という位相特性を持つため、装置全体の精度も、
位相差が大きくなるに従つて悪くなるという問
題があつた。さらに位相差が大きくなれば力率
特性に大きく影響を与える問題があつた。 In addition, since the active power measuring section in particular has a phase characteristic in which the measurement error increases as the phase difference increases, the accuracy of the entire device also increases.
There was a problem that the problem worsened as the phase difference increased. Furthermore, if the phase difference becomes large, there is a problem in that it greatly affects the power factor characteristics.
本発明は上記実情に基づいてなされたもので、
位相差の大きさに関係なく正確に力率および位相
差を測定できる精度の高い電気計器を提供するこ
とを目的とする。
The present invention was made based on the above circumstances, and
It is an object of the present invention to provide a highly accurate electric meter that can accurately measure power factor and phase difference regardless of the magnitude of the phase difference.
本発明は、変圧手段および変流手段からの第1
および第2の電圧信号のいずれかを遅延回路によ
り遅延し、これら第1および第2の電圧信号と遅
延信号とに基づいて相関演算部により有効電力お
よび皮相電力を求め、さらにこれら電力の除算値
を求め、この除算値に基づいて遅延駆動回路によ
り前記相関演算部への前記第1および第2の電圧
信号の位相差を零とし、前記除算値を最大にする
周波数の駆動信号を前記遅延回路に送つて前記遅
延回路を駆動して、前記駆動信号に基づいて演算
回路により位相差および力率を求める電気計器で
ある。
The present invention provides a first
and the second voltage signal is delayed by a delay circuit, and based on the first and second voltage signals and the delayed signal, the correlation calculation unit calculates the active power and the apparent power, and then the division value of these powers. Based on this division value, the delay drive circuit makes the phase difference between the first and second voltage signals to the correlation calculation section zero, and the delay circuit outputs a drive signal with a frequency that maximizes the division value. The electric meter is an electric meter that drives the delay circuit by sending a signal to the drive signal, and calculates a phase difference and a power factor using an arithmetic circuit based on the drive signal.
以下、本発明の一実施例について第2図を参照
して説明する。なお第1図と同一部分には同一符
号を付して詳しい説明は省略する。第2図に示す
如く本発明の電気計器は、新たにアナログ遅延回
路10、アナログ遅延駆動回路11および演算回
路12を設け、さらに有効電力測定部3、皮相電
力測定部4および除算部5をもつて相関演算部1
3としたものである。
An embodiment of the present invention will be described below with reference to FIG. Note that the same parts as in FIG. 1 are given the same reference numerals and detailed explanations will be omitted. As shown in FIG. 2, the electric meter of the present invention is newly provided with an analog delay circuit 10, an analog delay drive circuit 11, and an arithmetic circuit 12, and further includes an active power measuring section 3, an apparent power measuring section 4, and a dividing section 5. Correlation calculation unit 1
3.
アナログ遅延回路10は、計器用変流器2と皮
相電力測定部4との間に設けられ、計器用変流器
2からの第2の電圧信号eiを遅延するもので、具
体的にはCCD(Charge Coupled Device)あるい
はBBD(Bucket Brigade Device)のような回路
が用いられ、かつアナログ遅延段数N(Nは整数)
は計器の要求される精度によつて決められ、アナ
ログ遅延駆動回路11によつて駆動される。 The analog delay circuit 10 is provided between the instrument current transformer 2 and the apparent power measuring section 4, and delays the second voltage signal ei from the instrument current transformer 2. (Charge Coupled Device) or BBD (Bucket Brigade Device) is used, and the number of analog delay stages is N (N is an integer).
is determined by the required accuracy of the meter and is driven by an analog delay drive circuit 11.
アナログ遅延駆動回路11は、除算部5からの
演算結果を時系列的に入力し、この演算結果すな
わち除算値が最大となる駆動周波数でアナログ
遅延回路10の遅延時間を制御する機能を有す
る。演算回路12は前記アナログ遅延駆動回路1
1の駆動周波数から位相差あるいは力率を演算
するための回路である。 The analog delay drive circuit 11 has a function of inputting the calculation result from the division unit 5 in time series and controlling the delay time of the analog delay circuit 10 at a driving frequency at which the calculation result, that is, the division value is maximum. The arithmetic circuit 12 is the analog delay drive circuit 1
This is a circuit for calculating phase difference or power factor from a single drive frequency.
次に上記の如く構成された電気計器の動作につ
いて説明する。計器用変圧器1および計器用変流
器2により給電線(不図示)における負荷電圧お
よび消費電流に比例した第1および第2の電圧信
号ev,eiが得られる。ここで位相差をとする
と、第1および第2の電圧信号ev,eiは
ev=√2Vsinωt …(8)
ei=√2lsin(ωt−) …(9)
となる。ここで第2の電圧信号eiはアナログ遅延
回路10により位相差θだけ遅延された電圧信号
eiθ=√2Isin(ωt−−θ) …(10)
となる。 Next, the operation of the electric meter configured as described above will be explained. An instrument transformer 1 and an instrument current transformer 2 provide first and second voltage signals ev, ei that are proportional to the load voltage and current consumption in a power supply line (not shown). Here, assuming the phase difference, the first and second voltage signals ev and ei are as follows: ev=√2Vsinωt (8) ei=√2lsin(ωt−)…(9). Here, the second voltage signal ei becomes a voltage signal delayed by the phase difference θ by the analog delay circuit 10 as follows: eiθ=√2Isin(ωt−−θ) (10).
この位相差θは、アナログ遅延回路10のシフ
ト段数をN、アナログ遅延駆動回路11により駆
動される周波数をとすると
θ=N//1/0×2π〔ラジアン〕…(11)
である。(0は給電周波数)そして、第1の電圧
信号evおよび電圧信号eiθはそれぞれ相関演算部
13の有効電力測定部3および皮相電力測定部4
へ送られる。有効電力測定部3は下式に基づいて
有効電力Wθを求める。 This phase difference θ is as follows, where N is the number of shift stages of the analog delay circuit 10 and the frequency driven by the analog delay drive circuit 11 is θ=N//1/ 0 ×2π [radians] (11). ( 0 is the power supply frequency) and the first voltage signal ev and voltage signal eiθ are sent to the active power measurement unit 3 and apparent power measurement unit 4 of the correlation calculation unit 13, respectively.
sent to. The active power measuring section 3 calculates the active power Wθ based on the following formula.
Wθ=∫T Oev・eiθdt
=VIcos(+θ) …(12)
また、皮相電力測定部4は下式に基づいて皮相電
力Pを求める。 Wθ=∫ T O ev·eiθdt = VI cos (+θ) (12) Further, the apparent power measuring section 4 calculates the apparent power P based on the following formula.
P=∫T O|ev|dt×∫T O|eiθ|dt=VI …(13)
そして、それぞれの電力値Wθ,Pの除算値
(Wθ/P)が除算部5により演算されて求められ
る。 P=∫ T O |ev|dt×∫ T O |eiθ|dt=VI (13) Then, the division value (Wθ/P) of each power value Wθ, P is calculated by the division unit 5 and obtained. .
Wθ/P=∫T/Oev・eiθdt/∫T/O|ev|dt×∫T/
O|eiθ|dt
=cos(+θ) …(14)
アナログ遅延駆動回路11は、この除算値cos
(+θ)が最大となるような駆動周波数でア
ナログ遅延回路10を駆動する。すなわち、位相
差θは
+θ=2nπ(n:整数)
を満足するように制御されることになる。従つて
有効電力測定部3、皮相電力測定部4には、位相
差のない電圧信号evおよびeiθが入力される。 Wθ/P=∫ T / O ev・eiθdt/∫ T / O |ev|dt×∫ T /
O | eiθ | dt = cos (+θ) ... (14) The analog delay drive circuit 11 uses this divided value cos
The analog delay circuit 10 is driven at a driving frequency that maximizes (+θ). That is, the phase difference θ is controlled so as to satisfy +θ=2nπ (n: integer). Therefore, the voltage signals ev and eiθ having no phase difference are input to the active power measuring section 3 and the apparent power measuring section 4.
演算回路12は、駆動周波数を入力して
=2nπ−θ
=(n−N//1/0)×2π〔ラジアン〕…(
15)
により位相演算、更にcosにより力率演算を行
なう。 The arithmetic circuit 12 inputs the driving frequency and calculates the following: =2nπ-θ = (n-N//1/ 0 )×2π [radian]...(
15) Perform phase calculation using , and power factor calculation using cos.
このように本電気計器では、有効電力計に入力
される2つの信号ev,eiθは、常に位相差がない
ように制御されているために、有効電力計の位相
特性が問題とならない。又、従来技術では有効電
力値W、皮相電力値Pを測定し、更にこれらの値
をもとにW/Pを演算することで、力率cosあ
るいは位相差を求めているために、有効電力測
定部、皮相電力測定部および除算部のそれぞれの
部分で発生する誤差が重畳された誤差が最終誤差
となつてしまうため、各部には特性がリアリテイ
に優れた測定手段が要求された。本電気計器で
は、(14)式の大小比較のみを正しく判断すれば
よく、これが最大となる駆動周波数を知れば
(15)式により位相差を求めることが可能であり、
有効電力測定部、皮相電力測定部、除算部には、
何らリニアリテイが要求されずに高精度な測定が
可能となる。 In this way, in this electric meter, the two signals ev and eiθ input to the active wattmeter are controlled so that there is always no phase difference, so the phase characteristics of the active wattmeter do not matter. In addition, in the conventional technology, the power factor cos or phase difference is obtained by measuring the active power value W and the apparent power value P, and then calculating W/P based on these values. Since the final error is the superimposition of errors occurring in the measurement section, apparent power measurement section, and division section, each section required a measuring means with excellent realistic characteristics. With this electric meter, it is only necessary to correctly judge the magnitude comparison in equation (14), and if you know the drive frequency at which this is the maximum, you can find the phase difference using equation (15).
The active power measurement section, apparent power measurement section, and division section include
Highly accurate measurement is possible without requiring any linearity.
次に本発明の他の実施例について第3図を参照
して説明する。なお、第2図と同一部分には同一
符号を付して詳しい説明は省略する。第3図は本
発明に係る電気計器の他の実施例を示す構成図で
ある。第3図に示す電気計器は、アナログ遅延回
路10を計器用変圧器1と相関演算部13との間
に設け、計器用変圧器1からの第1の電圧信号
evを遅延して計器用変流器2からの第2の電圧
信号eiとの位相差を零にするようにしたものであ
る。 Next, another embodiment of the present invention will be described with reference to FIG. Note that the same parts as in FIG. 2 are given the same reference numerals and detailed explanations will be omitted. FIG. 3 is a configuration diagram showing another embodiment of the electric meter according to the present invention. The electric meter shown in FIG.
ev is delayed so that the phase difference with the second voltage signal ei from the instrument current transformer 2 is made zero.
第3図に示すように構成された電気計器におい
ても上記第1の実施例と同様の効果を奏すること
は言うまでもない。 It goes without saying that an electric meter configured as shown in FIG. 3 also has the same effects as the first embodiment.
本発明によれば、相関演算部により求められる
除算値を最大にする駆動周波数でもつて遅延手段
を駆動し、相関演算部への第1および第2の電圧
信号の位相差を零として力率および位相差を測定
するので、第1および第2の電圧信号の位相差の
大きさに関係なく正確な力率および位相差の測定
が行なえる精度の高い電気計器を提供できる。
According to the present invention, the delay means is driven at a driving frequency that maximizes the division value obtained by the correlation calculation section, and the phase difference between the first and second voltage signals to the correlation calculation section is set to zero, and the power factor and Since the phase difference is measured, it is possible to provide a highly accurate electric meter that can accurately measure the power factor and phase difference regardless of the magnitude of the phase difference between the first and second voltage signals.
第1図は従来における電気計器の構成図、第2
図は本発明に係る電気計器の一実施例を示す構成
図、第3図は本電気計器の他の実施例を示す構成
図である。
1……計器用変圧器、2……計器用変流器、3
……有効電力測定部、4……皮相電力測定部、5
……除算部、10……アナログ遅延回路、11…
…アナログ遅延駆動回路、12……演算回路、1
3……相関演算部。
Figure 1 is a configuration diagram of a conventional electric meter, Figure 2
The figure is a block diagram showing one embodiment of the electric meter according to the present invention, and FIG. 3 is a block diagram showing another embodiment of the electric meter. 1...Instrument transformer, 2...Instrument current transformer, 3
... Active power measurement section, 4 ... Apparent power measurement section, 5
...Division section, 10... Analog delay circuit, 11...
... Analog delay drive circuit, 12 ... Arithmetic circuit, 1
3...Correlation calculation section.
Claims (1)
を出力する変圧手段と、前記給電線に流れる消費
電流に比例した第2の電圧信号を出力する変流手
段と、前記変圧手段および前記変流手段からの第
1および第2の電圧信号のいずれか一方を遅延す
る遅延回路と、前記変圧手段および前記変流手段
からの前記第1および第2の電圧信号と前記遅延
回路からの遅延信号とにより前記給電線における
有効電力および皮相電力を求めてこれら有効電力
と皮相電力との除算値を求める相関演算部と、こ
の相関演算部により求められた除算値を最大にす
るとともに前記第1および第2の電圧信号の位相
差を零にする周波数の駆動信号を前記遅延回路へ
供給する遅延駆動回路と、この遅延駆動回路から
の駆動信号の周波数に基づいて演算し前記給電線
における力率および位相差を求める演算回路とを
具備したことを特徴とする電気計器。1. A transformer that outputs a first voltage signal proportional to the load voltage of the power supply line, a current transformer that outputs a second voltage signal that is proportional to the consumed current flowing through the power supply line, and the transformer and the transformer. a delay circuit that delays either one of the first and second voltage signals from the current transforming means; and the first and second voltage signals from the voltage transforming means and the current transforming means and a delayed signal from the delay circuit. a correlation calculation unit that calculates the active power and apparent power in the feeder line and calculates a division value between the active power and the apparent power; a delay drive circuit that supplies a drive signal with a frequency that makes the phase difference of the second voltage signal zero to the delay circuit; and a delay drive circuit that calculates the power factor in the feed line based on the frequency of the drive signal from the delay drive circuit. An electric meter characterized by comprising an arithmetic circuit for determining a phase difference.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4812483A JPS59173771A (en) | 1983-03-23 | 1983-03-23 | Electric meter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4812483A JPS59173771A (en) | 1983-03-23 | 1983-03-23 | Electric meter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59173771A JPS59173771A (en) | 1984-10-01 |
JPS6356504B2 true JPS6356504B2 (en) | 1988-11-08 |
Family
ID=12794577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4812483A Granted JPS59173771A (en) | 1983-03-23 | 1983-03-23 | Electric meter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59173771A (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4693214B2 (en) * | 2000-08-31 | 2011-06-01 | 東芝コンシューマエレクトロニクス・ホールディングス株式会社 | Inverter device |
EP1721228A4 (en) * | 2004-02-27 | 2008-01-02 | William D Mcdaniel | Automatic power factor correction using power measurement chip |
HU228288B1 (en) * | 2005-10-05 | 2013-02-28 | Antal Gasparics | Electricity meter with measuring device and with apparatus inspecting for proper operation of the measuring device |
JP5979413B2 (en) * | 2012-03-27 | 2016-08-24 | 公立大学法人大阪市立大学 | Power measuring device |
CN102901874B (en) * | 2012-11-08 | 2014-12-03 | 江苏凌创电气自动化股份有限公司 | Phase- and time mark measurement-based electronic transformer absolute delay detection method |
JP6093332B2 (en) * | 2014-07-31 | 2017-03-08 | 日本電信電話株式会社 | Apparatus and method for estimating phase delay between voltage and current |
KR20230043005A (en) | 2021-09-23 | 2023-03-30 | 주식회사 뉴파워 프라즈마 | Plasma reactor |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS564061A (en) * | 1979-06-23 | 1981-01-16 | Nippon Kogaku Kk <Nikon> | Phase difference measuring instrument |
-
1983
- 1983-03-23 JP JP4812483A patent/JPS59173771A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS564061A (en) * | 1979-06-23 | 1981-01-16 | Nippon Kogaku Kk <Nikon> | Phase difference measuring instrument |
Also Published As
Publication number | Publication date |
---|---|
JPS59173771A (en) | 1984-10-01 |
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