JPS6347049B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to snubber circuits that consume substantially no energy or power.

When driving an inductive load using a switching element such as a transistor, thyristor, or GTO, the rate of increase in voltage applied between the main terminals (e.g. collector, emitter) dv/dt at turn-off.
The surge voltage becomes excessive due to the energy of the load and wiring inductance, and switching loss and switching noise increase. For this reason, it is generally necessary to provide a snubber circuit as shown in FIG. 1 or 2 to limit dv/dt at turn-off. To explain the conventional snubber circuit using these two figures, 1 is a switching transistor, 2 is a snubber capacitor, 3 is a snubber diode, 4 is a resistor for discharging or charging, 5 is an inductive load, and 6 is a free circuit of the load 5. Wheeling diode 7 is a DC power supply.

The operation of the snubber circuit in Figure 1 is as follows: transistor 1
When the capacitor 2 is turned off, the power supply voltage E
If transistor 1 is turned on, load current flows through load 5, and at the same time,
The charge in the capacitor 2 is discharged via a discharge resistor 4. As a result, the terminal voltage of the capacitor 2 becomes approximately zero after a predetermined time and is reset, waiting until the next turn-off of the transistor 1. Next, when transistor 1 starts to turn off, the inertial current due to the magnetic energy of the load and wiring flows through diode 3.
The collector-emitter voltage increases slowly with the terminal voltage of capacitor 2, reducing the turn-off loss of transistor 1 by limiting dv/dt. When transistor 1 is completely turned off, capacitor 2 is charged again to the power supply voltage E with the polarity shown, and load 5
The current due to the magnetic energy is circulated by the freewheeling diode 6.

The snubber circuit shown in FIG. 2 operates in a mode almost opposite to that shown in FIG. , absorbs the magnetic energy of the load 5 through the diode 3 in the form of discharging the capacitor 2 at turn-off, thereby limiting the dv/dt applied to the transistor 1. When the capacitor 2 is completely discharged and the charging voltage becomes zero, the freewheeling diode 6 is turned on, and the capacitor 2 is not charged to the opposite polarity as shown.

As is clear from the above explanation, in the conventional snubber circuit, when the switching element 1 is turned on, the capacitor 2 must be discharged or charged by the resistor 4 and reset in preparation for the next turn-off.
Each charge or discharge causes a power loss of approximately 1/2CE ² (C is the capacitor capacity) in the resistor 4, which is a main factor in lowering the conversion efficiency of a high-frequency converter.

The present invention proposes a snubber circuit that does not consume energy and can substantially eliminate the power loss associated with resetting the snubber capacitor as described above.

FIG. 3 shows a first embodiment of the invention. In the same figure, the same symbols as in FIGS. 1 and 2 indicate corresponding circuit members, and 8 is a primary winding 9 of one to several turns and a secondary winding 10 of several turns to several tens of turns.
A current transformer (hereinafter referred to as CT) with turns ratio n (n>1) including
), the primary winding 9 is connected in series with the load 5 and the transistor 1 as shown. In addition, the black dots attached to each winding in the drawings indicate ends of the same polarity.
11 to 14 are diodes.

The operation of this circuit is as follows. Now, when transistor 1 is off, capacitor 2 is charged to power supply voltage E with the polarity shown. When transistor 1 is turned on, power supply 7, load 5, transistor 1, and the primary winding of CT8 Load current I ₁ flows through path 9. This current I ₁ flows through the secondary winding 10 due to the transformation action of CT 8 as I ₂ =I ₁ /n (however, CT
(ignoring current of 8 is ignored) flows in the direction of the arrow, and this current _{I 2 flows} through the secondary winding 10 and the diode 1.
1, a power supply 7, a primary winding 9, a capacitor 2, and a diode 14. Capacitor 2 is discharged by this current I ₂ and its electrostatic energy 1/
2CE ² is absorbed by the power supply 7. When the terminal voltage of the capacitor 2 becomes zero and is reset, the current I ₂ continues to flow in the opposite direction of the turned-on transistor 1 and through the diode 3, and the voltage of the capacitor 2 is maintained at zero. By the way, this current I ₂ is
It continues to flow until the core of CT8 is saturated or until transistor 1 is turned off, but in practical terms, a CT with a core that saturates after capacitor 2 is completely discharged and reset requires a smaller core. Economical. Further, in the case of pulse width control that controls the on-time of the transistor 1, an operation mode may be used in which the capacitor 2 is almost completely reset when the on-time is maximum, and is reset incompletely when the on-time is shortened.

Next, when transistor 1 starts to turn off, capacitor 2 is charged via diode 3 by the inertial current due to the magnetic energy of the circuit.
dv/dt applied to transistor 1 can be limited. At the same time, the voltage of the winding 10 is reversed to the opposite polarity by the excitation current of CT8, and diodes 13 and 12 conduct, causing the power supply 7 to absorb the excitation current of CT8, thereby resetting CT8. . In this embodiment, the diode 14 prevents the excitation current of CT8 from flowing to the capacitor 2, but this diode 14 and diode 13 are removed, and the excitation current of CT8 is absorbed by the capacitor 2 via the diode 12. Also good. Since this excitation current is very small compared to the main circuit current I ₁ , it does not significantly affect the snubber operation of the capacitor 2 . In addition, the reset of CT8 is not performed via the diode 12 or 13, but is
Even if a series circuit of a resistor and a diode is connected in parallel to the winding 9 or 10 of 8 and the excitation current is consumed by the resistor, no large power loss occurs.

Therefore, according to the snubber circuit of this embodiment, it is possible to improve the reverse recovery characteristics of the switching element without consuming substantial energy, so it is particularly advantageous when this snubber circuit is used in a high frequency switching circuit. The effect is great.

Next, FIG. 4 shows a second embodiment corresponding to the snubber circuit shown in FIG. 2 above. In the same figure, the same symbols as in FIG. 3 indicate corresponding circuit members, 15 to 15.
16 is a diode. To explain the operation of this circuit, when transistor 1 is currently off,
The terminal voltage of capacitor 2 is zero. Next, when transistor 1 turns on, power supply 7 connects load 5 to CT.
A load current I ₁ flows through the primary winding 9 of the transistor 8 and the transistor 1 . This current I ₁ causes current I ₂ to flow in the secondary winding 10 as I ₂ =I ₁ /n due to the transformation action of CT 8, and this current I ₂ flows through diode 15 and capacitor 2.
The capacitor 2 is circulated in the direction of the arrow shown in the figure to charge the capacitor 2 to the polarity shown. When the charging voltage of the capacitor 2 exceeds the power supply voltage E and is reset, the diode 3 turns on, and the current I ₂ flows through the diodes 3, 15,
It is absorbed by the power supply 7 via the primary winding 9 and the turned-on transistor 1 (in the reverse direction), and the charging voltage of the capacitor 2 is clamped to approximately the power supply voltage E. After capacitor 2 is reset in this way, CT
8 may be saturated as described above. Next, when the transistor 1 is turned off, the inertial current due to the magnetic energy of the load 5 circulates through the capacitor 2 and the diode 3, gradually discharging the charge voltage of the capacitor 2, and thereby applying it to the transistor 1.
Limit dv/dt. When the charging voltage of the capacitor 2 becomes zero, the diode 6 turns on, clamping the collector voltage of the transistor 1 to the power supply voltage E, and holding the charging voltage of the capacitor 2 at zero. At the same time, the polarity of the voltage of the winding 10 is reversed by the excitation current energy of the CT 8, and this voltage turns on the diode 16, so that the excitation current of the CT 8 is absorbed by the power supply 7 via the diode 6.

Next, FIG. 5 shows a modification of the embodiment shown in FIG. 4, and is a snubber circuit suitable for a single-stone converter or the like in which the collector voltage of the transistor 1 rises above the power supply voltage. In this circuit, first the transistor 1
It is assumed that when the capacitor 2 is off, the capacitor 2 is charged to, for example, the power supply voltage E with the illustrated polarity, and a voltage of 2E is applied to the collector of the transistor 1.
When the transistor 1 is turned on, the load 5 is transferred from the power supply 7,
A current I 1 flows through the primary winding 9 and the transistor ₁ , and a secondary current I ₂ circulates through the capacitor 2, the transistor 1, and the diode 15, charging the capacitor 2 in the opposite direction to the illustrated polarity. When the charging voltage of the capacitor 2 reverses and exceeds the power supply voltage E, the diode 3 turns on and clamps the charging voltage to E. Next, when transistor 1 is turned off, capacitor 2 is charged again to the polarity shown by the inertia current of load circuit 5, and is applied to transistor 1.
Limit dv/dt.

Also, compared to the above embodiment, this circuit has CT8
There are some differences in the operation mode. The first point is CT8
It is undesirable for the voltage of the capacitor 2 to saturate at least to zero while the transistor 1 is on. That is, capacitor 2
CT when charge voltage of the polarity shown remains in the
8 is saturated and the voltage carrying capacity of the winding 10 is lost, there is no longer any element that limits the discharge current of the capacitor 2, and the collector current of the transistor 1 increases.

The second point is that excitation of CT8 is performed by discharging the indicated polarity voltage of capacitor 2, and resetting is performed with power supply voltage E via diodes 3 and 15, so it is necessary to provide a separate reset diode for CT8. There is no such thing.

Next, FIG. 6 shows an embodiment in which the present invention is applied to a bridge type inverter, where 5 is a load, 7 is a DC power supply, 21 to 24 are switching transistors constituting the bridge, 17 to 20 are freewheeling diodes, 25 to 28 are snubber capacitors, 29 to 32 are snubber diodes, 33, 3
4 are primary windings 35, 36 and secondary windings 37, respectively.
and 38, 39, and 40, and 41 to 50 are diodes. The basic operation of this circuit is the third
Although it is the same as the embodiment shown in the figure and detailed explanation will be omitted, the main feature is that one CT 33 or 34
A pair of transistors 21 and 22 turn on simultaneously at
Or 23 and 24 snubber capacitors 25 and 26
Alternatively, reset of CTs 27 and 28 is performed at the same time, and only one reset diode 45, 46 is provided for each CT 33, 34, respectively. Also, in this circuit, CT33 and CT34
Although they are separate, each of the windings 35 to 40 may be provided in one CT using a common core with the polarities indicated by the black dots.

Next, FIG. 7 shows another embodiment of the present invention,
This is an overdrive that uses the transform current of the CT to shorten the turn-on time of the switching transistor. In the same figure, symbol 1
3 and 5 to 13 indicate members corresponding to those described in the embodiment of FIG. 3, and their operation is almost the same as that of FIG. It's summery. The drive transformer 51 includes a drive winding 52 connected to the base and emitter of the transistor 1, a feedback winding 53 that passes the emitter current of the transistor 1 and positively feeds the current back to the drive winding 52, and turns on the transistor 1.
It is provided with a control winding 54 whose off-state is controlled by a circuit not shown. This drive method itself is known as a current feedback method, and a base current whose value is always proportional to the collector current of transistor 1 (that is, determined by the winding ratio of windings 52 and 53) is obtained, and the optimum operation of transistor 1 is achieved. This has the advantage of requiring minimal control power. In this embodiment, the drive transformer 51 is provided with a second feedback winding 55, and this winding is connected in series with the secondary winding 10 of the CT 8 with the polarity shown. With such a configuration,
At the time of turning on the transistor 1 and at the initial stage of turning on,
A transform current I ₂ of the CT 8 flows in the direction of the arrow shown in the figure through the feedback winding 55, and this current is transformed by the transformer 51 to the drive winding 52 and applied to the base of the transistor 1 as an overdrive current. This overdrive current disappears when CT8 is saturated and current _I2 disappears, and from then on, the base of transistor 1 is driven by the normal feedback current from feedback winding 53, so transistor 1 is brought into an oversaturated state. As a result, storage time etc. are not increased. Also, when transistor 1 is turned off,
The excitation current of CT8 is directed to the feedback winding 5 in the opposite direction to the current _I2 .
However, as in the embodiment shown in FIG. 4, the CT8 is reset using the power supply voltage so that the excitation current of the CT8 does not flow through the winding 55. Good too.

As described above, in the present invention, the switching element, the load, and the current transformer are connected in series with each other, and during the ON period of the switching element, the load current flowing through the switching element causes the secondary winding of the current transformer to The capacitor is reset by discharging or charging the capacitor via a diode that conducts with respect to the transform current induced in the capacitor. Therefore, the load current is caused by the transformation action of the current transformer to actively flow a current approximately inverse to the turns ratio in its secondary winding, and this current continues until the core of the current transformer is saturated or when switching Continues to flow until the element is turned off. Therefore, according to the present invention, it is possible to substantially eliminate the loss of the snubber circuit, which has traditionally been a large power loss, and it is possible to greatly improve the efficiency of converters and the like.

In the description, the forward voltage drop of diodes, transistors, etc. is assumed to be zero. Further, the reset of the CT in each embodiment is not limited to the embodiment, and for example, a method such as providing a secondary winding for reset and connecting it to the power supply via a diode may be used.

[Brief explanation of the drawing]

1 and 2 are diagrams for explaining a conventional snubber circuit, FIGS. 3 to 5, and 7 are diagrams showing different embodiments of the snubber circuit according to the present invention, and FIG. 6 is a diagram for explaining a conventional snubber circuit. 1 is a diagram showing a bridge type inverter to which an embodiment of a snubber circuit according to the present invention is applied. 1,21-24...Switching element, 2,2
5-28... Capacitor, 3, 6, 11-13,
15, 16, 17-20, 29-32, 41-5
0... Diode, 5... Load, 7... DC power supply, 8, 33, 34... Current transformer (CT), 51
...Drive transformer.

Claims (1)

[Claims] 1. In a snubber circuit in which a capacitor limits the voltage increase rate dv/dt when the switching element is turned off, a load and a current transformer are provided in series with the switching element, and when the switching element is on, the switching element is turned off. A snubber circuit, wherein the capacitor is reset through a diode that conducts to a transform current induced in the secondary winding of the current transformer by a load current flowing through the snubber circuit.