JPS6346703A - Drive signal generator for actuator - Google Patents

Abstract

PURPOSE:To generate duty signals having high precision and mutually antiphase signals at low cost by mounting a start-signal generating circuit, an inversion signal generating circuit and first and second output circuits. CONSTITUTION:A start-signal generating circuit B generates signals displaying the start of duty signals at every fixed time interval, and an inversion signal generator. A generates inversion signals at the time of the completion of duty poriods given as the result of the operation of a computer. First and second output circuits C, D receive start signals and inversion signals, and the first output circuit C generates outputs at a high level by the start signals, but the second output circuit generates outputs at a low level. Outputs from the first output circuit C are inverted to the low level from the high level by the inversion signals, outputs from the second output circuit D are inverted to the high level from the low level, and two duty signals having mutually antiphase are generated from the first and second output circuits C, D. Accordingly, two antiphase duty signals mutually having no delay time are acquired without using an inverter.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive signal generating device for an actuator operated by two duty signals having mutually opposite phases.

[Prior art] Eye 1/Less bead 3/1113 with two solenoids disclosed in Japanese Patent Application Laid-Open No. 59-1914668
When controlling the rotary solenoid valve for il, Ayudy No. 48, which corresponds to the intake air i1 required for the engine,
That is, it is necessary to supply the first duty signal and the second duty signal having a phase opposite to that of the rotary solenoid valve as an actuator. Conventionally, when generating these two duty signals of opposite phases, an inverting amplifier called an inverter is used to generate the first duty signal.
A second signal was generated from this signal. However, the second
The actuator is driven using a conventional inverter as shown in the figure.[In the word generator, there is a delay time of 1.12 inherent to the inverter as shown in Figure 2B, It was difficult to provide a duty signal. If a time lag occurs between the two antiphase signals, an error will occur in the duty signal and the intake air flow rate. For this reason, it is possible to separately install a delay circuit for phase adjustment, but adjusting the delay time of the delay circuit is a complicated and expensive circuit. It is also possible to use a high-speed element as an impark circuit, but it has many disadvantages such as being susceptible to noise and being limited to I5 circuits.

[Problems to be solved by the invention] The present invention does not use an inverter as in the past.
In addition, we have developed an actuator drive signal generation device that can generate duty signals at low cost with improved accuracy and mutually opposite phase signals without the need for a specially designed inverter circuit or delay circuit. The purpose is to provide.

[Means for solving the problem 1-] A drive signal generating device for an acticoator that operates with two duty signals having mutually opposite phases generates an I;i start between duty jil1 at predetermined time intervals. A start signal generation circuit that generates an acceptance start signal, an inversion signal generation circuit that generates an inversion signal at the end of a given duty period, and an inversion signal generation circuit that generates an inversion signal at the end of a given duty period. a first output circuit that generates a first duty signal as a low-level output according to the inverted signal; and a first output circuit that receives the start signal and the inverted signal and generates a low-level output according to the start signal and generates the first duty signal as a low-level output according to the inverted signal. A second output circuit is provided which generates a second duty signal as a higher level output.

CfTIE) The start signal generation circuit generates a signal indicating the start of the duty period at a predetermined time interval I::Am, and the inversion signal generation circuit generates a signal at the end of the duty period given as a result of the computer operation C). Generates an inverted signal. The first and second output circuits receive the signal and the inverted signal, and the start signal causes the first output circuit to generate a high level output, while the second output circuit generates a low level output. The inverted signal causes the output of the first output circuit to be inverted from a high level to a low level, and the output of the second output circuit to be inverted from a low level to a high level. Two duty signals having opposite phases are generated from the output circuit.

(Embodiment) Fig. 1 is a block diagram of an embodiment of the actuator duty signal 8 generating device according to the present invention. , indicates the case where a duty signal is generated depending on the amount of intake air. angle senna,
Set the duty value calculated by the computer directly on the water temperature sensor and air meter in the output conveyor register 63, and compare it with the value of the timer counter 61 in the digital inverter 62. When it matches (IC1) of the conveyor register 63, a match signal is generated.The timer count 61, digital comparator 62, and output conveyor register 63 constitute an inverted signal generating circuit Δ.

Flip-flops 651 and 652 constitute a first output circuit C, and flip-flops 653 and 654 constitute a second output circuit (j4), and these first and second output circuits C and D are inverted. A coincident signal, which is an inverted signal, is received from the A1ζ generation circuit A, and each output is inverted. Also, the J4 included signal line W This signal indicates the start of the start signal generation circuit B.

In the figure, 64 is a bus for setting values in the output conveyor register 63 and flip-flop 65. As a result, for example, the first output circuit C generates a high level output due to the start signal, and the second In the output circuit, a low level output is generated by the start signal. Further, 7 is an amplifier, and 80 is an OR circuit. In this manner, the respective outputs of the first and second output circuits C, D simultaneously generate high or low level outputs due to the start signal and inversion signal common to these output circuits. Moreover, since these levels are simultaneously inverted, two duty signals of opposite phases with no time delay are supplied to the rotary solenoid valves 14, respectively.

FIG. 3 shows a basic configuration diagram of an engine control system in which the drive signal valve device of the present invention is used to supply a duty signal to the rotary solenoid valve 14 for idle speed control. 11 is the angle sensor built-in disk 1
~Rebuild 1.12 has 1 water temperature sensor, 13 has air flow make, 15 has 1 fuel jet, 16 has igniter, 1
indicates the engine control j11 computer. Engine control computer 1, angle signal from engine angle sensor 11, intake air amount information from air flow meter 13,
Engine cooling water temperature information is input from the water temperature sensor 12, and based on this information, an injection signal for the fuel 1 injector 15, an ignition signal for the igniter 16, and an energization signal for the rotary solenoid 14 for idle speed control are output.

The configuration of the engine control computer 1 is the same as that of the conventional one, and a detailed explanation will be omitted.

Figure 4 shows the structure of the electrical part of the rotary solenoid valve 14. Permanent magnet 31 and two solenoids 32.3
The position of the valve is determined by the balance of the magnetic forces in step 3, and duty signals with opposite phases are input to the two solenoids. FIG. 5 shows the duty signal input to a solenoid that generates a magnetic force in the direction of listening to the valve and the flow rate through the valve.

FIG. 6 is a timing flowchart of fuel injection control, idle speed control, and ignition advance control. Step 400 is fuel injection control, which is optimized based on the latest engine speed, intake air amount, engine cooling water temperature, etc. Fuel injection! Find 11Nffi. The idle speed control in step 420 is calculated every 32 m5. Idle speed control (calculate the optimum duty ratio from the latest engine speed, engine cold water temperature, etc. Step 44)
The ignition timing control of 0 is calculated every 180°C. Ignition timing control uses the latest engine speed, engine cooling water temperature,
The optimal ignition time 191 is determined from the intake air amount, etc.

The control of the solenoid valve for controlling the idle speed Ll is executed as the processing in flow steps N7-1 to N7-1 in FIGS. 7 and 8.

In the flowchart of FIG. 7, first, step 1o
At O, it is determined whether the engine is stopped. If the engine is stopped, there is no need to supply air m to the engine, so the duty is set to 0% in step 110. If the engine is not stopped, a prospective process is performed in step 120. In the predictive processing, a correction duty is set to prevent the engine speed from dropping when there is an electrical load or when the air conditioner is turned on.

In step 130, the starting state (engine speed ≦40
ORPM). If it is in the starting state, step 140 starts i+jノ! ``Conduct the control.The starting control is the learned value of the duty ratio that absorbs variations in the idle speed control valve and changes over time, and the duty ratio determined by the engine cooling water temperature.Step 12
The control duty is determined by adding the idle up duty at the time of start determined by the idle up duty determined by the idle value determined by 0 and the cooling water temperature, and the process moves to step 210. When it is not in the starting state, the dashpot disable 1 in step 150 is set to 1.Dashpot control is set to 1, engine rotation speed ≦2000PPM.
In order to save the engine speed from low F during deceleration, concentrate on control duty. I'm looking for cocoy.

In step 160, an open loop 1+l m is performed. In the oven loop control, a control duty ratio is determined by adding the duty ratio determined by the current engine coolant water temperature, the child value, the dashpot correction duty ratio, and the learned value.

In step 170, it is determined whether a feedback condition is met. The feedback condition is that the ldL signal is ON,
Vehicle speed≦2Km/h, air conditioner signal o+: Determine whether all conditions of F are satisfied. When the feedback condition is not satisfied, the process moves to upper and lower limit guard processing in step 210. When feedback condition A1 is established, step 180
Executes feedback control. In feedback control, the control duty is determined by adding the duty ratio determined by the engine cooling water temperature, the expected value, the integral duty and the proportional duty determined from the difference between the target rotation speed determined by the engine cooling water temperature and the current engine rotation speed.

In step 190, the engine coolant temperature (T l-
I W ) is 80° C. or higher.

When THW<80° C., the process moves to upper and lower limit guard processing in step 210. When THW≧80'C, step 20
0 learning control is performed. In learning control, the difference between the engine rotation speed and the target rotation speed determined from the engine cold water temperature,
The learning value is changed based on the amount determined from the difference between the integral term and the learning i+l'i. The upper and lower limit guard processing in step 210 compares the obtained control duty with the upper and lower limit guard values determined from the engine cooling 1 water temperature, and if it deviates from the upper and lower limit guard values, the upper and lower limit guard values are set and the control duty is changed. It is something that is regulated.

Figure 8 shows 4. 9 is a flowchart of duty output control in a timer interrupt that occurs every rrlS, and FIG. 9 shows a timing chart of duty output control. Idle speed control (ISO) automatic output capo-1-
As shown in Figure 4, ``When current is applied to the solenoid of a rotary solenoid valve, the flow 15 increases.'' The idle speed ii + I Tsuru II (I S O) Close output boat is the boat where the flow rate decreases. .

At step 300, it is determined whether or not the forceps duty is 0%. When the control duty is 0%, step 370
, immediately turn the oven output to FF.

At step 380, the close output is turned on immediately.

When the control duty is not 0%, the oven output is immediately turned ON at step 310, and the close output is turned OFF at 320. Next, in step 330, the time (T1) corresponding to the duty ratio is calculated using the timer counter (step 6
1) and set in the output conveyor register (step 63) in step 340. Same u, 1
(In step 350, the oven output is set to OFF, and in step 360, the close output is set to ON.
Terminate the mS timer interrupt.

1 shift of the conveyor register (step 63) and timer counter set by the 4mS timer interrupt (step 61)
When they match (X1 hours after the conveyor register setting), the open output turns ON → OFF, and the close output turns OFF.
F is reversed from ON to ON.

Thereafter, the repeat system 611 is performed every 4 ms.

In the above embodiment, two outputs with opposite phases are passed to the controller 1 using a single output conveyor register, but it is of course possible to control the output using two output conveyor registers. be.

〔Effect of the invention〕

A start signal indicating the start of a duty period generated at predetermined time intervals without using an inverter to generate two duty signals g having opposite phases to each other, and a start signal indicating the start of a duty period given as a result of computer calculation. The first one generates two duty signals by an inverted signal indicating the output.
and a second output circuit simultaneously. Since high-level and low-level outputs are generated, and these high-level and low-level outputs are inverted, two opposite (V-phase) duty signals that do not open during delay can be obtained. , 1 due to time delay due to inverter use
Since there is no need to install a special phase-adjusting De-1 Louis circuit or to use an impark of a high-speed operation element to correct the difference, the actuator can be driven at low cost and with high 711 degrees and high reliability. A signal generator is obtained.

Figure 1 is a block diagram of an embodiment of the duty signal generator for an actuator according to the present invention, and Figure 2 is a detailed explanation of the fvI diagram of the drawings.

FIG. 2B is a block diagram of a conventional duty signal generator and a waveform diagram of a duty signal, and FIG.
Fig. 4 is a diagram showing the structure of the electrical part of the rotary solenoid valve, Fig. 5 is a graph showing the relationship between the flow rate and duty ratio of the solenoid valve, and Fig. 6 is the fuel injection control, idler's beadle 11. Figures 7 and 8 are timing flowcharts for controlling the idle speed vII solenoid valve, and Figure 9 is a timing flowchart for duty output control.

In the figure, △...Inversion signal generation circuit, B...Start signal generation circuit, C...First output circuit, D...
...Second output circuit, 14... Actuator.

Claims (2)

[Claims] (1) In a drive signal generation device for an actuator operated by a first duty signal and a second duty signal having mutually opposite phases, a start signal for generating a duty period start signal at predetermined time intervals is started. a signal generating circuit; an inverted signal generating circuit that generates an inverted signal at the end of a given duty period; and an inverted signal generating circuit that receives the start signal and the inverted signal, generates a high level output in response to the start signal, and generates a low level output in response to the inverted signal; a first duty signal which generates the first duty signal as an output of the
and a second output circuit that receives the start signal and the inverted signal, generates a low level output in response to the start signal, and generates the second duty signal as a high level output in response to the inverted signal. An actuator drive signal generation device comprising: (2) The device according to claim 1, wherein the inverted signal generating device includes a counter that is incremented at regular intervals, a register that can be set by a program, and a device that compares the counter and the register. An actuator drive signal generating device having a digital comparator and using a coincidence signal from the comparator as the inverted signal.