JPS6343998B2 - - Google Patents
Info
- Publication number
- JPS6343998B2 JPS6343998B2 JP55144103A JP14410380A JPS6343998B2 JP S6343998 B2 JPS6343998 B2 JP S6343998B2 JP 55144103 A JP55144103 A JP 55144103A JP 14410380 A JP14410380 A JP 14410380A JP S6343998 B2 JPS6343998 B2 JP S6343998B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- winding
- transistor
- turns
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
- H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
- H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
- H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/338—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Description
【発明の詳細な説明】
本発明は直流電圧が印加されるトランスの１次
巻線にトランジスタを設け、このトランジスタを
オン、オフさせてトランスの２次巻線側に出力電
圧を得る静止型電力変換器に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a static power source that provides a transistor in the primary winding of a transformer to which a DC voltage is applied, and turns this transistor on and off to obtain an output voltage on the secondary winding side of the transformer. It concerns a converter.
従来の静止型電力変換器の電気的回路を第１図
に示す。第１図において、１はトランスで、W1
が１次巻線、W2が２次巻線、W4が正帰還用の帰
還巻線である。２は１次巻線W1に接続したトラ
ンジスタで、このトランジスタ２のベースには、
帰還巻線W4と帰還抵抗３、起動抵抗４が接続さ
れている。２次巻線W2には整流用のコンデンサ
５および同ダイオードが各々２個接続され、２次
巻線W2の両端に発生した電圧を倍圧整流してい
る。７は負荷である。 The electrical circuit of a conventional static power converter is shown in FIG. In Figure 1, 1 is a transformer, W 1
is the primary winding, W2 is the secondary winding, and W4 is the feedback winding for positive feedback. 2 is a transistor connected to the primary winding W 1 , and the base of this transistor 2 is
A feedback winding W4 , a feedback resistor 3, and a starting resistor 4 are connected. Two rectifying capacitors 5 and two rectifying diodes are each connected to the secondary winding W 2 to double and rectify the voltage generated across the secondary winding W 2 . 7 is the load.
次に、動作について説明する。入力に所定電圧
を印加するとトランジスタ２のベースに電流が流
れ、トランジスタ２はオンする。すると電流が、
１次巻線W1、トランジスタ２のコレクタ―エミ
ツタ間を介して流れる。また、上記トランジスタ
２は、コレクタ電流IC、ベース電流IC、トランジ
スタのhFE特性との関係が
IC＞hFEIB ……(1)
となつたときに、スイツチをオフする。よつて、
徐々に１次巻線に流れる電流が増加し、コレクタ
電流ICがベース電流の増加量よりも増加して上記
(1)式の関係になればトランジスタ２はオフする。
このとき、１次巻線に蓄えられたエネルギが２次
巻線W2側に出力される。そしてこのエネルギが
放出されれば、帰還巻線W4に電圧が発生し、ト
ランジスタ２のベースに電流が流れ、トランジス
タ２は再度オンし、上記動作を繰り返し、２次巻
線W2にオン、オフに同期して出力し、その出力
電圧をダイオード６およびコンデンサ５により整
流平滑し、直流電圧を負荷７に供給する。 Next, the operation will be explained. When a predetermined voltage is applied to the input, a current flows to the base of transistor 2, and transistor 2 is turned on. Then the current is
It flows through the primary winding W 1 and between the collector and emitter of the transistor 2. Further, the transistor 2 is turned off when the relationship between the collector current I C , the base current I C , and the h FE characteristic of the transistor becomes I C >h FE I B (1). Then,
The current flowing through the primary winding gradually increases, and the collector current I C increases more than the base current increase, resulting in the above
When the relationship expressed by equation (1) is satisfied, transistor 2 is turned off.
At this time, the energy stored in the primary winding is output to the secondary winding W2 . When this energy is released, a voltage is generated in the feedback winding W 4 , current flows to the base of transistor 2, transistor 2 is turned on again, the above operation is repeated, and the secondary winding W 2 is turned on. The output voltage is output in synchronization with the off state, and the output voltage is rectified and smoothed by a diode 6 and a capacitor 5, and a DC voltage is supplied to a load 7.
第１図に回路における入出力特性をとると、第
３図のようなノンリニアな特性となる。これは入
力電圧が上がると、帰還巻線W4に発生する電圧
も増加し、よつてトランジスタ２のベース電流も
上がるため、コレクタ電流ICがベース電流IB×hFE
に達するまでの時間も長くなり、よつてトランジ
スタ２のON、OFFのデイユーテイサイクル
（ON時間／ON時間＋OFF時間）が上がり、入力電圧その
ものの上昇とデイユーテイサイクルの上昇とが相
乗効果となつて現われるためである。又、hFEの
変化によつて第３図の如く特性カーブの勾配が著
しく変化する欠点がある。 If the input/output characteristics of the circuit are taken in FIG. 1, the characteristics will be non-linear as shown in FIG. 3. This is because when the input voltage increases, the voltage generated in the feedback winding W 4 also increases, and the base current of transistor 2 also increases, so the collector current I C changes to the base current I B ×h FE
The time it takes to reach this value becomes longer, and therefore the ON/OFF duty cycle (ON time/ON time + OFF time) of transistor 2 increases, and the increase in the input voltage itself and the increase in the duty cycle have a synergistic effect. This is because it appears as a. Another drawback is that the slope of the characteristic curve changes significantly as shown in FIG. 3 as h FE changes.
そこで、この欠点を改良するために第２図の回
路があげられる。この回路は第１図の回路にフラ
イホイール巻線W3とダイオード８の直列体を入
力電源間に接続したものである。このフライホイ
ール巻線W3の働きはトランジスタ２のオン、オ
フのデユーテイ比を設定し、出力側である２次巻
線W2側の電圧をリニア特性にするものである。
上記デユーテイ比は１次巻線W1と２次巻線のW2
により決定することができ、仮りにW1の巻線と
W2の巻線を同一とすれば、デユーテイ比を50％
にすることができる。しかし、トランジスタ２の
hFEが変化すると、第４図のように、やはり多少
の勾配の変化が現われる。これはhFEの変化によ
つて発振周波数が変化する（hFEが上昇すると周
波数が下降する。）ためである。 Therefore, in order to improve this drawback, the circuit shown in FIG. 2 is proposed. This circuit is obtained by connecting a series body of a flywheel winding W3 and a diode 8 between the input power supply to the circuit shown in FIG. The function of this flywheel winding W3 is to set the on/off duty ratio of the transistor 2, and to make the voltage on the output side of the secondary winding W2 linear.
The above duty ratio is W 1 for the primary winding and W 2 for the secondary winding.
can be determined by, if W 1 winding and
If the windings of W 2 are the same, the duty ratio will be 50%.
It can be done. However, transistor 2
When h FE changes, a slight change in slope also appears as shown in Figure 4. This is because the oscillation frequency changes as h FE changes (as h FE increases, the frequency decreases).
また、フライホイールダイオード８を介して入
力側にエネルギーを帰還しているため、１次巻線
W1には帰還しているエネルギー分だけ余分にエ
ネルギーを印加していることになり、そのため、
第１図の回路と比較すると１次巻線W1に発生す
る銅損は大きく、余分に励磁された分だけ鉄損も
大きくなる。しかも、エネルギーが帰還される時
にはフライホイール巻線W3、フライホイールダ
イオード８には大電流が流れるため、このフライ
ホイール巻線W3における損失は電流をIF、ダイ
オードの順方向ドロツプをWF、フライホイール
巻線W3の直流抵抗をRFとすると、IF×VF＋IF 2×
RFと大きなものとなる。このように第２図の回
路では、入出力特性はリニアな物が得られるが、
hFEのバラツキ、ドリフトによる入出力特性の変
化があるため、全く精度の必要のないもので、か
つ効率を問題にしない用途にしか使用できない。 Also, since the energy is fed back to the input side via the flywheel diode 8, the primary winding
This means that extra energy is applied to W 1 by the amount of energy that is being returned, and therefore,
Compared to the circuit shown in FIG. 1, the copper loss occurring in the primary winding W1 is large, and the iron loss is also large due to the extra excitation. Moreover, when the energy is fed back, a large current flows through the flywheel winding W 3 and the flywheel diode 8, so the loss in the flywheel winding W 3 is to reduce the current I F and the forward drop of the diode W F , if the DC resistance of the flywheel winding W 3 is R F , then I F ×V F +I F 2 ×
R F will be a big one. In this way, the circuit shown in Figure 2 provides linear input/output characteristics, but
h Due to variations in FE and changes in input/output characteristics due to drift, it can only be used for applications that do not require precision at all and where efficiency is not an issue.
本発明は以上のような従来の欠点を除去するも
のである。 The present invention eliminates the drawbacks of the prior art as described above.
以下、本発明の実施例を図面第５図〜第９図に
より説明する。 Embodiments of the present invention will be described below with reference to FIGS. 5 to 9.
まず、第５図において、９はトランスであり、
W1は１次巻線、W2は２次巻線、W4は正帰還用
の帰還巻線、W5は３次巻線、１０はトランジス
タ、１１は帰還抵抗、１２は起動抵抗、１３は整
流用のダイオード、１４は同じく整流用のコンデ
ンサ、１５はダイオード、１６は２次巻線W2の
出力側に接続される整流用ダイオード、１７は同
じく整流用のコンデンサ、１８は負荷である。 First, in Fig. 5, 9 is a transformer,
W 1 is the primary winding, W 2 is the secondary winding, W 4 is the feedback winding for positive feedback, W 5 is the tertiary winding, 10 is the transistor, 11 is the feedback resistor, 12 is the starting resistor, 13 is a rectifying diode, 14 is a rectifying capacitor, 15 is a diode, 16 is a rectifying diode connected to the output side of the secondary winding W2 , 17 is a rectifying capacitor, and 18 is a load. .
第７図ａは入力電源のを基準にV2の電圧を、
第７図ｂ〜ｄはV1の電圧を示したものである。
VBは入力電圧を示している。 Figure 7a shows the voltage of V 2 based on the input power supply,
Figures 7b to 7d show the voltage of V1 .
V B indicates the input voltage.
トランジスタ１０がONの時には１次巻線W1
の両端に電源電圧が印加され、１次巻線W1を通
じて磁気エネルギーが蓄積されるとともに２次巻
線W2には次式のような電圧が発生する。 When transistor 10 is ON, primary winding W 1
A power supply voltage is applied to both ends of , magnetic energy is accumulated through the primary winding W 1 , and a voltage as shown in the following equation is generated in the secondary winding W 2 .
VB×W2の巻数／W1の巻数 ……１
VB：入力電圧
次にトランジスタ１０がOFFした時にはコア
に蓄積された磁気エネルギーが電力になつて現わ
れ、１次巻線W1、２次巻線W2、帰還巻線W4、
３次巻線W5に電圧が発生する。１次巻線W1の電
圧V2は第７図ａの入力電圧VBより電圧VFと高い
電圧が発生し、３次巻線W5の電圧V1は第７図の
ｂ〜ｄのように入力電圧VBより電圧VC低い負の
電圧が発生する。この場合、スイツチングトラン
ジスタ１０のON時間が大きくなる程蓄積エネル
ギーが大きくなりOFF時に発生する電圧も高く
なるので、入力電圧VBを一端に接続した３次巻
線W5の他端側に発生するOFF時の電圧V1は第７
図ｄ→ｄのように負へバイアスされる電圧が増加
する。第５図の回路ではトランジスタ１０のベー
ス電流I3が大きくなるか、又はhFEが大きくなれ
ばコレクタ電流の飽和値も大きくなり、トランジ
スタ１０のON時間は長くなる。逆にベース電流
I3が小さいか又はhFEが小さい時にはその逆とな
る。つまりhFEが一定であれば、ON時間はベース
電流I3に比例することになる。例えば第５図の回
路で何らかの要因でベース電流I3が目標値よりも
小さかつたとする。その場合ON時間は短かくな
り３次巻線W5の波形は第７図ｄのようになり、
トランジスタ１０がON時には３次巻線W5の電
圧V4は入力電圧VBより電圧VD高い電圧が発生
し、その電圧は１次巻線W1と３次巻線W5の巻数
比によつて決定され次式のようになる。 V B × Number of turns of W 2 / Number of turns of W 1 ... 1 V B : Input voltage Next, when the transistor 10 is turned off, the magnetic energy accumulated in the core appears as electric power, and the primary winding W 1 , 2 Next winding W 2 , feedback winding W 4 ,
A voltage is generated in the tertiary winding W5 . The voltage V 2 of the primary winding W 1 is higher than the input voltage V B in Figure 7 a, which is V F , and the voltage V 1 of the tertiary winding W 5 is higher than the input voltage V B in Figure 7 a. As such, a negative voltage that is lower than the input voltage V B by the voltage V C is generated. In this case, as the ON time of the switching transistor 10 increases, the stored energy increases and the voltage generated when it is OFF also increases, so that the voltage generated at the other end of the tertiary winding W 5 connected to one end of the input voltage V B increases. The voltage V 1 when OFF is the seventh
As shown in the diagram from d to d, the voltage biased negatively increases. In the circuit of FIG. 5, as the base current I 3 of the transistor 10 increases or as h FE increases, the saturation value of the collector current also increases, and the ON time of the transistor 10 increases. Conversely, the base current
The opposite is true when I 3 is small or h FE is small. In other words, if h FE is constant, the ON time is proportional to the base current I 3 . For example, assume that the base current I3 in the circuit shown in FIG. 5 is smaller than the target value for some reason. In that case, the ON time will be shortened and the waveform of the tertiary winding W5 will be as shown in Figure 7d,
When the transistor 10 is ON, the voltage V 4 of the tertiary winding W 5 is higher than the input voltage V B by the voltage V D , and the voltage is proportional to the turns ratio of the primary winding W 1 and the tertiary winding W 5 . Therefore, it is determined as follows.
入力電圧VB×W5の巻数／W1の巻数＋VB……２
又、OFF時には第７図ｄのように入力電圧VB
より電圧VC低い電圧が発生する。この電圧VCは
ON時間が短かいため当然小さい。このOFF時に
は、コンデンサ１４の端子電圧V4は第７図ｄの
ように正の電圧を発生し、かつ、ON時には、ダ
イオード１３の働きによりOFF時の電圧を保持
するため、トランジスタ１０のON、OFF期間に
おいてほぼ同一の電圧値となる。よつて、ON時
に発生するベース電流I3が小さいときには、コン
デンサ１４の電圧V4が正の電圧で、ベース電圧
V3より高い電圧となり、ダイオード１５を介し
てコンデンサ１４、ダイオード１３側に、帰還巻
線W4からの電流I2が流れ込まず、この電流I2はす
べてベース電流I3として使われ、ON時間を長く
する方向に動作する。 Input voltage V B × Number of turns of W 5 / Number of turns of W 1 + V B ... 2 In addition, when OFF, the input voltage V B
A voltage lower than V C is generated. This voltage V C is
Naturally, it is small because the ON time is short. When the transistor 10 is turned OFF, the terminal voltage V4 of the capacitor 14 generates a positive voltage as shown in FIG. The voltage value is almost the same during the OFF period. Therefore, when the base current I3 generated when ON is small, the voltage V4 of the capacitor 14 is a positive voltage, and the base voltage
The voltage becomes higher than V 3 , and the current I 2 from the feedback winding W 4 does not flow into the capacitor 14 and diode 13 side via the diode 15, and this current I 2 is all used as the base current I 3 , and the ON time It moves in the direction of lengthening.
今度はベース電流I3が大きい場合を考えてみる
と、その出力電圧は上記と逆になり第７図Ｃの波
形となる。この場合、ベース電流I3は充分に大き
くなるため、第７図Ｃのような電圧が３次巻線
W5に発生する。その場合第５図の回路では３次
巻線W5に発生した電圧はダイオード１３により
整流されコンデンサ１４の電圧V4は負の極性の
電位となり、ベース電圧V3よりも電位が下がり、
トランジスタ１０のON時にもこの電圧を保持す
る。そのため、トランジスタ１０のON時には、
ダイオード１５はONとなり、電流I2はI1とI3に分
流されるためベース電流I3は減ることになる。ベ
ース電流I3は減れば、第７図ｄのようにVCが小さ
くなるため、結局第７図ｂのようにV1の電圧の
負のピーク値はベース電圧V3よりもダイオード
の順方向ドロツプ２個分下つた電圧となる。つま
りトランジスタ１０のhFEが変化した場合でも自
動的にベース電流I3は調整され３次巻線W5の電
圧は第７図ｂの状態を保つことができる。安定状
態における３次巻線W5のトランジスタOFF時の
電圧VCはダイオード１３の順方向電圧を無視す
ると、
VC＝VB VB：入力電圧 ……３
となり、１次巻線W1のOFF時の電圧VFは
VF＝VC×W1の巻数／W5の巻数 ……４
３式よりVC＝VBであるから
VF＝VB×W1の巻数／W5の巻数 ……５
となる。 If we now consider the case where the base current I3 is large, the output voltage will be the opposite of the above and will have the waveform shown in FIG. 7C. In this case, the base current I 3 becomes sufficiently large, so that the voltage shown in Figure 7C is applied to the tertiary winding.
Occurs on W 5 . In that case, in the circuit of FIG. 5, the voltage generated in the tertiary winding W5 is rectified by the diode 13, and the voltage V4 of the capacitor 14 becomes a negative polarity potential, lowering the potential than the base voltage V3 .
This voltage is maintained even when the transistor 10 is turned on. Therefore, when the transistor 10 is turned on,
The diode 15 is turned on and the current I 2 is shunted into I 1 and I 3 , so the base current I 3 decreases. As the base current I 3 decreases, V C becomes smaller as shown in Figure 7d, so the negative peak value of the voltage of V 1 is lower than the base voltage V 3 in the forward direction of the diode, as shown in Figure 7b. The voltage will drop by two drops. In other words, even if h FE of the transistor 10 changes, the base current I 3 is automatically adjusted and the voltage of the tertiary winding W 5 can be maintained in the state shown in FIG. 7b. In a stable state, the voltage V C of the tertiary winding W 5 when the transistor is OFF is, ignoring the forward voltage of the diode 13, V C = V B V B : Input voltage ... 3, and the voltage of the primary winding W 1 is The voltage V F when OFF is V F = V C × Number of turns of W 1 / Number of turns of W 5 ……4 From equation 3, V C = V B , so V F = V B × Number of turns of W 1 / Number of turns of W 5 The number of turns will be 5.
ちなみにトランジスタ１０がOFF時に２次巻
線W2に発生する電圧は
VF×W2の巻数／W1の巻数 ……６
５式を代入すると
＝VB×W1の巻数／W5の巻数×W2の巻数／W1の巻数
＝VB×W2の巻数／W5の巻数 ……７
第５図においてダイオード１６、コンデンサ１
７の整流回路の出力電圧は２次巻線W2のON時
およびOFF時の発生電圧の和になる整流出力は
１式、７式より
W2（ON時発生電圧）＋W2（OFF時発生電圧）
＝VB×W2の巻数／W1の巻数＋VB×W2の巻数／W5の巻
数
＝VB×（W2の巻数／W1の巻数＋W2の巻数／W5の巻数
）
となり、W1，W2，W5の巻数が固定されれば入
力電圧と出力電圧は全く比例関係となり、第６図
のようにリニアーな入出力特性を得ることがで
き、又トランジスタ１０のhFEの影響を受けない
ものとなる。 By the way, the voltage generated in the secondary winding W 2 when transistor 10 is OFF is V F × Number of turns of W 2 / Number of turns of W 1 ... 6 Substituting formula 5 = V B × Number of turns of W 1 / Number of turns of W 5 × Number of turns of W 2 / Number of turns of W 1 = V B × Number of turns of W 2 / Number of turns of W 5 ...7 In Figure 5, diode 16 and capacitor 1
The output voltage of the rectifier circuit No. 7 is the sum of the voltages generated when the secondary winding W 2 is ON and OFF. From equation 1 and equation 7, the rectifier output is W 2 (voltage generated when ON) + W 2 (voltage generated when OFF). Voltage) = V B × Number of turns of W 2 / Number of turns of W 1 + V B × Number of turns of W 2 / Number of turns of W 5 = V B × (Number of turns of W 2 / Number of turns of W 1 + Number of turns of W 2 / Number of turns of W 5 ), and if the number of turns of W 1 , W 2 , and W 5 is fixed, the input voltage and output voltage will have a completely proportional relationship, and linear input/output characteristics can be obtained as shown in Figure 6. h It will not be affected by FE .
また、従来例の第２図の回路で問題になつた効
率の問題に関しては、第２図の回路でフライホイ
ールダイオード８とフライホイール巻線W3にコ
レクタ電流の余剰分（フライホイール電流）を流
し、その分だけ増加したコレクタ電流を１次巻線
W1に流して大きな銅損と鉄損を発生させている
のに対し、本発明では第５図の如く３次巻線W5、
ダイオード１３に流れる電流はベース電流I3の余
剰分I1であり、又コレクタ電流が減少した分だけ
銅損と鉄損とは少なくなるため従来例に比べてロ
スはほぼ１／hFE以下となり絶大な効率の向上が
計れる。当方の実験結果では次のような効率向上
を計ることができた。 In addition, regarding the efficiency problem that occurred in the conventional circuit shown in Fig. 2, in the circuit shown in Fig. 2, the excess collector current (flywheel current) is connected to the flywheel diode 8 and the flywheel winding W3 . The collector current increased by that amount is passed through the primary winding.
In contrast, in the present invention, as shown in FIG. 5 , the tertiary winding W 5 and
The current flowing through the diode 13 is the surplus I1 of the base current I3 , and the copper loss and iron loss are reduced by the amount that the collector current is reduced, so the loss is approximately 1/h FE or less compared to the conventional example. A huge improvement in efficiency can be achieved. According to our experimental results, we were able to measure the following efficiency improvements.
従来例の方式 本発明の実施例
入力電圧：19V 入力電圧：19V
入力電流：600mA 入力電流：425mA
出力電力：4.76W 出力電力：4.76W
効率：41.8％ 効率：58.9％
効率向上17.1％アツプ
第８図は本発明の他の実施例であり、２次側の
整流回路をダイオード１６、コンデンサ１７を１
個づつ用いた構成として半波整流にしたものであ
る。この場合の出力電圧は２次巻線W2の極性に
よつて変わるが、１式、７式のいずれかとなる。
１式、７式のいずれの場合も巻数が固定されると
入力電圧VBと、出力電圧は比例し、リニアな特
性となる。又他の整流方式の場合でも同じように
リニアーな特性を得ることができる。 Conventional method Example of the present invention Input voltage: 19V Input voltage: 19V Input current: 600mA Input current: 425mA Output power: 4.76W Output power: 4.76W Efficiency: 41.8% Efficiency: 58.9% Efficiency improved by 17.1% 8th The figure shows another embodiment of the present invention, in which the rectifier circuit on the secondary side is composed of a diode 16 and a capacitor 17.
The configuration used individually is half-wave rectification. The output voltage in this case varies depending on the polarity of the secondary winding W 2 , but it is either equation 1 or equation 7.
In both types 1 and 7, when the number of turns is fixed, the input voltage V B and the output voltage are proportional and have linear characteristics. Also, similar linear characteristics can be obtained with other rectification methods.
第９図は第５図の回路の入力側にシリーズレギ
ユレータ１９と、フイルタコンデンサ２０を設
け、出力側に電圧、又は電流を検出する検出回路
２１を設け、検出信号に応じて最適入力電圧を決
定する制御回路２２を設けることにより出力電
圧、および電流を最適条件になるように自動制御
が行なわれる。この場合DC―DCコンバータの入
出力特性がリニアーでしかもhFEのバラツキ、温
度特性による入出力特性の変動がほとんどないの
で非常に制御回路２２が簡単になり、安価にな
る。 Fig. 9 shows a series regulator 19 and a filter capacitor 20 provided on the input side of the circuit shown in Fig. 5, and a detection circuit 21 for detecting voltage or current provided on the output side. By providing a control circuit 22 that determines the output voltage and current, automatic control is performed to bring the output voltage and current to optimum conditions. In this case, the input/output characteristics of the DC-DC converter are linear, and there is almost no variation in the input/output characteristics due to variations in hFE or temperature characteristics, so the control circuit 22 is extremely simple and inexpensive.
以上のように本発明の静止型電力変換器は構成
されるため、以下のような多くの効果が得られ
る。 Since the static power converter of the present invention is configured as described above, many effects such as those described below can be obtained.
(1) 入出力特性がリニアでしかも温度変動および
トランジスタのhFEによる入出力特性の変動が
ほとんどないのでDC―DCコンバータ単体のバ
ラツキ、ドリフトが少なくなるため、他のシス
テムを組合わせる場合、他のシステムそのもの
のコストを安価に設計することが可能であり、
又応用範囲も非常に広くなる。(1) The input/output characteristics are linear, and there are almost no fluctuations in the input/output characteristics due to temperature fluctuations or hFE of the transistor, so variations and drifts of the DC-DC converter alone are reduced, so when combining other systems, It is possible to design the system itself at a low cost,
Moreover, the range of application is also very wide.
(2) 入出力間の効率を従来のものよりも30％ほど
改善することができる。(2) Efficiency between input and output can be improved by about 30% compared to conventional systems.
(3) トランジスタのhFEによる発振周波数の変動
がないため発振周波数のバラツキ、ドリフトが
少なくなり応用範囲が広くなる。(3) Since there is no fluctuation in the oscillation frequency due to h FE of the transistor, variations and drifts in the oscillation frequency are reduced, and the range of applications is widened.
第１図は従来の静止型電力変換器の電気的回路
図、第２図は他の従来例の電気的回路図、第３図
は第１図に示す従来例の場合の入出力特性図、第
４図は第２図に示す従来例の場合の入出力特性
図、第５図は本発明の静止型電力変換器の一実施
例の電気的回路図、第６図は本発明の一実施例の
場合の入出力特性図、第７図ａ〜ｄは第５図の各
部の電圧波形図、第８図、第９図は他の実施例の
電気的回路図である。
９……トランス、W1……１次巻線、W2……２
次巻線、W4……帰還巻線、W5……３次巻線、１
０……トランジスタ、１１……帰還抵抗、１２…
…起動抵抗、１３……整流用ダイオード、１４…
…整流用コンデンサ、１５……ダイオード、１６
……整流用ダイオード、１７……整流用コンデン
サ、１８……負荷、１９……シリーズレギユレー
タ、２０……フイルタコンデンサ、２１……検出
回路、２２……制御回路。
FIG. 1 is an electrical circuit diagram of a conventional static power converter, FIG. 2 is an electrical circuit diagram of another conventional example, and FIG. 3 is an input/output characteristic diagram of the conventional example shown in FIG. FIG. 4 is an input/output characteristic diagram for the conventional example shown in FIG. 2, FIG. 5 is an electrical circuit diagram of an embodiment of the static power converter of the present invention, and FIG. 6 is an embodiment of the present invention. FIGS. 7a to 7d are voltage waveform diagrams of various parts of FIG. 5, and FIGS. 8 and 9 are electrical circuit diagrams of other embodiments. 9...Transformer, W1 ...Primary winding, W2 ...2
Secondary winding, W 4 ... Feedback winding, W 5 ... Tertiary winding, 1
0...Transistor, 11...Feedback resistor, 12...
...Starting resistor, 13... Rectifier diode, 14...
... Rectifier capacitor, 15 ... Diode, 16
... Rectification diode, 17 ... Rectification capacitor, 18 ... Load, 19 ... Series regulator, 20 ... Filter capacitor, 21 ... Detection circuit, 22 ... Control circuit.
Claims (1)
コレクタ又はドレインを接続し、１次巻線の他端
は電源の一端に接続し、トランジスタのエミツタ
又はソースは電源の他端に接続し、トランジスタ
のベースには抵抗を介してトランスの帰還巻線の
一端を接続し帰還巻線の他端は電源の他端に接続
し、トランスの２次巻線より出力を得るように構
成した静止型電力変換器において、トランスとし
て１次巻線、帰還巻線、２次巻線のほかに少なく
とももう一つ３次巻線を施し、その一端を電源の
一端に接続し、３次巻線の他端にはダイオードの
カソード側を接続し、このダイオードのアノード
側に、一端を電源の他端に接続したコンデンサの
他端を接続し、このコンデンサの他端には、さら
にアノード側をトランジスタのベース又はゲート
に接続したダイオードのカソード側を接続したこ
とを特徴とする静止型電力変換器。1 Connect the collector or drain of the transistor to one end of the primary winding of the transformer, connect the other end of the primary winding to one end of the power supply, connect the emitter or source of the transistor to the other end of the power supply, and A static power converter configured to connect one end of the feedback winding of the transformer to the base via a resistor, connect the other end of the feedback winding to the other end of the power supply, and obtain output from the secondary winding of the transformer. In the transformer, in addition to the primary winding, feedback winding, and secondary winding, at least one tertiary winding is provided as a transformer, one end of which is connected to one end of the power supply, and the other end of the tertiary winding is connected to the other end of the tertiary winding. Connect the cathode side of the diode, connect the other end of the capacitor with one end connected to the other end of the power supply to the anode side of this diode, and connect the other end of this capacitor with the anode side connected to the base or gate of the transistor. A static power converter characterized by having the cathode side of a diode connected to the .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55144103A JPS5768676A (en) | 1980-10-14 | 1980-10-14 | Static type power converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55144103A JPS5768676A (en) | 1980-10-14 | 1980-10-14 | Static type power converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5768676A JPS5768676A (en) | 1982-04-27 |
| JPS6343998B2 true JPS6343998B2 (en) | 1988-09-02 |
Family
ID=15354251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55144103A Granted JPS5768676A (en) | 1980-10-14 | 1980-10-14 | Static type power converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5768676A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20190133022A (en) | 2017-03-29 | 2019-11-29 | 히타치가세이가부시끼가이샤 | Adhesive Compositions and Structures |
-
1980
- 1980-10-14 JP JP55144103A patent/JPS5768676A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5768676A (en) | 1982-04-27 |
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