JPS6338691Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to an overcurrent protection device for an inverter using a semiconductor switching circuit.

[Prior art]

A conventional overcurrent protection device of this type is shown in FIG. In the figure, 10 is a self-commutated inverter, for example, a transistor inverter, which receives DC power from a DC power source (not shown) through positive and negative DC terminals (positive terminal P and negative terminal N) and converts it into AC power. AC output terminal
Supplied from AC to an AC load (not shown). 11 is a capacitor, 12 is an NPN type transistor, 1
3 is a diode, 14 is a current detection circuit, and 15 is a base current control circuit, and these constitute an overcurrent protection device. The transistor 12 is connected in antiparallel to the diode 13, and the capacitor 11 is inserted between the positive terminal P and the negative terminal N via this antiparallel circuit.
The base current control circuit 15 receives an operation output as an off command when the current detection circuit 14 detects a current exceeding a predetermined overcurrent level, and is configured to supply base current to the transistor 12 until the off command is received. ing.

Next, the operation of this overcurrent protection device will be explained.

During normal operation of the inverter 10, the capacitor 11 is charged through the diode 13.
When a DC short circuit occurs in the inverter 10, the capacitor 11 connects the inverter 10-current detection circuit 14-
The charge is instantly discharged through the path of the transistor 12, and a so-called overcurrent flows through this path. This overcurrent is detected by the current detection circuit 14, and the base current control circuit 1 receives its operation output.
5 cuts off the supply of base current. Therefore, the transistor 12 is turned off, the discharge of the capacitor 11 is stopped, and the overcurrent of the inverter 10 is suppressed.

In this way, the inverter 10 is protected against a DC short circuit, but the transistor 12 is kept sufficiently turned on until the current detection circuit 14 for detecting the occurrence of overcurrent detects and outputs the overcurrent. Because of the need to maintain the voltage, it is necessary to supply a relatively large base current exceeding the minimum required base current to the transistor 12, which increases the turn-off time required to turn off the transistor 12, causing the inverter to overcurrent There was a problem in that it was difficult to coordinate protection against the virus, leading to unreliable results.

[Summary of the idea]

This invention was made in view of the above-mentioned conventional problems, and instead of the conventional transistor, a first field effect transistor connected in Darlington to the main switching element and a second field effect transistor connected in series are used. By using a switching circuit having a transistor, monitoring the voltage between the drain and source of the second field effect transistor and determining an overcurrent due to an inverter DC short circuit from the voltage level to protect the inverter. The present invention proposes an overcurrent protection device for an inverter that can operate at higher speeds and improve reliability of protection compared to conventional inverter overcurrent protection devices.

[Example of idea]

An embodiment of this invention will be described below with reference to the drawings.

In FIG. 2, a switching circuit 22 connected in antiparallel to a diode 13 has a common gate with a first field effect transistor (FET) connected in Darlington with a transistor 22a, which is a main switching element, and with the first FET 22b. This circuit (hereinafter referred to as a BIMOS circuit) has a second field effect transistor (FET) connected in series to the emitter side of the transistor 22a. 2
Reference numeral 2d denotes a diode series body for backflow prevention, which is formed by connecting a plurality of diodes in series, and is inserted between the base of the transistor 22a and the source of the second FET 22c with the polarity shown. A voltage detection circuit 24 detects the voltage between the drain and source of the second FET 22c, and outputs an output when the voltage reaches a predetermined voltage level to supply an off command to the gate control circuit 25. Gate control circuit 25
Until receiving the off command from the current detection circuit 24, that is, during steady state, supplies the on-gate signal to the first FET 22b and the second FET 22c, and upon receiving the off command, supplies the off-gate signal to the first FET 22b and the second FET 22c.
It is supplied to FET 22b and second FET 22c. In addition, the gate-source voltage of the second FET22c
V _GS is selected to be the minimum _necessary voltage value V _GS1 of the static characteristics shown in FIG. Configure it to work.
Since the other configurations are the same as those in FIG. 1, the same reference numerals are given.

Next, the operation of this device will be explained.

Under normal conditions, the gate control circuit 25 supplies the on-gate signal to the gates of the first FET 22b and the second FET 22c, so both FETs are turned on, and this on operation supplies the base current to the transistor 22a, which turns on the BIMOS circuit. 22 is turned on.

Therefore, when the above-mentioned DC short circuit occurs in the inverter 10, the voltage from the capacitor 11 to the inverter 10 is
The discharge current of the capacitor 11 flows through the path of -BIMOS circuit 22-capacitor 11, and the second FET2
The drain-source voltage V _DS of 2c increases rapidly and reaches point B in FIG. 3, and the voltage detection circuit 24 operates. As a result, both the first FET 22b and the second FET 22c receive an off-gate signal from the gate control circuit 25 and are turned off, and the transistor 22a is turned off after an accumulation time. During the accumulation time of the transistor 22a, its collector current flows through the diode series body 22d. In this way, the BIMOS circuit 22 is turned off and overcurrent is quickly suppressed.

That is, in the conventional case, as described above, it is necessary to supply a relatively large base current (for example, I _B1 in FIG. 4) to the transistor 22a, and the collector-emitter voltage V _CE is determined by the current detection circuit 14. The configuration is such that the voltage is maintained at a low level until the output is output, but in this embodiment, the gate-source voltage of the second FET 22c is set to the minimum necessary low level to prevent excess voltage from the drain-source voltage. In addition to being configured to determine the presence or absence of current generation, this
Since the BIMOS circuit 22 has the above-mentioned turn-off characteristics and has a shorter turn-off time than the transistor 12, overcurrent protection is performed extremely quickly.

Note that the BIMOS circuit 22 may be provided with another self-extinguishing element such as a gate turn-off thyristor as a main switching element.

Further, a constant voltage diode may be used instead of the diode series body 22d.

[Effect of idea]

As explained above, this design uses a BIMOS circuit with a short turn-off time and has a configuration that detects the voltage of the field effect transistor connected in series with the main switching element to determine whether overcurrent has occurred, making it more effective than conventional devices. Since the protection operation can be carried out quickly, it is easier to coordinate the protection of the inverter, and the reliability can be improved compared to the conventional method.In addition, the device can be made cheaper, and it can also be used for high power applications. There are applicable benefits.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing a conventional overcurrent protection device for an inverter, Figure 2 is a circuit diagram showing an embodiment of this invention, Figure 3 is a static characteristic diagram of a field effect transistor, and Figure 4 is a diagram of a transistor. It is a static characteristic diagram. In the figure, 11... capacitor, 22... switching circuit, 22a... transistor, 22
b, 22c...field effect transistor, 22d...
... Diode series body, 13 ... Diode, 24
... Voltage detection circuit, 25 ... Gate control circuit. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Scope of utility model registration request] A switching circuit comprising first and second field effect transistors having a common gate, and a main switching element connected in series to the second field effect transistor and connected in Darlington to the first field effect transistor; A capacitor connected in series with the circuit and inserted between the DC terminals of the inverter, a diode connected anti-parallel to the switching circuit, a voltage detection circuit that operates when the voltage of the second field effect transistor reaches a predetermined level; An overcurrent protection device for an inverter, comprising a gate control circuit that turns off both of the field effect transistors in response to an operation output of a voltage detection circuit.