JPS63313364A - Rf signal detector - Google Patents

Abstract

PURPOSE:To detect the presence of an RF signal accurately by discriminating it as the presence of RF signal when a PLL circuit is in the lock state and a detection/smoothing level of a reproducing signal is a prescribed level or over in a digital audio tape player. CONSTITUTION:A level discrimination section 1 detects and smoothes a reproducing signal AS from a recording/reproducing head 5 to discriminate whether or not a smoothed level LRF is a prescribed threshold level LS or over and a PLL lock state discrimination section 3 identifies the lock state of the PLL circuit 2a. A system controller 4 receives a signal from the level discrimination section 1 and the PLL lock state discrimination section 3 and discriminates it as the presence of RF signal when the PLL circuit 2a is in the lock state and the level LRF is a prescribed threshold level LS or over. Thus,the presence of the RF signal is accurately detected.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Utilization Public Funds> The present invention relates to an RF signal detection device, and particularly to an RF signal detection device in a DAT (digital audio tape player).

<Prior art> T) In AT, audio data is recorded on each track of the tape.
(PCM data) as well as subcodes, ATF signals, etc. are recorded. As shown in Figure 2, the subcode area of each track contains the song number (program number), the start ID indicating the beginning of the song, the elapsed time from the beginning of the tape (absolute time), and the song number. Elapsed time (single time), other subcode information (not shown) such as index, running time, year, month, day, hour, minute and second at the time of recording (calendar time) are recorded, and these subcode information are displayed as appropriate during playback, and Used to search for the desired song number.

When recording using a recorded tape in such a DAT, the state of the recording start position is (i) whether the RF signal has already been recorded and the absolute time has also been recorded! ii) R
It is necessary to identify and display whether the F signal and absolute time are not recorded or are in a state (no recording state), or fiii) whether the RF signal is recorded but the absolute time is not recorded. be. This is because in state (i), the user can recognize that absolute time can be recorded continuously from the most recent recording end position fi (referred to as the REC end position), and (
It can be recognized that if recording is performed in the state of ii), there will be a blank section where there is no absolute time for the RF scratch signal.
If you record in the - state, you can recognize that only the music will be recorded without recording the absolute, so you can decide whether to record in the (il ~ (to) state or not, or search for a different recording start position. This is because it is possible to decide whether to record from there.

From the above, the DAT has a function of detecting the presence or absence of an RF flaw signal. FIG. 3 is a block diagram of a conventional RF signal detection device,
FIG. 4 is a waveform diagram of each part. In FIG. 3, 11 is a recording/reproducing head, 12 is an amplifier, and 13 detects the amplifier output (playback signal) to generate an RF signal S8. 14 is a smoothing filter that smoothes the detected signal S0 and outputs a DC level L1; 15 is a threshold level L;

(See Figure 4 (b)) and the level L output from the smoothing filter, a comparator that compares the magnitude of IF, 16 is a system controller, and identifies the presence or absence of an RF flaw signal according to the output from comparator 15. to display the status, etc. Furthermore, when LPIF≧L, the RF flaw signal rises, Ll, +F
<Ls, it is determined that there is an RF flaw signal.

<Problems to be Solved by the Invention> However, the conventional method described above, which identifies RF flaw signals based on whether the output level from the smoothing filter exceeds a predetermined threshold level, is prone to malfunction due to the noise level of the reproduced signal. It is also susceptible to external noise (there were cases where it was determined that there was an RF flaw signal even when there was no signal.

In light of the above, an object of the present invention is to provide an RF flaw signal presence/absence detection device that can accurately detect the presence or absence of an RF flaw signal.

Means for Solving the Problems> FIG. 1 is a block diagram of an RF signal detection device of the present invention.

Reference numeral 1 denotes a level determination section, 2 a signal processing section, 3 a PLL lock state determination section, 2a a PLL circuit, 4 a system controller, and 5 a recording/reproducing head.

Function> The level discriminator 1 detects and smoothes the reproduced signal As from the recording/reproducing head 5, and discriminates whether the smoothed levels LF and F are a predetermined threshold level of 9 or higher, and the PLL lock state discriminator identifies the locked state of the PLL circuit 2a.

The system controller 4 receives the signals from the level determination unit 1 and the PLL lock state determination unit 2, and determines that the RF signal is present when the PLL circuit 2a is in the locked state and the Shikamo level L□ is at the threshold level 1 and is 9 or higher. .

<Embodiment> Fig. 1 is a block diagram of the RF signal detection device of the present invention, and 1 is a block diagram of the RF signal detection device of the present invention, where 1 indicates that the level L*F obtained by detecting and smoothing the reproduced signal As from the recording/reproducing head is a predetermined threshold level L. a level determination unit that determines whether or not the level is above; 2 is a signal processing unit;
3 is a PLL that reproduces the clock signal included in the reproduced signal.
A PLL lock state determination unit identifies the lock state of the circuit 2a, 4 is a system controller that performs various controls, 5 is a recording/reproducing head, and 6 is an amplifier.

The level discriminator 1 has the same configuration as the conventional example shown in FIG. 3, and detects the output (reproduction signal) AS of the amplifier 6 and has an envelope waveform of the RF signal 5FIF (see FIG. 4(a)). A detection circuit 1a that outputs a detection signal S0, a smoothing filter 1b that smoothes the detection signal SD and outputs a DC level L1, and a threshold level L (Fig. 4(b)
)) and the level LPIF output from the smoothing filter.
It has a comparator 1c that compares the magnitude of L*F≧L
, the comparator IC outputs a high level signal RFS.

The signal processing unit 2 includes a PLL circuit 2a that reproduces the clock signal CL included in the reproduced signal As, and a reproduced clock signal C.
Read the reproduced signal As in synchronization with L, 1 symbol 10
The bit audio data is converted into a bit pattern of 8 bits per symbol, and 144 bits are added to the playback signal of one track.
A demodulating section 2b performs a parity check on the ID code (referred to as Wl, W2) recorded at the beginning of each Zoroku, and an R A sequentially stores the demodulated 1-symbol 8-bit data in the demodulating section. M2c and RAM
an error detection and correction processing unit 2d that performs error detection and correction processing for each predetermined number of symbols stored in the RAM 2c;
The audio data after error and correction processing stored in the DA is read out one symbol at a time in synchronization with a predetermined clock.
It has a DA converter 2e that converts and outputs the data.

The PLL lock state detection unit 3 counts error pulses EP output from the demodulation unit 2b as a result of the parity check,
The error count value N is compared with the set value A, and when N<A, a high-level lock signal LKS is output, and when N≧A, a low-level lock signal LKS is output.

The overall operation of FIG. 1 will be explained below.

The level determination unit 1 detects and smoothes the reproduced signal As from the recording/reproducing head 5, and determines whether the smoothed level L□ is equal to or higher than a predetermined threshold level S. If L□≧LS, the level is determined to be high level. A signal RFS is output, and if LR,>L, a low level signal is output.

In parallel with this level determination, the demodulator 2 of the signal processor 2
b is the black and black signals CL reproduced by the PLL circuit 2a.
The reproduced signal As is read in synchronization with , and is stored in the RAM 2c while being converted from 10 to 8 symbols, and the false 9 detection correction processing section 2d performs a nuisance correction process on the data stored in the RAM.

The demodulator 2b also performs a parity check on the ID code. In other words, for the 2 bytes of ID code W1 and W2,
Parity P is added and W detected from the reproduced signal
Check whether w + w = p for l, W2, and P.

An error pulse EP is generated each time an error is detected. Note that the error detection and correction processing section 2b detects whether or not there is an error, using a predetermined number of symbols to which an error correction code is added as one unit, and corrects any error.

The PLL lock state detection section 3 clears the count value every scan, counts the error pulses EP output from the demodulation section 2b, and compares the magnitude of the error meter [IN and the set value A to determine whether N<A. At times, a high-level lock signal LKS indicating a locked state is output, and when N≧A, a low-level lock signal LKS indicating an unlocked state is output. In other words, when the signal RFS and the lock signal LKS are both at high level, the system controller 4 performs +f P L
When the L circuit 2a is in a locked state and the level L- is above the threshold level L, JJ, it is determined that RFjM is present, otherwise it is determined that there is an RF flaw signal, and the determination result is displayed on a display device (not shown). to be displayed.

From the above, when there is no RF flaw signal, the detection/smoothing level of the reproduced signal is thicker than the threshold level due to noise etc. (even if there is no RF flaw signal, the PLL circuit 2
Since a does not cross, there is no chance of misjudging it as an RF damage signal.

<Effects of the Invention> According to the present invention, the reproduction signal detection, smoothing level and P
LL[i! Since the configuration is configured to detect the presence or absence of an RF flaw signal in consideration of both the locked state of the road, the presence or absence of an RF flaw signal can be accurately detected.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the RF signal detection device of the present invention, Fig. 2 is an explanatory diagram of subcodes, Fig. 3 is a block diagram of a conventional RF signal detection device, and Fig. 4 is a waveform diagram of each part in Fig. 3. It is. 1: Level discrimination section, 2: Signal processing section, 2a: PLL circuit, 3: PLL
System controller, 5.Recording/reproducing head Patent applicant Alpine Co., Ltd. Patent attorney Chiki Saito Figure 2 Figure 3 s Figure 4 Yapy

Claims (1)

[Scope of Claims] An RF signal detection device in a DAT, comprising: a level determination unit that determines whether a level obtained by detecting and smoothing a reproduced signal from a head is equal to or higher than a predetermined level; and a clock signal included in the reproduced signal. PLL to play
A lock state determining unit that identifies the locked state of the circuit; and an RF signal presence/absence determining unit that determines that an RF signal is present when the circuit is in the locked state and the detection and smoothing level of the reproduced signal is equal to or higher than the predetermined level. RF characterized by
Signal detection device.