JPS6331135A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To contrive to correctly finish the dimensions of each electrode and a wiring as conformed to the design values by a method wherein after thin electrodes and a wiring covering film, which are made of a material having a refractive index different from that of a polysilicon layer, are formed on electrodes and a wiring material layer, a photo resist layer for a basic patterning is formed by painting uniformly and in a thin film thickness. CONSTITUTION:A resist pattern 5a on the part including an isolation insulating film 2 and a resist pattern 5b on the part not including the isolation insulating film 2 are individually obtained. At this time, a material having a refractive index different from that of a poly Si layer 4 is used for electrodes and a wiring covering film 8. Moreover, the film thickness of a photo resist layer 5 is formed uniformly on the electrodes and the wiring covering film 8. Therefore, there is not the dispersion of width in each resist pattern 5a and 5b, which is caused by the generation of standing waves, and both resist patterns 5a and 5b can be both finished at the same width L3. Moreover, as the film thicknesses of the electrodes and the wiring covering film 8 are formed thinner than that of the photo resist 5, the dispersion of width in each electrode and wiring covering film patterns 8a and 8b is eliminated.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and more specifically, to improving the dimensional accuracy of electrodes and wiring layers formed on a semiconductor substrate using photolithography. This invention relates to an improved manufacturing method for.

[Conventional technology]

Electrodes in a conventional semiconductor device of this type.

An outline of the method for manufacturing the wiring layer is shown in the order of steps in FIGS. 2(a) to 2(d).

The manufacturing process of these conventional methods will be described with reference to each figure.

First, an inter-element isolation insulating film 2 is selectively formed on a silicon semiconductor substrate l, and then a gate insulating film 3 is formed on the entire surface thereof, and each electrode, which will be described later, The polysilicon layer 4, which is the wiring material,
The polysilicon layer 4 is formed by a CVD method or the like, and then a photolithography process and a dry etching process are performed on the polysilicon layer 4 in order to finish the polysilicon layer 4 into a predetermined electrode pattern.

That is, in the photolithography process, a photoresist layer 5 is coated on the entire surface of the polysilicon layer 4 (see FIG. 2(a)).
), at this time, the thickness t1 of the resist layer 5 on the polysilicon layer 4 in the portion including the isolation insulating film 2, and the thickness t1 of the resist layer 5 on the polysilicon layer 4 in the portion not including the isolation insulating film 2. The relationship between the film thickness t2 and the film thickness t2 is expressed by a linear equation.

tl<t2...(i
t) Then, the entire surface of the photoresist layer 5 is irradiated with exposure light 7 through the photomask 8 (see 1f
fl(b)), but generally within the photoresist layer 5, the incident light and the light reflected on the surface of the polysilicon layer 4 interfere with each other, and a so-called standing wave of light is generated. As a result, the amount of light energy given to this resist layer 5 changes in accordance with the thickness of the resist layer 5.

In this case, as shown in FIG. 3, when the film thickness of each part of the photoresist layer 5 is 11.12 mm, the thickness of each part after patterning, that is, the part including the isolation insulating film 2 is The width dimension of the resist pattern 5a is L11, and the width dimension of the resist pattern 5b in the portion not including the isolation insulating film 2 is L2, and each of these width dimensions L1. The relationship of L2 is Ll#L2 (1-2
), and both will not be set to the same size (
Figure (c)).

Subsequently, the polysilicon layer 4 is selectively etched by dry etching using each of the resist patterns 5a and 5b as an etching mask, and then each of these resist patterns 5a and 5b is removed (FIG. 4(d)). ) is the electrode of the part containing the isolation insulating film 2 obtained in this way,
The width dimension of the wiring layer 4d is L1', the width dimension of the electrode (gate electrode) layer 4b in the part not including the isolation insulating film 2 is L2', and the relationship between ' and L2' is expressed by the following equation. expressed.

L1' = L1 - Δ Look... (1-3) L2'
=L2-ΔKiji 1-4) (1-1), (
1-3), (1-4) to L'#L'
(1-5) Here, ΔD is the amount of shift between the resist pattern dimensions and the electrode and wiring dimensions caused by dry etching.

[Problem that the invention seeks to solve]

In this way, in the conventional manufacturing method described above,
As shown in equation (1-5), the dimensions of each electrode and wiring layer formed in each part of a semiconductor device are not constant as expected, and as a result, it is difficult to finish the device as designed. However, there was a problem in that the functions required of the device could not be fully fulfilled.

This invention was made to solve these conventional problems, and its purpose is to accurately finish the dimensions of electrodes and wiring formed in each part of a semiconductor device as designed. I did it like that. An object of the present invention is to provide a method for manufacturing this type of semiconductor device.

[Means for solving problems]

In order to achieve the above-mentioned object, the method for manufacturing a semiconductor device according to the present invention includes: - first forming a thin electrode and wiring on an electrode and wiring material layer using a material having a refractive index different from that of the electrode and wiring material layer; After forming the coating film, a photoresist layer for basic patterning is applied and formed to have a uniform and thin film thickness.

[For production]

That is, in the method of the present invention, the photoresist layer can be coated to a uniform and thin film thickness due to the thin electrode and wiring coating film in the electrode and wiring material layer, and the photoresist layer can be coated with a thin film thickness during exposure within the photoresist layer. It is possible to prevent the generation of standing waves, and it is possible to suppress variations in the dimensions of each electrode including the gate electrode and the wiring layer in each part of the device.

〔Example〕

Hereinafter, one embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. 1(a) to 1(e).

FIGS. 1(a) to 8) are cross-sectional views showing the method of this embodiment in the order of steps, and these FIGS. 1(a) to 8)
In the method of the embodiment, the same reference numerals as in the conventional method of FIGS. 2(a) to d) indicate the same or corresponding parts.

In this embodiment method, first, like the conventional method described above, an element isolation insulating film 2 is selectively formed on a silicon semiconductor substrate 1, and then a gate insulating film 3 is formed on the entire surface thereof.
A polysilicon layer 4, which will become an electrode and wiring material layer, is formed on the entire surface of the gate insulating film 3 by CVD or the like. Next.

On the entire surface of the polysilicon layer 4, an electrode and a wiring coating film 8 made of a material having a different refractive index from that of the polysilicon layer 4, such as a silicon oxide film or a silicon nitride film, are formed. Further, a photoresist layer 5 is applied over the entire surface of the polysilicon layer 4 to form a predetermined electrode and wiring pattern.

In this case, the photoresist 5 is
For example, it is preferable to select a material with a low viscosity of about 20 cps or less, and due to the presence of the electrode and wiring coating film 8, it is possible to coat the entire surface thinly and uniformly. Further, the film thickness of the electrode/wiring covering film 8 is thinner than the film thickness of the polysilicon layer 4 which is the electrode/wiring material layer;
It is preferable that the photoresist layer 5 has a thickness of about 0 to 100 OA, and that the thickness of the photoresist layer 5 is thicker than that of the electrode and wiring coating film 8 (FIG. 1(a)).

Next, using a predetermined photomask 6 selected for electrode and wiring patterning, the entire surface of the photoresist layer 5 is irradiated with light (7 (b) in the same figure), exposed, and developed to achieve desired results. In other words, a resist pattern 5a for a portion including the isolation insulating film 2 and a resist pattern 5'b for a portion not including the isolation insulating film 2 are obtained, respectively.At this time, the electrodes and wiring A material having a different refractive index from that of the polysilicon layer 4 is used for the coating film 8 .

In addition, in order to make the film thickness of the photoresist layer 5 uniform on the electrode and wiring coating film 8, each resist pattern 5a is formed by generating a standing wave as in the conventional method shown in FIG. , 5b, and both resist patterns 5a and 5b can be finished to have the same width L3 (FIG. 5(C)).

Thereafter, similarly to the conventional method described above, the electrodes and wiring coating film 8 are selectively removed by dry etching using the resist patterns 5a and 5b as etching masks, and the resist patterns 5a and 5b are removed selectively. remove and
Electrode on the corresponding part of each pattern.

Wiring coating film patterns 8a and 8b are obtained (FIG. 2(d)), but at this time, the electrode and wiring coating film 8 are formed thinner than the photoresist layer 5. for,
It fully fulfills its role as an etching mask.
However, there is no variation in the width dimensions of each electrode and wiring coating film pattern 8a, 8b, and the finished dimensions of both electrodes and wiring coating film patterns 8a, 8b are 1. ．． 1. are both equal as shown in the following equation.

Tei = L3 - Δ Sushi ...... (2-1) Ko-
6, sentence 1 is the amount of shift between the resist pattern dimensions and the electrode and wiring coating film dimensions caused by dry etching.

Finally, the polysilicon layer 4 is selectively removed by dry etching using the electrode and wiring coating film patterns 8a and 8b finished at the dimensional intersection 1 as etching masks, and The electrodes and wiring coating film patterns 8a and 8b are removed as necessary (removed in the figure), and the desired electrodes and wiring layers 4a and 4b are coated with each pattern. The part, that is, the part including the isolation insulating film 2, is substantially
An electrode and a wiring layer 4a are formed on the isolation insulating film 2, and an electrode (
(gate electrode) layer 4b can be formed ((e) in the same figure).
).

For each of the electrodes and wiring layers 4a and 4b formed in this way, regardless of whether they are formed on the isolation insulating film 2 or the gate insulating film 3, the following equations are used. be equal.

1, = 1-Δdan2 ・・・・・・(2-2)
Here, 6th sentence 2 is an electrode produced by dry etching,
This is the amount of shift between the wiring coating film pattern dimensions and the electrode and wiring layer dimensions.

Therefore, in this embodiment method, each of the intended electrodes, electrodes for forming the wiring layers 4a and 4b, the wiring material layer,
Here, on the polysilicon layer 4, a thin electrode and wiring coating film 8 made of a material with a different refractive index from that of the polysilicon layer 4 are formed, thereby forming a photoresist layer 5 for basic patterning. can be applied to a uniform and thin film thickness, and
It is possible to prevent standing waves during exposure, and as a result, the electrodes, wiring layer 4a, and electrodes (
This makes it possible to realize the gate electrode layer 4b.

〔Effect of the invention〕

As detailed above, according to the method of the present invention, an isolation insulating film and a gate insulating film formed on a semiconductor substrate, that is, generally on separate films or regions with a step difference between them, electrodes on each.

When forming a wiring layer, an electrode and a wiring material layer are formed on a film or a region that has a step between them, and then a layer of the same electrode and wiring material is formed on the electrode and wiring material layer. We formed thin electrodes and wiring coating films using materials with different refractive indexes.Later, we formed a photoresist layer for basic patterning, so we changed this photoresist layer. In addition to coating the photoresist layer with a uniform and thin thickness, it is possible to prevent the generation of standing waves during exposure within the photoresist layer. Dispersion in layer dimensions can be effectively and favorably suppressed, and each electrode has the same intended dimensions.

The wiring layer can be formed relatively easily, and this type of semiconductor device can achieve high performance and high reliability, and at the same time, the manufacturing yield can be significantly improved.

[Brief explanation of the drawing]

FIGS. 1(a) to 1e) are cross-sectional views showing the manufacturing method of a semiconductor device according to the present invention in the order of steps, and FIGS. The cross-sectional views shown in order and FIG. 3 are graphs showing the relationship between the film thickness of the photoresist and the dimensions of the resist pattern in the conventional method. 1... Semiconductor substrate, 2... Inter-element isolation insulating film,
3... Gate insulating film, 4... Polysilicon layer (
electrode, wiring material layer), 4a and 4b...electrode, wiring layer and electrode (gate electrode) layer, 5...photoresist layer, 5a, 5b...resist pattern, 6
,... Photomask, 7... Irradiation light for exposure, 8... Electrode, wiring coating film, 8a, 8b...
・Electrode and wiring coating film patterns. Figure 1 (d) 4b2 re ('r-L th)'PI Figure 2 (b) Figure 2 (c) (d)

Claims (5)

[Claims] (1) After selectively forming an isolation insulating film on the semiconductor substrate, a gate insulating film is formed on the entire surface, and then an electrode and wiring material layer are formed respectively, and the same layer and the same layer are formed on the entire surface of the electrode and wiring material layer. is an electrode and wiring coating film using materials with different refractive indexes.
In addition, a photoresist layer is formed with a uniform thickness, and using a predetermined photomask, the photoresist layer is exposed and developed to form each desired resist pattern.
Using each resist pattern as a mask, the electrodes and wiring coating film are selectively etched away, and each electrode,
Forming a wiring coating film pattern, and using each electrode and wiring coating film pattern as a mask, selectively etching away the electrode and wiring material layer to form respective electrodes and wiring layers. A method for manufacturing a featured semiconductor device. (2) The method for manufacturing a semiconductor device according to claim 1, wherein the electrode and wiring coating film are silicon oxide films. (3) The method for manufacturing a semiconductor device according to claim 1, wherein the electrode and wiring coating film are silicon nitride films. (4) The thickness of the electrode and wiring coating film is thinner than the thickness of the electrode and wiring material layer, and is approximately 100 to 1000 Å, or Third
A method for manufacturing a semiconductor device according to paragraph 1. (5) The method for manufacturing a semiconductor device according to claim 1, 2, 3, or 4, wherein the photoresist has a viscosity of 20 cps or less.