JPS63307723A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent an insulating thin film on a semiconductor substrate from being eroded when a resist film is removed by a method wherein, after a semiconductor thin film is formed on the insulating thin film on the substrate, a selective ion-implantation is performed. CONSTITUTION:A polycrystalline Si layer 5 is formed on a gate insulating film 4 and a selective ion-implantation into the surface of a semiconductor is performed across the film 4 and the layer 5. For this, there is no possibility that the film 4 is eroded when a resist film 6 used as a mask at the time of the selective ion-implantation is removed after the selective ion-implantation ends. That is, as the film 4 is protected with the layer 5, the film 4 is never eroded by the removal treatment of the film 6, which is performed by oxygen plasma treatment and so on. Accordingly, the removal treatment of the film 6 can be conducted sufficiently so as to be able to remove completely the film 6.

Description

[Detailed description of the invention] The present invention will be described in the following order.

A. Industrial field of application B1 Overview of the invention C1 Prior art [Figure 2] B0 Problem to be solved by the invention E1 Means for solving the problem F1 Effect G. Examples [Figure 1] H0 Invention Effects (A. Field of Industrial Application) The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device in which ions are selectively implanted into a semiconductor substrate through an insulating thin film on the semiconductor substrate.

(B. Summary of the Invention) The present invention provides a method for manufacturing a semiconductor device in which ions are selectively implanted into a semiconductor substrate through an insulating thin film on the semiconductor substrate. In order to prevent the insulating thin film from being eroded during film removal, selective ion implantation is performed after forming the semiconductor thin film on the insulating thin film on the semiconductor substrate.

(C, Prior Art) [Figure 2] (A) to (E) are cross-sectional views showing the conventional example of the manufacturing method of CMO5VLSI in the order of steps, and this manufacturing method will be explained according to the same figure. Then, the result is as follows.

(A) After forming a P-type semiconductor well b by selectively doping the surface of an N-type semiconductor substrate a with P-type impurities, a field insulating film C is formed by selectively oxidizing the surface of the semiconductor substrate a. form. Next, the semiconductor substrate a
Then, a gate insulating film d is formed on the surface of the semiconductor well b by thermal oxidation, and then, for example, a P-channel MOSFE is formed.
The region where the T is to be formed is masked with a resist film e, and ions of a conductive impurity such as boron are implanted into the surface of the semiconductor well b through the gate insulating film d for Vth control. f is an ion implantation layer. Figure 2 (A)
indicates the state after ion implantation.

(B) After that, the resist film e is removed by oxygen plasma treatment or the like. FIG. 2(B) shows the state after the resist film e has been removed.

(C) Next, as shown in Fig. 2 (C), N channel M
The region where the OSFET is to be formed, that is, the top of the P-type semiconductor well b is masked with a resist lie, and in this state, conductive impurity for vth control is implanted. g is an ion implantation layer.

(D) Next, after removing the resist film e, as shown in FIG.
As shown in D), a polycrystalline silicon layer is formed on the gate insulating film d and the field insulating film C.

(E) Thereafter, the polycrystalline silicon layer is selectively etched to form silicon gate electrodes i, as shown in FIG. 2(F).

Thereafter, a source and a drain are formed by ion implantation using the silicon gate electrodes i, i as a mask.

This is, of course, an N-channel MOSFET.
and for the P-channel MOSFET separately.

(D. Problem to be solved by the invention) By the way, according to the conventional CMO3VLSI manufacturing method, when removing the resist film e used as a mask when ion-implanting conductive impurities for vth control, gate insulation is removed. membrane d, d
There is a possibility that the characteristics of the MOS FET will change significantly due to the corrosion. This is because, when removing the photoresist film, various treatments such as oxidation plasma treatment and cleaning treatment with aqueous ammonia/hydrogen peroxide are required, and the surface of the gate insulating film is corroded by these treatments. However, when the gate insulating film was as thick as in the past, with several thousand layers, corrosion of the gate insulating film surface due to the resist film removal process did not pose a major problem. However, recently, with the trend toward thinner gate insulating films, gate insulating films have become thinner.
Since it is extremely thin, about the size of a human being, if the surface of the gate insulating film is eroded by the resist film removal process, the characteristics will change significantly.

Therefore, it is necessary to avoid applying sufficient processing to remove the photoresist film, and as a result,
Subsequent processes are performed while the impurities in the resist film remain on the substrate surface, and the impurities continue to exist on the element surface as dust or enter the interior of the element, causing various problems.

The present invention has been made to solve these problems, and is intended to prevent the insulating thin film on the semiconductor substrate from being eroded when removing the resist film used as a mask during selective ion implantation. The purpose is to

(E. Means for Solving the Problems) In order to solve the above problems, the method for manufacturing a semiconductor device of the present invention includes selective ion implantation after forming a semiconductor thin film on an insulating thin film on a semiconductor substrate. It is characterized by doing.

(F. Effect) According to the method for manufacturing a semiconductor device of the present invention, selective ion implantation is performed with the insulating thin film covered with the semiconductor thin film, so the resistive film used as a mask during selective ion implantation, etc. When removing the mask layer, the insulating thin film is protected by the semiconductor thin film. Therefore, it is possible to prevent the insulating thin film from being eroded when removing the mask layer, and it is possible to completely remove the mask layer by necessary and sufficient removal processing without causing any problems. It is possible.

(G. Embodiment) [FIG. 1] Hereinafter, a method for manufacturing a semiconductor device of the present invention will be explained in detail according to the illustrated embodiment.

FIGS. 1A to 1J are cross-sectional views showing one embodiment of the present invention in sequence, and the manufacturing method will be explained with reference to these figures.

(A) P selectively applied to the surface of the N-type silicon semiconductor substrate 1
rl) A P-type semiconductor well 2 is formed by doping an impurity, for example boron B, and then the semiconductor substrate 1 is
The field insulating film 3 is formed by selectively oxidizing the surface of the gate insulating film 3, and then the exposed semiconductor surfaces of the well 2 and the N-type semiconductor substrate 1 are heated and oxidized to form a gate insulating film (thickness: ) form 4. FIG. 1(A) shows the state after the gate insulating film 4 is formed.

(B) Next, as shown in FIG.
form 5.

(C) Next, a resist film is formed on the polycrystalline silicon layer 5, and the resist film is exposed and developed to form the first
As shown in FIG. 2C, a resist film 6 is selectively formed on a region other than the P-type semiconductor well 2, for example.

(D) Next, as shown in FIG. 1(D), using the resist film 6 as a mask, the gate insulating film 4 and the semiconductor thin film 5M are conductive on the semiconductor surface portion (in this step, the semiconductor well 2 surface portion). Vth is controlled by ion-implanting impurities. 7a is an ion-implanted layer formed by ion-implanting the impurity.

(E) Next, by thoroughly performing oxidation plasma treatment and cleaning treatment with aqueous ammonia and hydrogen peroxide, as shown in Figure 1 (E).
As shown in FIG. 2, resist film 6 is completely removed from above polycrystalline silicon layer 5. In this process of removing the resist film 6, since the gate insulating film 4 is covered with the polycrystalline silicon layer 5 and there is no risk of the gate insulating film 4 being eroded by the removal process, the resist film 6 may not remain. You can do enough to avoid this.

(F) After the resist film 6 has been completely removed, another resist film is applied, and the resist film is sequentially exposed to light and processed to form a resist@6 on the semiconductor well 2 as shown in FIG. 1(F). The conductive impurity is ion-implanted into the semiconductor surface portion (in this step, the semiconductor well 2 surface portion) using the resist 11 and the resist 6 as a mask to control vth. 7b is an ion implantation layer formed by this ion implantation.

(G) Resist film 6 formed in the above step (F)
is also removed in the same manner as in step (E) above. Also in this case, since the gate insulating film 4 is covered with the polycrystalline silicon layer 5, the removal process can be performed sufficiently to completely remove the resist film 6.

(H) Next, by selectively etching the polycrystalline silicon layer 5 and the gate insulating film 4, as shown in FIG. 2 surfaces) are partially exposed. This is done in order to directly contact the semiconductor surface with a silicon gate electrode, a silicon wiring layer, or a silicon resistive film that will be formed later. 8 is a window formed by this selective etching.

(1) As shown in FIG. 1 (1), a polycrystalline silicon layer (thickness: 3,000 layers) 9 forms a silicon gate electrode, etc. over the entire surface of the polycrystalline silicon layer S, including the portion where the window 8 is formed.
is formed, and the layer 9 is doped with, for example, phosphorus P to appropriately lower its resistivity.

(J) Thereafter, as shown in FIG. 1(J), the polycrystalline silicon layers 9 and 5 are selectively etched to form silicon gate electrodes 10, 10, silicon interconnection film 11.
11 is formed. Note that the silicon wiring film can also function as a resistor by narrowing its width and increasing its line length by forming it in a zigzag shape.

After this step (J), manufacturing is performed in the same manner as the usual manufacturing method of MO3IC and LSI. That is, ion implantation for forming sources, drains, etc., formation of interlayer insulating layers, formation of contact windows for taking out electrodes, formation of wiring films made of aluminum, etc. must be performed after this, but these can be done using conventional methods. - Since there is no particular difference from the general manufacturing method, illustrations and explanations are omitted.

Note that the polycrystalline silicon layer 9 forming the silicon gate electrode and the silicon wiring film is normally made conductive by doping with phosphorus (see step (T)). There is an ohmic contact between the polycrystalline silicon layer 9 and the P-type semiconductor well 2.
There is no ohmic contact between the two and a diode is interposed between them. There is no problem if the presence of the diode does not interfere with normal circuit operation, but if it does, an ohmic connection between the polycrystalline silicon layer 9 and the P-type semiconductor well 2 is applied. Do I need to make contact?

However, this can be realized in the tube t11 in the following manner. That is, the doping of phosphorus P to make the polycrystalline silicon layer 9 conductive is performed while masking the portion of the polycrystalline silicon layer 9 that corresponds to the semiconductor well 2 region, and the source of the P-channel MO3FET,
The P-type impurity such as boron added to the source and drain when forming the drain may also be added to the silicon gate electrode 10 and the silicon wiring film 11.

According to the manufacturing method of 0MO3LSI shown in FIGS. 1(A) to (J), a polycrystalline silicon layer 5 is formed on the gate insulating film 4, and selective ion implantation into the semiconductor surface is performed on the gate insulating film 4. and polycrystalline silicon layer5. T! I'm going to do it, so
There is no risk that the gate insulating film 4 will be eroded when the resist film 6 used as a mask during the selective ion implantation is removed after the selective ion implantation is completed. That is, since the polycrystalline silicon layer 5 protects the gate insulating film 4, the gate insulating film 4
is not corroded by the resist film 6 removal treatment such as oxygen plasma treatment. Therefore, the removal process of the resist film 6 can be performed sufficiently to completely remove the resist film 6. Therefore, there is no risk that the resist film 6 or its components will continue to exist as a residue on the surface of the gate insulating film 4, or that the components of the resist film 6 will enter the inside of the semiconductor as unnecessary impurities, improving quality. It is possible to improve reliability.

This manufacturing method also has an advantage over conventional methods in that the silicon gate electrode Vito or the silicon wiring film 11 formed at the same time can be brought into direct contact with the surface of the semiconductor substrate 1 or the semiconductor well 2.

That is, in the conventional structure, the silicon gate electrode and the silicon wiring film formed at the same time are in contact with the semiconductor substrate or the semiconductor well surface only through the gate insulating film, as described above. The gate is closed to the polycrystalline silicon layer forming the polycrystalline silicon layer. It is impossible to expose the semiconductor surface by selectively etching the film because the resist film cannot be removed sufficiently. Therefore, in order to electrically connect a silicon gate electrode or a silicon wiring film to a semiconductor surface, especially a source or drain,
A special process is required for this purpose, which results in an increase in the number of steps and also increases the height difference.

However, according to the present manufacturing method, since the gate insulating film 4 is protected by the polycrystalline silicon layer 5, the gate insulating film 4 can be photo-etched without any problem before forming the polycrystalline silicon layer 9. Therefore, the silicon gate electrode or the silicon wiring film formed at the same time,
A resistive film or the like can be brought into direct contact with the semiconductor surface without increasing the number of steps.

(H, Effects of the Invention) As described above, the method for manufacturing a semiconductor device of the present invention is as follows:
A method for manufacturing a semiconductor device in which ions are selectively implanted into a semiconductor substrate through an insulating thin IQ on the semiconductor substrate, characterized in that a semiconductor thin film is formed on the insulating thin film, and then the ion implantation is performed. It is something to do.

Therefore, according to the method of manufacturing a semiconductor device of the present invention, the insulating thin film is a semiconductor. ! Since selective ion implantation is performed with the insulating thin film covered by the film, the mask layer such as the resist film used as a mask during selective ion implantation is removed while the insulating thin film is protected by the semiconductor thin film. You will be killed. Therefore, the insulating thin film can be prevented from being eroded during removal of the mask layer, and the mask layer can be completely removed by a necessary and sufficient removal process.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1(A) to (J) are cross-sectional views showing one embodiment of the method for manufacturing a semiconductor device of the present invention in the order of steps, and FIGS. 2(A) to (E) are conventional examples. FIG. Explanation of symbols! ... Semiconductor substrate, 4... Insulating thin film, 5... Semiconductor thin film. Nu Q) Lu Mi\7
'-NO-NO-GU0 7 I71' Cross-sectional view showing the process order of the example grass Fig. 1 A cross-sectional view showing the process order of the conventional example Fig. 2

Claims (1)

[Claims] (1) In a method for manufacturing a semiconductor device in which ions are selectively implanted into a semiconductor substrate through an insulating thin film on the semiconductor substrate, a semiconductor thin film is formed on the insulating thin film, and then the ion implantation is performed. Characteristic semiconductor device manufacturing method