JPS63293943A - Semiconductor integrated circuit device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to semiconductor integrated circuit devices, and particularly to wafer scale integration (WaterScale
It relates to technology that is effective when applied to WSI (hereinafter referred to as WSI).

[Conventional technology]

In WSI, for example, a plurality of electronic circuit blocks are formed on one wafer, and each of the electronic circuit blocks is connected as desired to form one system. In addition, if a plurality of electronic circuit blocks with the same function are formed in advance and a defective block occurs, the connection between the external terminal of each electronic circuit block and the first operating potential line (power supply line) The defective blocks are separated from the system by cutting the fuse elements pre-installed in the system using a focused ion beam or laser beam.

Such WSI is, for example, disclosed in Japanese Patent Application Laid-Open No. 59-20144.
It is described in Publication No. 1.

[Problem that the invention seeks to solve]

The present inventor has proposed a W consisting of the above-mentioned plurality of electronic circuit blocks.
As a result of studying the above-mentioned reliability and yield in SI, the following points were discovered.

In conventional WSI, defective blocks are separated from the system by cutting fuse elements with laser beams or focused ion beams, or by connecting only good blocks with final wiring. Positioning takes time and damages elements formed around the fuse element to be cut, resulting in a reduction in defect relief throughput and reliability. Further, a process and a mask are required for forming the final wiring, which causes an increase in cost and a decrease in yield.

In addition, if the method of detecting defective blocks is to use probe inspection, the throughput will be poor because each block is inspected individually, and on the other hand, reliability and yield will be reduced due to cracks caused by the impact of the needle. descend.

Furthermore, if the cause of the defect is an abnormality in the substrate potential of the semiconductor substrate, a fault in the power supply potential supply line and the ground potential supply line, etc., the malfunction of the block that became a defective block during inspection may cause other problems. Although good blocks are originally normal, they may be considered defective.

An object of the present invention is to improve the reliability of a semiconductor integrated circuit device.

Another object of the present invention is to improve the yield of semiconductor integrated circuit devices.

Another object of the present invention is to provide a technique capable of automatically separating only defective electronic circuit blocks from a WSI having a plurality of electronic circuit blocks.

Another object of the present invention is to provide a technique capable of relieving defects caused by abnormal substrate potential in WSI.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this application is as follows.

That is, in the WSI, a switch is placed between the external terminal of each electronic circuit block and the wiring that supplies the power supply voltage.

Further, a plurality of well regions are separately formed, each electronic circuit block is separately formed in each well region, and an independent substrate voltage is applied to each well region.

[Effect]

According to the above means, the power supply voltage can be selectively applied to each electronic circuit block, and only the defective electronic circuit block can be electrically disconnected from the system when the WSI is operating, thereby improving the reliability of the WSI and defect relief. throughput can be improved. Moreover, since each electronic circuit block has an independent well region, it is possible to eliminate substrate potential abnormalities caused by a defective block, so that its reliability can be improved.

[Example work]

Hereinafter, the configuration of the present invention will be explained along with examples.

In all the figures of the embodiment, parts having the same functions are designated by the same reference numerals, and repeated explanations thereof will be omitted.

FIG. 1 (block diagram) shows WSI, which is Embodiment I of the present invention.
Indicated by

As shown in FIG. 1, the WSI is an electronic circuit block A0.
~F1. Electronic circuit block A0~Eo
and A1 to E are memories, and electronic circuit block F0
and F are selection circuits (decoders). The electronic circuit block A. and A.

have the same function, Ba and B8, ~F, and F, and i5
As such, each has the same function. Power supply voltage (cc: 5
V) and U ground NFE (Vss: Qv)c,
Para) 'PH and P, to the electronic circuit block A
0 to F. In addition, the control signal Sa that controls the basic operation of each electronic circuit block is transmitted to an external pad P.
, and is sent to each electronic circuit block. Further, the control signal sb is sent from the external pad P to the selection circuit (decoder) Fo, F+, and the selection circuit F.

, F, 1: Controlled.

FIG. 2 is a diagram showing a method in which the selection circuit (decoder) Fo selects the electronic circuit A0.

Between the wiring supplying the power supply voltage (Vcc) of the electronic circuit A0 and the external terminal (not shown) of Ao, and between the ground voltage (
vas) and the external terminal of Ao (not shown)
PMO8FET3 and 8MO8FET4 are provided between the two. When the selection circuit (decoder) FO outputs the signal φ1 (5V) in response to the control signal sb, the signal φ is sent to the NMO8FET, and the PMO8
Since φt (oV) is sent to the FET by the inverter circuit 2, each transistor becomes conductive, and the electronic circuit block A6 is selected. Further, the selection circuit F.

When outputs the signal φt (oV), each transistor becomes non-conductive and the electronic circuit A0 becomes non-selected.

The circuit consisting of the transistors explained above is not limited to the electronic circuit block A0 (, the electronic circuits Bo to EO1 and the circuits
-E are similarly provided.

Therefore, for example, when electronic circuit block 80 becomes defective, the selection circuit F is replaced by the above method.

Or, Ao is separated from the system by F, and A1, which has the same function as Ao, is F. or F. From the above, since the defective electronic circuit block can be electrically separated from the system, it is possible to eliminate damage to peripheral elements when the defective block is separated using a laser beam, etc., and the laser ff, lfM Since there is no time required for positioning during irradiation, the reliability of WSI and the throughput of defect relief can be improved.

[Example ■]

Embodiment (2) is another embodiment of the present invention in which a defective electronic circuit block due to an abnormality in the substrate potential is relieved in WSI.

FIG. 3 (cross-sectional view) shows a WSI which is an embodiment (1) of the present invention. FIG. 3 is a sectional view of the semiconductor wafer 1 shown in FIG. 1, and the semiconductor wafer 1 is, for example, an N-type semiconductor substrate. P-well regions 6-9 are formed on the semiconductor wafer 1, and the electronic circuit blocks FIT%COsCl,F shown in FIG. 1 are formed in the P-well regions 6-9, respectively. Furthermore, as shown in FIG. 4, an N well region 10 is formed within the P well region 7. Said P-well regions 6.8 and 9
Although not shown in FIG. 4, an N well region is formed in the same manner as described above. Further, N''W semiconductor regions 11 and 12 are formed in the P well region 7, and P+ type conductor regions 13 and 14 are formed in the N well region 10.
are formed respectively. Said N+ type calf conductor region 1
are the source and drain regions of the NMOS FET, and are the source and drain regions of the P+ type trench conductor region PMO8FET. The N1 type conductor region 12 supplies a substrate potential (Van) 15 to the P well region 7 and the N++ semiconductor region 1 formed in the P well region 8.
2A supplies a substrate potential (Vaa) of 15A to the P well region 8. The substrate potentials 15 and 15A are
The electronic circuit block Eo or E+ (
For example, when a crystal defect occurs at the junction interface between the semiconductor substrate 1 and the P-well region 8, a voltage drop due to junction leakage current (substrate effect) can cause damage to the electronic circuit block. C1
Even when the electronic circuit block C1 becomes defective, the voltage drop remains only in the electronic circuit block C1, and the other electronic circuit blocks are not affected because they are independently supplied with the substrate U:. In addition, NMO8FET4 and PMO8FE shown in Figure 2
T3 is connected as shown in FIG. 4, and determines whether the electronic circuit block C0 formed in the P well region 7 is selected or not.

[Example ■]

Embodiment 2 is another embodiment of the present invention in which a defective electronic circuit block is automatically separated from the system in WSI.

FIG. 5 shows a WSI which is an embodiment (2) of the present invention.

The electronic circuit block A0 has a power supply voltage (Vcc: 5
Fuses 19 and 18 are respectively provided between the power supply voltage wiring 17 that supplies V) and the external terminal (not shown) of the electronic circuit block A0 and the wiring that supplies the ground potential. When the electronic circuit A0 becomes defective and a large current (a current higher than the rated current) is generated in the circuit, the fuses 19 and 18 are cut off when a predetermined current flows.

Thereby, defective electronic circuit blocks can be automatically removed from the system.

As explained above, according to the novel technology disclosed in this application, the following effects can be obtained.

(In IIWSI, a switch is provided between the external terminal of each electronic circuit block and the power supply voltage wiring and ground voltage wiring, so that only the defective electronic circuit block can be automatically electrically disconnected from the system.

(2) According to (11) above, only the defective electronic circuit block can be automatically separated from the system during WSI calibration, so that the throughput and reliability of testing can be improved.

(3) According to (11) above, only the defective electronic circuit block can be electrically separated from the system, so the defective electronic circuit block can be separated from the system without damaging the elements around the defective electronic circuit block.

(4) In WSI, by applying an independent substrate voltage to each well region in which an electronic circuit block is formed, defects in the electronic circuit due to abnormal substrate potential can be repaired on a block-by-block basis.

(5) According to (4) above, defects in electronic circuits can be repaired block by block, so system reliability and yield can be improved.

Although the invention made by the present inventor has been specifically explained based on the above-mentioned Examples, the present invention is not limited to the above-mentioned Examples, and within the scope of the gist thereof,
Of course, various modifications can be made.

For example, in the present invention, a switch that selectively supplies a power supply potential and a ground potential to each electronic circuit block may be provided only between the power supply voltage wiring and the external terminal of the electronic circuit block. Furthermore, the switch may be provided only between the wiring that supplies the ground potential to the electronic circuit block and the external terminal of the electronic circuit block. The switch that selectively supplies the ground potential is an NMO8FET.
or only PMO8FETs. In this case, the inverter function provided between the output terminal of the selection circuit and the switch may be eliminated.

Further, in the present invention, the conductivity type of the well region may be reversed. In this case, just reverse each conductivity type.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

By providing a switch between the external terminal of each electronic circuit block and the power supply voltage wiring and ground voltage supply wiring, a defective electronic circuit block can be electrically and automatically separated from the system. Further, by applying the substrate potential to each well region independently, defects can be repaired for each electronic circuit block.

[Brief explanation of drawings]

Fig. 1 is a V-lock diagram of WSI which is Embodiment I of the present invention, Fig. 2 is a circuit diagram showing switching means which is an embodiment of the present invention, and Fig. 3 is an embodiment of the present invention. Figure 4 is a cross-sectional view and circuit diagram of a WSI which is an embodiment (■) of the present invention; Figure 5 is a circuit diagram showing a switching means which is an embodiment (■) of the present invention. be. In the figure, 1... semiconductor wafer (N-), 2... inverter, 3... PMO8EFT, 4... NMOS
FET, 6.7, 8.9... Well region (P), 1
0...well region (N), 11.12...N+ type semiconductor region, 13.14...P+ type semiconductor region, 15.
15A...Substrate potential supply wiring, 16.17...Power potential supply wiring, 18...Ground potential supply wiring, 19.2
0...Fuse. Agent Masu Burial Officer Katsuo Ogawa 7 Figure 1 Figure 2

Claims (1)

[Scope of Claims] 1. A plurality of electronic circuit blocks formed on a semiconductor substrate, each of the electronic circuit blocks having a first terminal and a second terminal; a first operating potential line for supplying an operating potential; a plurality of switching means connected between a first terminal of each of the electronic circuit blocks and the first operating potential line; a second operating potential line coupled to two terminals for supplying a second operating potential to the electronic circuit block, the plurality of switching means selectively supplying the first operating potential to the electronic circuit block; A semiconductor integrated circuit device characterized in that it is configured as follows. 2. The semiconductor integrated circuit device according to claim 1, wherein the plurality of switching means include a fuse element. 3. The semiconductor integrated circuit device according to claim 1, wherein the plurality of switching means include transistors. 4. The control terminal of the transistor is coupled to the output terminal of the selection circuit, and its operating state is controlled as desired in response to an output signal output to the output terminal. The semiconductor integrated circuit device according to scope 3. 5, having a first well region and a second well region formed on the main surface of the semiconductor substrate, having an electronic circuit formed in the first and second well regions, respectively; A semiconductor integrated circuit device, wherein independent potentials are applied to the well region and the second well region.