JPS63289950A - Package for semiconductor - Google Patents
Package for semiconductorInfo
- Publication number
- JPS63289950A JPS63289950A JP12532487A JP12532487A JPS63289950A JP S63289950 A JPS63289950 A JP S63289950A JP 12532487 A JP12532487 A JP 12532487A JP 12532487 A JP12532487 A JP 12532487A JP S63289950 A JPS63289950 A JP S63289950A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- aluminum nitride
- nitride substrate
- metallic layer
- copper lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 31
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims abstract description 28
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 11
- 229910052802 copper Inorganic materials 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 11
- 238000005219 brazing Methods 0.000 abstract description 11
- 229910000679 solder Inorganic materials 0.000 abstract description 8
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052750 molybdenum Inorganic materials 0.000 abstract description 6
- 239000011733 molybdenum Substances 0.000 abstract description 6
- RCCZAUNXYIMXKW-UHFFFAOYSA-N copper;oxolead Chemical compound [Cu].[Pb]=O RCCZAUNXYIMXKW-UHFFFAOYSA-N 0.000 abstract 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract 1
- 229910052782 aluminium Inorganic materials 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 16
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 11
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- 230000008646 thermal stress Effects 0.000 description 5
- 229910000831 Steel Inorganic materials 0.000 description 4
- 239000010959 steel Substances 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010292 electrical insulation Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910000833 kovar Inorganic materials 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000004859 Copal Substances 0.000 description 1
- 241000782205 Guibourtia conjugata Species 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- PCEXQRKSUSSDFT-UHFFFAOYSA-N [Mn].[Mo] Chemical compound [Mn].[Mo] PCEXQRKSUSSDFT-UHFFFAOYSA-N 0.000 description 1
- RQFRTWTXFAXGQQ-UHFFFAOYSA-N [Pb].[Mo] Chemical compound [Pb].[Mo] RQFRTWTXFAXGQQ-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- -1 it easily breaks Substances 0.000 description 1
- 235000012771 pancakes Nutrition 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 231100000331 toxic Toxicity 0.000 description 1
- 230000002588 toxic effect Effects 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 239000002023 wood Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、高発熱量の半導体素子を実装する為の半導体
用パッケージに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor package for mounting a semiconductor element that generates a high amount of heat.
半導体用パッケージに用いられる絶縁体基板としては、
従来よりアルミナ(AIO)が一般的である。又、リー
ドフレームはコパール(Fe−29%Ni−17%Co
) 、4270イ(Fe−42%Ni)等の鉄−ニッケ
ル系合金が一般的であり、回路形成した絶縁体基板の金
属層の部分に銀ろう等でろう付けして半導体用パッケー
ジとして用いられている。Insulator substrates used in semiconductor packages include:
Alumina (AIO) has been commonly used. In addition, the lead frame is made of copal (Fe-29%Ni-17%Co
), 4270i (Fe-42%Ni) and other iron-nickel alloys are common, and are used as semiconductor packages by brazing with silver solder etc. to the metal layer of an insulator substrate on which a circuit is formed. ing.
しかし、アルミナは電気絶縁性及び機械強度に優れてい
る反面、熱伝導率が17Wm−’に一部と小さいために
熱放散性が悪く、例えば高発熱量の電界効果型トランジ
スタ(FET)等を塔載するためには不適当である。高
発熱量の半導体素子を塔載するために、熱伝導率が26
0 Wm−’に一部と高いベリリア(BeO)を用いた
絶縁体基板もあるが、ベリリア(=毒性が強く、使用が
制限されている問題がある。However, although alumina has excellent electrical insulation and mechanical strength, its thermal conductivity is only as low as 17 Wm-', so it has poor heat dissipation properties, so it is not suitable for use in, for example, field-effect transistors (FETs) that generate a high amount of heat. It is unsuitable for publication. In order to mount semiconductor elements with high calorific value, the thermal conductivity is 26.
There are some insulating substrates using beryllia (BeO), which has a high 0 Wm-', but there is a problem that beryllia (= highly toxic) restricts its use.
そこで最近では、高発熱量の半導体素子塔載用の絶縁体
基板として、熱伝導率がべ’J IJアより劣るものの
200 Wm−’に一部と高いうえに毒性がなく、又ア
ルミナと同等の電気絶縁性や機械強度を有すル窒化アル
ミニウム(AIN)が有望視されている。Therefore, recently, as insulating substrates for mounting high-heat-generating semiconductor devices, alumina has been used as an insulating substrate for mounting high-heat-generating semiconductor devices. Aluminum nitride (AIN), which has high electrical insulation properties and mechanical strength, is viewed as promising.
然るに、窒化アルミニウムは室温から銀ろう付は温度(
780C)までの平均熱膨張率が5.5X10−6に−
1と小さいのに対して、リードフレームである鉄−ニッ
ケル系合金の平均熱膨張率は10 X 10−6に一部
(コバ−ル)〜llXl0−6K ’ (42アロイ)
と極めて高い。このため窒化アルミニウム基板へのリー
ドフレームの銀ろう付は時に窒化アルミニウム基板内に
大きな熱応力による歪が発生する結果となり、リードフ
レームを基板から引き剥がず方向ニ引っ張ると容易に破
断がおこり、十分なリードフレーム接合強度が得られな
かった。However, aluminum nitride is at room temperature, while silver brazing is at temperature (
The average coefficient of thermal expansion up to 780C is 5.5X10-6.
1, whereas the average coefficient of thermal expansion of the iron-nickel alloy that is the lead frame is 10 x 10-6 (Kovar) to 11X10-6K' (42 alloy).
extremely high. For this reason, silver soldering of a lead frame to an aluminum nitride substrate sometimes results in distortion due to large thermal stress within the aluminum nitride substrate, and if the lead frame is pulled in any direction without being peeled off from the substrate, it easily breaks, and lead frame bonding strength could not be obtained.
又、窒化アルミニウムとほぼ等しい熱膨張率のモリブデ
ンのリードフレームを用いて熱応力による歪をなくす提
案もあるが、モリブデンは高価なうえに成形性が悪いの
で、安価で使い易い半導体パンケージを提供しえない欠
点があった。There is also a proposal to eliminate distortion due to thermal stress by using a lead frame made of molybdenum, which has a coefficient of thermal expansion almost equal to that of aluminum nitride, but molybdenum is expensive and has poor formability, so it is difficult to provide an inexpensive and easy-to-use semiconductor pancake. There was a drawback.
〔発明が解決しようとする問題点〕
本発明は、かかる従来の事情に鑑み、高発熱量の半導体
素子を実装するため熱放散性のよい窒化アルミニウム基
板を用い、この窒化アルミニウム基板にリードフレーム
を十分な接合強度で接合せしめた安価で使い易い半導体
用パッケージを提供することを目的とする。[Problems to be Solved by the Invention] In view of the conventional circumstances, the present invention uses an aluminum nitride substrate with good heat dissipation properties in order to mount a high-heat-generating semiconductor element, and a lead frame is attached to the aluminum nitride substrate. The purpose of the present invention is to provide an inexpensive and easy-to-use semiconductor package that is bonded with sufficient bonding strength.
本発明の半導体用パッケージは、表面の一部に金属層を
形成した窒化アルミニウム基板と、窒化アルミニウム基
板の金属層にろう付けした無酸素銅リードフレームとを
具えている。The semiconductor package of the present invention includes an aluminum nitride substrate having a metal layer formed on a portion of its surface, and an oxygen-free copper lead frame brazed to the metal layer of the aluminum nitride substrate.
第1図及び第2図に示すように、この半導体用パッケー
ジは通常の窒化アルミニウム基板1の表面の一部に金属
層2を形成し、この金属層2に無酸素銅リードフレーム
3を銀ろう等でろう付けして接合しである。又、この半
導体用パッケージの所定位置には高発熱量のFIT等の
半導体素子4が塔載され、金属層2又は無酸素銅リード
フレーム3とボンディングワイヤ5で結線される。更に
窒化アルミニウム基板1の裏面には、通常の如くヒート
シンク6を取り付けである。As shown in FIGS. 1 and 2, in this semiconductor package, a metal layer 2 is formed on a part of the surface of an ordinary aluminum nitride substrate 1, and an oxygen-free copper lead frame 3 is attached to this metal layer 2 with silver solder. It is joined by brazing. Further, a semiconductor element 4 such as a FIT which generates a large amount of heat is mounted at a predetermined position of this semiconductor package, and is connected to the metal layer 2 or the oxygen-free copper lead frame 3 with a bonding wire 5. Furthermore, a heat sink 6 is attached to the back surface of the aluminum nitride substrate 1 as usual.
金属層は従来からリードフレームを絶縁体基板にろう付
けする際に使用されているものでよく、例えばタングス
テン、モリブデン、モリブデン−マンガン等を窒化アル
ミニウム基板と同時焼成するか、又はチタン、クロム、
ニッケル等を真空蒸着やスパッタリングして形成する。The metal layer may be one conventionally used for brazing lead frames to insulating substrates, such as tungsten, molybdenum, molybdenum-manganese, etc. co-fired with the aluminum nitride substrate, or titanium, chromium,
It is formed by vacuum evaporation or sputtering of nickel or the like.
又、使用するろう材としては銀ろうが好ましいが、無酸
素鋼リードフレームや金属層にろう材と濡れ性の良い金
属の薄い被覆層を形成すること等によって両者を強固に
接合できれば他のろう材であってもよい。更に、銀ろう
を用いる場合であっても例えば第3図に示すように、金
属層にモリブデンを用いる場合など必要に応じて金属層
2上に薄いニッケル層7を形成し、無酸素鋼リードフレ
ーム3の表面には銀ろう9の内部への拡散を防止し且つ
銀ろう9の濡れ性を安定させるためにニッケルめっき層
8を予め形成しておくことが好ましい6
〔作用〕
窒化アルミニウム基板に無酸素銅リードフレームをろう
付はする場合、例えば銀ろう付は温度の780Cないし
更に高温から約200 Cまでの温度範囲において、無
酸素銅リードフレームが塑性変形して窒化アルミニウム
基板との接合界面付近での応力を緩和する。従って、無
酸素鋼は熱膨張率が18 X 10−6に−+と窒化ア
ルミニウムに比べて極めて太さいにも拘らず、窒化アル
ミニウム基板にろう付は時の熱応力による歪を殆ど発生
させることがない。In addition, silver solder is preferable as the brazing material to be used, but other soldering materials may be used if they can be firmly bonded by forming a thin coating layer of a metal with good wettability on the oxygen-free steel lead frame or metal layer. It may be wood. Furthermore, even when silver solder is used, a thin nickel layer 7 may be formed on the metal layer 2 as necessary, such as when molybdenum is used for the metal layer, as shown in FIG. It is preferable to form a nickel plating layer 8 in advance on the surface of the aluminum nitride substrate 3 in order to prevent diffusion of the silver solder 9 into the interior and stabilize the wettability of the silver solder 9. When brazing an oxygen-free copper lead frame, for example, in silver brazing, the oxygen-free copper lead frame deforms plastically in the temperature range from 780C or even higher to about 200C, causing damage near the bonding interface with the aluminum nitride substrate. Relieve stress at. Therefore, even though oxygen-free steel has a coefficient of thermal expansion of 18 x 10-6 and is extremely thick compared to aluminum nitride, almost no distortion occurs due to thermal stress when brazing to an aluminum nitride substrate. There is no.
かかる無酸素鋼リードフレームの熱応力緩和効果は、無
酸素銅の銅純度が99%以上である場合に特に顕著であ
る。The thermal stress relaxation effect of such an oxygen-free steel lead frame is particularly remarkable when the oxygen-free copper has a copper purity of 99% or more.
又、無酸素銅リードフレームの厚さは0.1〜0.3m
mが好ましい。厚さがQ、law未満ではリードフレー
ムとしての強度に乏しく、Q、3謂を超えるとリードフ
レームとしての適度な変形性が得られなくなるからであ
る。In addition, the thickness of the oxygen-free copper lead frame is 0.1 to 0.3 m.
m is preferred. This is because if the thickness is less than Q.law, the strength as a lead frame is poor, and if it exceeds Q.3, appropriate deformability as a lead frame cannot be obtained.
窒化アルミニウム基板の表面に形成したモリブデンの金
属層に、同一形状で同一厚さくQ、1w)の下表に示す
各リードフレームを夫々銀ろう付けした。作成した各試
料各々10個について、リードフレームの解放端を上方
に折り曲げた後、垂直に引っ張って破断するまでの接合
強度を測定し下表に併せて示した。Each lead frame shown in the table below, having the same shape and the same thickness (Q, 1w), was soldered with silver to a molybdenum metal layer formed on the surface of an aluminum nitride substrate. For each of the 10 samples prepared, the open end of the lead frame was bent upward and then pulled vertically to measure the bonding strength until breakage, and the results are also shown in the table below.
無酸素銅リードフレームはモリブデンのリードフレーム
と同等以上の接合強度が得られるのに対シテ、コバール
や4270イのリードツレ−ムラ用いた場合には銀ろう
付は時の熱応力による歪が窒化アルミニウム基板内部に
発生し、接合強度を低下させていることが判る。Oxygen-free copper lead frames have a bonding strength equal to or higher than that of molybdenum lead frames, but when using Kovar or 4270I lead irregularities, silver brazing is more likely to distort due to thermal stress than aluminum nitride. It can be seen that this occurs inside the substrate, reducing the bonding strength.
本発明によれば、熱伝導率の大きな窒化アルミニウム基
板にリードフレームを十分な接合強度で接合せしめた安
価で使い易い半導体用パンケージを提供でき、高周波・
高出力のFET等の高発熱量の半導体素子の実装に有効
である。According to the present invention, it is possible to provide an inexpensive and easy-to-use semiconductor pancage in which a lead frame is bonded to an aluminum nitride substrate with high thermal conductivity with sufficient bonding strength.
This is effective for mounting semiconductor elements that generate a high amount of heat, such as high-output FETs.
第1図は本発明による半導体パッケージの一具体例を示
す平面図、第2図は同断面図であり、第3図は金FA’
f0をモリブデンとした場合のろう付は部分の一例を示
す拡大断面図である。
1・・窒化アルミニウム基板 2・・金属居3・・無酸
素鋼リードフレーム
4・・半導体素子 7・・ニッケル層
8・・ニッケルめっき層 9・・銀ろう出願人 住友
電気工業株式会社
第1図
箔3図
手続補正書
昭和62年7月28日FIG. 1 is a plan view showing a specific example of a semiconductor package according to the present invention, FIG. 2 is a cross-sectional view of the same, and FIG. 3 is a gold FA'
Brazing is an enlarged sectional view showing an example of a part when f0 is molybdenum. 1. Aluminum nitride substrate 2. Metallic layer 3. Oxygen-free steel lead frame 4. Semiconductor element 7. Nickel layer 8. Nickel plating layer 9. Silver solder Applicant Sumitomo Electric Industries, Ltd. Figure 1 Foil 3 figure procedural amendment document July 28, 1986
Claims (2)
基板と、窒化アルミニウム基板の金属層にろう付けした
無酸素銅リードフレームとを具えたことを特徴とする半
導体用パッケージ。(1) A semiconductor package characterized by comprising an aluminum nitride substrate on which a metal layer is formed on a part of the surface, and an oxygen-free copper lead frame brazed to the metal layer of the aluminum nitride substrate.
mであることを特徴とする、特許請求の範囲(1)項記
載の半導体用パッケージ。(2) Oxygen-free copper lead frame has a thickness of 0.1 to 0.3 m
The semiconductor package according to claim (1), wherein the semiconductor package is m.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12532487A JPS63289950A (en) | 1987-05-22 | 1987-05-22 | Package for semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12532487A JPS63289950A (en) | 1987-05-22 | 1987-05-22 | Package for semiconductor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63289950A true JPS63289950A (en) | 1988-11-28 |
Family
ID=14907296
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12532487A Pending JPS63289950A (en) | 1987-05-22 | 1987-05-22 | Package for semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63289950A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0788153A2 (en) | 1996-02-05 | 1997-08-06 | Sumitomo Electric Industries, Ltd. | Member for semiconductor device using an aluminum nitride substrate material, and method of manufacturing the same |
US6261703B1 (en) | 1997-05-26 | 2001-07-17 | Sumitomo Electric Industries, Ltd. | Copper circuit junction substrate and method of producing the same |
EP1758175B1 (en) | 2004-05-21 | 2016-05-04 | Hitachi Metals, Ltd. | Electrode wire for solar battery |
-
1987
- 1987-05-22 JP JP12532487A patent/JPS63289950A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0788153A2 (en) | 1996-02-05 | 1997-08-06 | Sumitomo Electric Industries, Ltd. | Member for semiconductor device using an aluminum nitride substrate material, and method of manufacturing the same |
US5998043A (en) * | 1996-02-05 | 1999-12-07 | Sumitomo Electric Industries, Ltd. | Member for semiconductor device using an aluminum nitride substrate material, and method of manufacturing the same |
US6261703B1 (en) | 1997-05-26 | 2001-07-17 | Sumitomo Electric Industries, Ltd. | Copper circuit junction substrate and method of producing the same |
EP1758175B1 (en) | 2004-05-21 | 2016-05-04 | Hitachi Metals, Ltd. | Electrode wire for solar battery |
EP3012872B1 (en) | 2004-05-21 | 2017-07-12 | Hitachi Metals, Ltd. | Solar cell |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5588419B2 (en) | package | |
US5010388A (en) | Connection structure between components for semiconductor apparatus | |
US5821617A (en) | Surface mount package with low coefficient of thermal expansion | |
JP2024516742A (en) | Microelectronic package assembly and fabrication method - Patents.com | |
EP0435603B1 (en) | RF transistor package and mounting pad | |
JP3816821B2 (en) | High frequency power module substrate and manufacturing method thereof | |
US5311399A (en) | High power ceramic microelectronic package | |
JP3387221B2 (en) | High thermal conductive ceramic package for semiconductor | |
JPS63289950A (en) | Package for semiconductor | |
JP2003060282A (en) | Submount material | |
JPH08102570A (en) | Ceramic circuit board | |
JP3814924B2 (en) | Semiconductor device substrate | |
JP3129249B2 (en) | Optical semiconductor hermetically sealed container and optical semiconductor module | |
JP2650044B2 (en) | Connection structure between components for semiconductor devices | |
JP3047864B2 (en) | Optical semiconductor hermetically sealed container and optical semiconductor module | |
JP2525873B2 (en) | Connection structure between semiconductor device parts | |
JP2735708B2 (en) | Ceramic wiring board | |
JPS6381956A (en) | Package for semiconductor device | |
JPH0547953A (en) | Package for semiconductor device | |
JPH0581184B2 (en) | ||
JPH0997855A (en) | Semiconductor device | |
JP2005252121A (en) | Package for storing semiconductor element and method for manufacturing the same | |
JPS63244653A (en) | Semiconductor device | |
JPH0140514B2 (en) | ||
JPS6350046A (en) | Ultra-low temperature cooling container |