JPS63276030A - liquid crystal display device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a technique that is effective when applied to a liquid crystal display device, particularly a liquid crystal display device having a liquid crystal display section configured in an active matrix method. .

[Prior art]

An active matrix type liquid crystal display device has a liquid crystal display section configured by arranging a plurality of pixels in a matrix. Each pixel is defined by a plurality of horizontally extending scanning signal lines (gate signal lines) and a plurality of vertically extending video signal lines (drain signal lines) that intersect with the horizontally extending scanning signal lines. It is located in The video signal line is formed above the scanning signal line with an insulating film interposed therebetween.

The pixel is mainly composed of a liquid crystal, a transparent pixel electrode and a common transparent pixel electrode arranged with the liquid crystal interposed therebetween, and a thin film transistor (TFT). A transparent pixel electrode and a thin film transistor are provided for each pixel. The transparent pixel electrode is connected to one source/drain electrode of the thin film transistor. The other source/drain electrode of the thin film transistor is connected to the video signal line, and the gate electrode is connected to the scanning signal line.

Regarding liquid crystal display devices, for example, Japanese Patent Application Laid-Open No. 11g6
It is described in No. 1-151516.

[Problem that the invention seeks to solve]

In this type of liquid crystal display device, during the manufacturing process, foreign matter such as dust gets mixed into the liquid crystal display section or adheres to a mask used in photolithography. If this foreign substance enters or exists at the intersection (crossover section) between the scanning signal line and the video signal line, it will cause a pinhole in the insulating film between them, causing a short circuit between them. Particularly, conventionally, when the insulating film is formed of a single layer of silicon nitride film, there is a high probability that pinholes will occur, resulting in frequent short circuits between the two. If the scanning signal line and the video signal line are short-circuited, a line defect occurs in which all the pixels connected to each line become defective. There is a problem in that line defects result in defective products as liquid crystal display devices and reduce the yield of liquid crystal display devices.

An object of the present invention is to provide a technique that can improve the yield of liquid crystal display devices.

Another object of this invention is to provide a technique that can prevent short circuits between scanning signal lines and video signal lines of a liquid crystal display section in a liquid crystal display device.

Another object of the present invention is to provide a technique capable of achieving the above object and increasing the operating speed of a liquid crystal display device.

Another object of the present invention is to provide a technique capable of achieving the above-mentioned objects and preventing the adverse effects caused by charging of a light-shielding film that prevents light from entering a channel formation region of a thin film transistor. be.

Another object of the present invention is to provide a technique that can reduce the number of manufacturing steps required to achieve the above object.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this application is as follows.

In a liquid crystal display device in which a thin film transistor is arranged in a region defined by a scanning signal line and a video signal line intersecting the upper layer thereof, the video signal line at the portion intersecting with the scanning signal line is cut, and the cut The respective video signal lines are electrically connected by a conductive layer formed above the video signal line with an insulating film interposed therebetween.

[Effect]

According to the above-described means, it is possible to interpose a plurality of layers of insulating films between the intersections of the scanning signal line and the video signal line, thereby reducing the probability that pinholes will occur at the same position. It is possible to prevent line defects due to short circuits between the two and improve the yield of liquid crystal display devices.

Hereinafter, the configuration of the present invention will be explained together with one embodiment.

Note that throughout the description of the embodiments, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

[Embodiment of the invention■]

One pixel of the liquid crystal display part of the liquid crystal display device which is Embodiment I of the present invention is shown in FIG. A cross section taken along the line ■-■ in the figure is shown in FIG. 3, respectively.

As shown in FIGS. 1 to 3, the liquid crystal display device includes 1.
Lower transparent glass substrate S having a thickness of about 1 [mm]
A thin film transistor TPT is provided on the inner surface (liquid crystal side) of UB1. The thin film transistor TPT mainly includes a gate electrode GT, an insulating film GI used as a gate insulating film, an i-type semiconductor layer As used as a channel formation region, and a pair of source/drain electrodes 5D (SDI,
5D2).

The gate electrode GT is, for example, formed of a composite film in which a Mo layer is laminated on a Cr layer in order to prevent disconnection.
It is formed with a film thickness of about 0 [person]. The gate electrode GT is formed in the same manufacturing process as the scanning signal line (gate signal line or horizontal signal line) OL, and is integrated with and connected to the scanning signal line GL. The scanning signal line GL extends in the horizontal direction as shown in FIG.
Multiple pieces are arranged vertically.

The insulating film GI is formed on the gate electrode GT and the scanning signal line GL. The insulating film GI is formed using, for example, a silicon nitride film formed by plasma CVD, and has a thickness of about 3000 [layers].

The i-type semiconductor layer AS is formed of an amorphous silicon film or a polycrystalline silicon film, and is formed to have a thickness of about 2000 [layers]. The i-type semiconductor layer AS mainly constitutes a channel formation region of the thin film transistor TPT. i-type semiconductor layer A
As shown in detail in FIGS. 1 and 3, S is provided to extend between the intersection of the scanning signal line GL and the video signal line DL, which will be described later.

A pair of source/drain electrodes SDI and SD2 are provided on the i-type semiconductor layer AS, separated from each other. sauce·
The drain electrode SD is configured so that when the bias polarity of the circuit changes, the source and drain are switched in operation. In other words, the thin film transistor TPT is bidirectional like a FET.

The source/drain electrode SD is, for example, an i-type semiconductor layer A.
The ER is formed by sequentially stacking a high impurity concentration n-type semiconductor layer, a Cr layer, and an AQI layer from the bottom layer that contacts S.
The 1" type semiconductor layer is made of an amorphous silicon film or a polycrystalline silicon film, and is formed with a thickness of about 500 [layers]. The Go type semiconductor layer has a contact resistance value with the i type semiconductor layer AS. The a Cr layer, which is configured to reduce the irradiance, prevents the reaction between the Go-type semiconductor layer and the AQ layer.It is formed as a barrier layer, and is formed with a thickness of about 700 [in].

The AD layer is formed of a wiring material having a low resistance value in order to increase the signal transmission speed, and is formed to have a thickness of about 3500 [layers]. As AQIIa, an AQ-8i layer or an AEI-Cu layer may be used.

One source/drain electrode SD2 of the thin film transistor TPT is a transparent electrode (pixel electrode) I provided for each pixel.
TOI is connected. The transparent electrode ITOI constitutes one of the pixel electrodes of the liquid crystal display section. The transparent electrode IT01 is formed to have a thickness of, for example, about 1200 [people]. The other source/drain electrode SD1 is formed in the same manufacturing process as the video signal line (drain signal line or vertical signal line) DL.

It is integrated with and connected to the video signal line DL. As shown in FIG. 1, the video signal line DL is connected to the scanning signal line GL.
Although not shown in the figure, a plurality of them are arranged in the horizontal direction.

On the thin film transistor TPT and transparent electrode ITOI,
A protective film PSVI is provided. The protective film PSVI is
It is mainly formed to protect the thin film transistor TPT from moisture, etc., and a material with high transparency and good moisture resistance is used. The protective film PSVI is made of, for example, a silicon oxide film or a silicon nitride film formed by plasma CVD, and is formed to a thickness of approximately 8000 mm.

A shielding film LS is provided above the protective film PSVI on the thin film transistor TFT to prevent external light from entering the i-type semiconductor layer AS used as a channel formation region. The shielding IILs are made of, for example, an A2 layer (or a Cr
It is formed by sputtering to a thickness of about 4,000 [layers].

The thin film transistor TPT is configured such that when a positive bias is applied to the gate electrode GT, the channel resistance between the source and the drain decreases, and when the bias is reduced to zero, the channel resistance increases. That is, the thin film transistor TPT is configured to control the voltage applied to the transparent electrode ITOI.

As shown in FIGS. 1 and 3, the aforementioned video signal line DL is cut off at the portion where it intersects with the scanning signal line GL. The video signal line DL intersects with the scanning signal line GL at the intersection.
are interposed, and then cut at a predetermined interval. Then, each of the disconnected video signal lines D
L is a protective film psvi above the video signal line DL.
They are electrically connected by a conductive layer formed with an insulating film interposed therebetween. The conductive layer is formed in the same manufacturing process as the light shielding film LS, and is configured integrally with the light shielding film LS, and is configured to connect the video signal lines DL cut through the connection hole TH formed in the protective film PSVI. has been done.

The liquid crystal display device configured in this way has scanning signal lines GL.
Since a plurality of insulating films (insulating film GI and protective film PSVI) can be interposed between the intersection of the video signal line DL and the video signal line DL, a pinhole can be formed at the same position in each of the insulating film GI and the protective film PSVI. can reduce the probability of occurrence. In other words, even if a pinhole occurs in one insulating film GI, the other protective film PSVI at the same position as the pinhole
The probability of pinholes occurring in the scanning signal line GL and video signal line DL is extremely small. Therefore, it is possible to reduce short circuits between the scanning signal line GL and the video signal line DL at the intersection thereof, thereby preventing line defects in the liquid crystal display section. However, the yield of liquid crystal display devices can be improved.

In addition, in addition to the insulating film GI and the protective film PSVI, a part of the i-type semiconductor layer As of the thin film transistor TPT is extended between the intersection of the scanning signal line GL and the video signal line DL. Since the probability of pinholes occurring in the respective layers between them can be further reduced, short circuits between the two can be further prevented.

Furthermore, by providing an insulating film GI and a protective film PSVI (or an i-type semiconductor layer AS) between the intersection of the scanning signal line GL and the video signal line DL, the parasitic capacitance formed between them can be reduced. By reducing the dielectric constant of the dielectric film of the scanning signal line G
Since the parasitic capacitance added to each of the L and video signal lines DL can be reduced, it is possible to increase the write operation speed for selecting each pixel of the liquid crystal display device.

Further, by forming the conductive layer (light shielding film LS) connecting between the cut video signal lines DL in the same manufacturing process as the light shielding film LS, the manufacturing process for forming the conductive layer can be changed to the light shielding film LS. Since the process can also be used for forming the liquid crystal display device, the manufacturing process of the liquid crystal display device can be reduced.

Further, by configuring a conductive layer (light-shielding film LS) that connects the cut video signal lines DL together with the light-shielding film LS, the potential of the light-shielding film LS is fixed to the potential of the video signal line DL. Therefore, it is possible to reduce harmful effects caused by charging of the light shielding film LS, such as fluctuations in the threshold voltage of the thin film transistor TPT.

The liquid crystal LC is defined and enclosed by a lower alignment film 0RII and an upper alignment film 0RI2 that set the orientation of liquid crystal molecules in a space formed between a lower transparent glass substrate SUB1 and an upper transparent glass substrate 5UB2. There is.

The lower alignment film ○RII is formed on the protective film PSVI on the side of the lower transparent glass substrate 5UBI.

On the inner surface (liquid crystal side) of the upper transparent glass substrate SUB 2-, a color filter FIL, a protective film PSv2, a common transparent electrode (common pixel electrode HTo2 and the upper orientation 11
AORIs 2 are sequentially stacked.

The common transparent electrode ITO2 is connected to the lower transparent glass substrate SU.
It faces the transparent electrode ITO1 provided for each pixel on the B i side and is configured integrally with another adjacent common transparent electrode ITO2.

The color filter FIL is formed by dyeing a dyed base material made of a resin material such as acrylic resin with a dye for each pixel. Dyeing is done using photolithography technology.

The protection 111PsV2 is provided to prevent the dyes used to dye the color filters FIL into different colors from leaking into the liquid crystal LC. The protective film PSV2 is made of, for example, a transparent resin material such as acrylic resin or epoxy resin.

This liquid crystal display device has a lower transparent glass substrate 5UBl side,
Each layer on the upper transparent glass substrate 5UB2 side is formed separately, and then the upper and lower transparent glass substrates SUB1 and 5UB are formed separately.
2 are stacked on top of each other and a liquid crystal LC is sealed between the two.

Note that the central part of FIG. 2 shows a cross section of one pixel part, while the left side shows a cross section of the left edge part of the transparent glass substrates SUB1 and 5UB2 where the lead wiring is present. The right side shows a cross section of the right edge portion of the transparent glass substrates 5UBI and 5UB2 where no lead wiring is present.

The sealing material SL shown on the left and right sides of FIG. 2 is configured to seal the liquid crystal LC.

Transparent glass substrate S excluding liquid crystal filling port (not shown)
It is formed along the entire circumference of lines UB1 and 5UB2. The sealing material SL is made of, for example, epoxy resin.

Transparent electrode ITO2 on the side of the upper transparent glass substrate 5UB2
is connected to the lead-out wiring layer formed on the lower transparent glass substrate 5UBl side at least in one place by a silver paste material SIL.

This lead wiring layer includes the aforementioned gate electrode GT, source;
They are formed in the same manufacturing process as the drain electrodes SD.

the alignment films 0RII and 0RI2, the transparent electrode ITOI,
Common transparent polar ITO2, protective film psvi and psv2,
Each layer of the insulating film GI is formed inside the sealing material SL. The polarizing plate POL has a lower transparent glass substrate 5UBI,
6 formed on the outer surface of each of the upper transparent glass substrates 5UB2 [Embodiment (■) of the invention] This embodiment (■) is another embodiment of the present invention in which the resistance value of the video signal line is reduced in the liquid crystal display device. This is an example.

One pixel of the liquid crystal display section of the liquid crystal display device according to the embodiment (2) of the present invention is shown in FIG. 4 (a plan view of the main part).

As shown in FIG. 4, the liquid crystal display device of this embodiment
A conductive layer (light-shielding film LS) is configured to extend to connect the video signal lines DL cut at the intersection with L. The conductive layer and each cut video signal line DL are electrically connected through connection holes TH formed in the protective film psvt.

In this way, by extending the conductive layer (light shielding film LS) that connects the cut video signal lines DL to the upper layer of the video signal lines DL, the substantial cross-sectional area of the video signal lines DL can be reduced. Since the resistance value can be increased and the resistance value can be reduced, it is possible to increase the write operation speed of the liquid crystal display device.

As above, the invention made by the present inventor has been specifically explained based on the above embodiments. However, the present invention is not limited to the above embodiments, and can be modified in various ways without departing from the gist thereof. Of course.

For example, one aspect of the present invention provides a scanning signal line OL of the liquid crystal display device.
The insulating film GI provided between the video signal line DL and the video signal line DL may be composed of a plurality of layers (a plurality of insulating films made of the same material, a plurality of insulating films made of different materials).

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

In the liquid crystal display device, it is possible to prevent a short circuit between the scanning signal line and the video signal line at the intersection thereof, thereby improving the yield.

[Brief explanation of drawings]

1 is a plan view of a main part showing one pixel of a liquid crystal display part of a liquid crystal display device according to a first embodiment of the present invention; FIG. 2 is a sectional view taken along line nn in FIG. 1; Figure 3 shows ■-■ in Figure 1.
FIG. 4, which is a sectional view taken along a line, is a plan view of a main part showing one pixel of a liquid crystal display section of a liquid crystal display device according to embodiment (2) of the present invention. In the figure, SUB...transparent glass substrate, OL...scanning signal line, DL...video signal line, GI...insulating film, GT
...gate electrode, AS...i-type semiconductor layer, SD...
・Source/drain electrode, psv...protective film, LS・
...Light shielding film, TH...Connection hole, LC...Liquid crystal, TP
T: Thin film transistor. '-＼ Agent Patent Attorney Ono (1 winner, ) Figure 3 PSV...Protective film LS...Atsukou film

Claims (1)

[Claims] 1. Within a region defined by a scanning signal line and a video signal line that intersects with this scanning signal line and extends above it, each of the scanning signal line and video signal line In a liquid crystal display device in which thin film transistors to be connected are arranged, a video signal line at a portion that intersects with the scanning signal line is cut, and an insulating film is placed on each of the cut video signal lines in a layer above the video signal line. A liquid crystal display device characterized in that it is electrically connected by an intervening conductive layer. 2. Between the scanning signal line and the conductive layer connecting the cut video signal line, an insulating film is formed between the scanning signal line and the video signal line, and an insulating film is formed between the video signal line and the conductive layer. 2. The liquid crystal display device according to claim 1, further comprising an insulating film formed between the liquid crystal display device and the insulating film. 3. Between the scanning signal line and the conductive layer connecting the cut video signal line, an insulating film is formed between the scanning signal line and the video signal line, and an insulating film is formed between the video signal line and the conductive layer. 3. The liquid crystal display device according to claim 1, further comprising an insulating film formed between the thin film transistors and a semiconductor layer forming the thin film transistor. 4. The conductive layer connecting the cut video signal lines is
4. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is formed in the same manufacturing process as a light shielding film that prevents light from entering a channel region of the thin film transistor. 5. The conductive layer connecting the cut video signal lines is
5. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is integrally formed with a light shielding film that prevents light from entering a channel region of the thin film transistor. 6. The conductive layer connecting the cut video signal lines is
6. Each of the liquid crystal display devices according to claim 1, wherein the liquid crystal display device is configured to extend above the video signal line.