JPS63248135A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a groove formed just after a mask to obtain a desired electrode width by a method wherein, when a buried gate electrode is formed in a semiconductor substrate, the forming region only is ready-formed as a region having an impurity concentration higher than that of other region and here is selectively etched to generate the groove. CONSTITUTION:A resist 3 is applied on a semiconductor substrate 1 and impurity ions of As and so on are implanted via a mask alignment for forming a groove and exposing and developing processes to form a high-impurity concentration region 2. Then, the resist 3 which becomes unnecessary is removed, the substrate 1 is dipped into a solution of HF60cc + HNO3600cc + CH3 COOH900cc + I20.2g, for example, for about 30 seconds and the region 2 is formed into the form of a groove utilizing a phenomenon that if the impurity concentration of a region is high, the region is easy to be etched. After that, a diffused region 5 is provided on the periphery encircling the region 2 to form a thermal oxide film 6 extending from the region 2 to the region 5 and a gate electrode 4 which intrudes into the region 2 is provided through this film 6. The control of the width of the electrode is improved in such a way to obtain a fine MOS device, wherein a punch through and so on are not generated.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) This invention creates an accurate groove on the substrate according to the mask u1.

The present invention relates to a method of manufacturing a P4 body for forming an Ic-embedded game hti.

(Conventional technology) When forming a recessed gate'[ball], the conventional technology follows the mask! '4 was difficult to form, and the mask tended to be larger than the mask.

This situation is shown in FIGS. 2(a) to 42(e). In FIG. 2(a), the entire surface of the S plate 1 is formed with impurities, a region 2 having a high degree of 7A. 42 (FIG. 1b) shows the state in which a resist 3 is applied to the mask 1, the mask is removed, and the development process is completed. FIG. 2 tc) shows the high a star region 2 etched using a resist as a mask, and is etched to the same size as the resist.

FIG. 2(d) shows the shape of the groove after the resist is removed. More f! In Figure J2, a temporary gate material 4 is deposited to form a thermal annealing layer 6.

The gate material □ 14 is etched through a resist coating, masking, line light, and patterning process, and then a high-concentration impurity ion implantation and a heat process are performed to form the expanded area 5.

Figure 3 (1) shows a row in which the etching time was too long and etching was not performed according to the resist dimensions.

Since the entire surface is of ammonium oxide, the lower part of the resist is etched by a chemical reaction. 3rd ri! Jib
) is the finished shape of the groove in the above type of work.

If the groove becomes thick like this, the completed shape of HO8 will be wide as shown in No. 39(c), and the gate t
In the prior art, there was a case where the channel length varied.

Therefore, it is considered to be a matter of consideration to create grooves that match the mask (resist pattern) with good controllability.

(4 points while Seimei tries to solve it) When forming the gate 4 and others of the method inset type, the entire surface is impurities ar! When l is high, masked (resist d) vc/
4 cannot be made, so 1 partially impure MBa
It is an object of the present invention to provide a method for manufacturing a hand conductor device in which a positive C-4 of a mask 6 is formed by selectively etching a high-density region.

[Structure of the invention]

(Measures to solve the transient problem) As with semiconductor boards, impurities can be partially introduced (
Ru. After that, 1
By selectively etching, a mask pattern can be formed with good control.

(Operation) If 9s is obtained as per the mask, the intended large MIS can be fabricated by further forming a gate electrode and a diffusion region. That is.

41I of the gate electrode can be controlled with good controllability.

(Implementation row) An embodiment 91 of the present invention is shown in FIG. 1(a) to FIG. 110).

In Fig. 1a), a resist 3 is applied on a zero-handed conductor substrate 1, a mask for forming a groove is removed, an axis is passed through a phenol S, and a slope 2 of an inertness of, for example, As is applied. It was formed by ion implantation. The one that removed this resist was the part xI! gl(b), in this situation 1, for example, HF60cc+1 (No, 600cc+CH, C00
H901) cc 10 I @ 30 seconds wetz with 0.21 liquid
When Y-etching is performed, only the region with a high degree of n-type impurity is selectively etched, forming a VC thermal α-gelatinized pattern 6 on the semiconductor plate 1 of No. 1-49, as shown in No. 11g (C). ,
Deposit gate material 4, apply resist cloth, apply mask liquid, 1 light, pass through the phenomenon process, and etch gate material to goo)
11 [Create, 7 immersion impurity ion implantation, resist peeling, and tin modification! j [sufficient heat treatment I for the beak to extend laterally]
! FIG. 3 is a diagram showing a diffusion region formed by By this step, it is possible to form an accurate mask number 4, and to control the width of the 4 gate poles.

2. I explained As in 1c as an un#Iat.

As long as you use the etching solution properly, it doesn't matter what kind of impurities it contains. Etching is stupid.

Hey, gas is fine as long as it can etch the head area to the nth degree.

FIG. 4 shows another embodiment according to the present invention, and FIG. 1(c)
The same type of work is completed, the thermal acid f atom 6 is formed, and the gate 4 is
tj! Put t4 on the side, resist cloth, and mask.

After going through the exposure and development steps, the gate material was etched to form a gate electrode, and then non-RWIJ ions were implanted, the resist was removed, and no heat treatment was performed until the diffusion region was sufficiently extended. Although this structure increases the channel length, it has better 111JIa properties than the conventional technology (
, less variation in device characteristics, and 4? There is no degree of deterioration in sex, etc.

[Effects of the Invention] According to Jin's invention, by forming a precise groove in the mask 1, the gate electrode 1 can be f! Ill Ia sex can be greatly controlled. Furthermore, by adopting this structure, punch-through can be prevented, so fine P
It is also possible to make JLO8f-.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view showing an embodiment of the present invention. Figure 2. FIG. 3 is a sectional view showing the conventional moth, and FIG. 4 is a new view. l...#P4 body board, 2...non-S*flattened 1 degree head area, 3
...resist, 4...gate electrode, 5...expansion & head area, 6...thermal acid specific gravity. (b)-] Core 4-f ・Figure 1Figure 2Figure 4

Claims (3)

[Claims] (1) When forming a buried gate electrode, only the region where the gate electrode is to be formed is made a region with high impurity concentration in advance, and only the high concentration region is selectively etched to form an accurate groove in the semiconductor substrate according to the mask. By making
A method for manufacturing a semiconductor device characterized by controlling the width of a gate electrode with good controllability. (2) The method of manufacturing a semiconductor device according to claim 1, wherein the high concentration region is formed by ion implantation. (3) The method for manufacturing a semiconductor device according to claim 1, wherein the etching is performed by a chemical reaction.