JPS63208154A - Multi-processor schedule system - Google Patents

Abstract

PURPOSE:To enhance a throughput as a whole computer system by providing a mask for executing a program or a flag for selecting a slave type central processor, on the index of a program having the load module of an execution format, and allowing a user to select them. CONSTITUTION:In the index of the program 1e, the user sets only a flag 1g for selecting a slave CPU 2 for executing its program 1e, to logic '1'. A flag 1h of other program 1f is set as logic '0'. I such a flag state, when the programs 1e, 1f are started, respectively, the programs 1e, 1f are registered onto a main memory 1 as tasks 1i, 1j, connected to a task waiting queue 1b, respectively, and it is awaited that they are brought to a task execution schedule by an OS 1a. Thereafter, the OS 1a fetches successively a task from the head of the task waiting queue 1b, discriminates whether the flag of a task is logic '1' or not, and if it is logic '1', it is allocated to the CPU 2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multiprocessor scheduling method for a user to schedule tasks in a master/slave type multiprocessor computer system.

[Conventional technology]

FIG. 3 is a block diagram of a master/slave type multiprocessor computer system for explaining the conventional multiprocessor scheduling method. In the figure, 1 is the main memory, 2 is the slave CPU (slave type central processing unit),
3 is the master CPU (master type central processing unit), 4 is the C
It is RT. The main memory 1 also includes an O3 (operating system) 1a, a task waiting queue lb, a task IC executed by the slave CPU 2, and a master CPU 3.
A task 1d to be executed is provided.

Generally, in a master/slave type multiprocessor computer system, input/output processing and 5VC (supervisor
call monitoring program call) processing etc. is performed by master C.
It cannot be processed without using PU3. on the other hand,
Slave CPU2 is a CPU with restrictions such as arithmetic processing.
Slave C can only perform bound processing.
Whenever an input/output request, SVC request, etc. is issued on the PU 2, an execution interrupt is sent to the master CPU 3, and the request processing is executed by switching to the master CPU 3.

Next, the operation will be explained. 031a sequentially takes out each execution-waiting task lined up in the task waiting queue 1b (dequeuing), and sends the master CPU 3 and slave C
Either C in PU2 is free (ready to process)
Allocate them to PUs one after another. For example, the task IC is assigned to the slave CPU2, and the task 1d is assigned to the master CPU3. If task I is assigned to slave CPU2,
If C is a task with many input/output requests, and task 1d assigned to the master CPU 3 is a CPU-bound task such as arithmetic processing, the task IC repeatedly switches to the master CPU 3 every time it issues an input/output request. On the other hand, although the task 1d can be executed by the slave CPU 2, it is executed by the master CPU 3, and the load is concentrated on the master CPU 3.

[Problem that the invention seeks to solve]

In this way, the conventional scheduling method allocates tasks to the slave CPU 2 and master CPU 3 and processes them depending on the operation of 031a, so it is not possible to perform accurate scheduling according to the type of task, and the CPU
If a bound task is assigned to the master CPU 3, or if a task with many input/output requests is assigned to the slave CPU 2, interrupts will only be switched to the master CPU 3, and the performance of the multiprocessor will not be fully utilized. There is a problem in that the throughput of the entire computer system is reduced.

This invention was made to solve the above-mentioned problems, and allows users who understand the attributes of processing processes to explicitly specify that CPU-bound tasks be executed on slave central processing units. The purpose of this paper is to provide a multiprocessor scheduling method that allows the operating system to schedule each task to each central processing unit according to this specification, thereby making full use of the functions of the multiprocessor and increasing the throughput of the computer system as a whole. do.

Means for Solving Problem c] The multiprocessor scheduling method according to the present invention has the following features:
Program 1 having an executable load module e
,, 1 At the index of f, the program le,
Flags Ig and lh for selecting the slave type central processing unit 2 or master type central processing unit 3 that executes if
This flag is 1g.

1h is explicitly specified by the user in advance, and the flag 1g is set when the programs le and if are executed.

1h, the operating system 1a allocates tasks li and lj to each central processing unit 2 and 3.

[Effect]

When the programs le and If are activated, the operating system 1a identifies the flag, selects the slave central processing unit 2 when the flag is 1g, and selects the slave central processing unit 2 even if the central processing unit 2 is ready for processing. For example, program le is assigned to the central processing unit 2 as task 11, and when the identified flag is flag 1h, the master type central processing unit 3 is selected, and this central processing unit 3 [Embodiment of the Invention] Hereinafter, An embodiment of the present invention will be described with reference to the drawings. 1st
FIG. 1 is a configuration diagram of a master/slave type multiprocessor computer system for explaining a multiprocessor scheduling method according to an embodiment of the present invention. In the figure, 1 is a main memory, 2 is a slave CPU (slave type central processing unit), and 3 is a master CPU (master type central processing unit). Also, on the main memory 1, 1a
is O8 (operating system), 1b is a task waiting queue, li and lj are tasks corresponding to programs le and if, respectively, which have executable load modules on a disk provided outside the main memory 1, Ig and l
h is a flag provided at each index of programs le and If.

Next, the operation will be explained. First, the user uses the CPU
Program 1 that is known to perform bound movements
In the index of e, only the flag 1g for selecting the slave CPU 2 that executes the program 1e is set to logic "1".

The flag 1h in the index of the other program 1f is left at logic "0" without doing anything. When the programs le and If are activated in such a flag state, the programs le and if are registered as tasks li and lj in the main memory 1 and connected to the task waiting queue 1b, respectively, and scheduled for task execution by 081a. wait. Thereafter, 031a sequentially takes out tasks from the head of the task waiting queue 1b according to the process of the flowchart in FIG. 2, identifies whether or not the flag of the task is logic "1", and ” and the slave CPU 2 is in a processing ready state, the task is assigned to the slave CPU 2, otherwise the task is assigned to the master CPU 3.

Here, such an operation will be explained with reference to the flowchart of FIG. 2. When the task execution schedule starts (step SL), step 031a determines whether the slave CPU 2 is in an idle state ready for processing (step S2).
, when the task queue ib is free, the tasks are taken out sequentially from the head of the task waiting queue ib, and a task with a flag of logic "1" is searched for (step S3). Next, 031a has logic “1”
For example, if it is determined that there is a task with a flag Ig of logic "1", the task 11 is assigned to the slave CPU 2 (step S5). Next, 0
31a determines whether or not the master CPU 3 is in the free state (step S6), and if it is in the free state, takes out the task at the head of the task waiting queue lb, for example, task 1j, from the task waiting queue 1b and assigns it to the master CPU 3 (step S6). S7), the allocation ends the process (step 38).

On the other hand, when it is determined in step S2 that the slave CPU 2 is not in an idle state, the process moves to step S6, and also when it is judged in step S4 that there is no task with a flag of logic "1", the process moves to step S6.

Therefore, as long as the master CPU 3 is in the free state, the process of step S7 is performed, and when it is not in the free state, the process moves to step S9 and ends.

Note that in the state shown in FIG. 1, the flag 1g is logical rlJ and the slave CPU 2 is in an idle state, so
Task 11 is assigned to slave CPU2. Furthermore, since the flag 1h is logic "0" and the master CPU 3 is in an idle state, the task 1j is assigned to the master CPU 3.

In this way, according to the above embodiment, the CPU-bound task li can be executed by the slave CPU 2, and the other input/output processing-oriented tasks 1j can be executed by the master CPU 3, thereby maximizing the throughput of the entire computer system. It can be raised to the limit.

In the above embodiment, the unit in which the user explicitly specifies the task to be executed by the slave CPU is in the load module unit, but it is also possible to have the user explicitly specify the task in the subroutine unit or in the subroutine unit. good. In this case as well, similar effects can be achieved.

〔Effect of the invention〕

As described above, according to the present invention, a flag for selecting a master central processing unit or a slave central processing unit that executes the program is provided in the index of a program having an executable load module, and this flag is set to the index of a program having an executable load module. The user is required to explicitly specify tasks in advance, and when the program is executed, the operating system allocates tasks to each central processing unit according to the flags. It is possible to selectively use the processing unit and the slave type central processing unit, thereby making full use of the functions of the multiprocessor, resulting in the effect that the throughput of the computer system as a whole can be increased.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a master/slave type multiprocessor computer system for explaining a multiprocessor scheduling method according to an embodiment of the present invention, and FIG. 2 explains the operation of the multiprocessor scheduling method of this embodiment. FIG. 3 is a block diagram of a master/slave type multiprocessor computer system for explaining the conventional multiprocessor scheduling method. 2...Slave type central processing unit, 3...Master type central processing unit, le, If...Program, Ig, lh
...Flag, li, 1j...Task, 1a...Operating system. Agent Masu Oiwa tIjl (2 idiots) Figure 3 (company) Φ:, -

Claims (1)

[Claims] In a master/slave type multiprocessor computer system comprising a master type central processing unit and a slave type central processing unit, an index of a program having an executable-format load module is specified by the master type central processing unit that executes the program or the type described above. A flag is provided to select a slave type central processing unit, the user is required to explicitly specify this flag in advance, and when the program is executed, the operating system allocates tasks to each of the above central processing units according to the flag. Features a multiprocessor scheduling method.