JPS63207288A - Picture reproducing device - Google Patents

Abstract

PURPOSE:To prevent the occurrence of flicker and to improve the picture quality by providing a picture information writing means, first, second, and third storage means, and a picture information reading means which reads out three kinds of picture information on a display screen at the speed which is four times as high as the speed at which a field signal is read out from a recording medium to the first and second storage means. CONSTITUTION:For example, data 2A and 2B already written in a period T2 are read out from line memories 206 and 210 in a period T3. Simultaneously, data 1B written in a line memory 208 2H before is transferred to a line memory 212 and is written there. Data selectors S6 and S7 and a multiplexer 218 are controlled to prescribed states at intervals of 1/4H, and data (1B+2A)/2, 2A, (2A+2B)/2, and 2B are successively outputted from an output terminal Y and are converted to a luminance signal Yout by a D/A converter 220 and are outputted to an encoder. Thus, luminance signals corresponding to 1050 horizontal scanning lines are generated in order from the top on a display screen 230 and a picture is reproduced by non-interlacing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image reproducing device, and particularly relates to an image reproducing device that
An image reproducing device that simultaneously reads two field signals for one frame from a recording medium in which video signals for one frame are recorded in two tracks, and reproduces a still image based on these two field signals. .

[Conventional technology]

In television scanning, so-called interlaced scanning is used in which horizontal scanning lines are skipped every few lines in order to save the required transmission bandwidth.

In general, interlaced scanning in which every other line is skipped (2:l) is widely used. (2: In the l”l interlaced scanning method, the coarse screen (field) created by one vertical scan is divided into two
The images are overlapped to form a single screen (frame). For example, the transmission bandwidth of an NTSC television is set so that field repetition can be performed 60 times per second and frame repetition can be performed 30 times per second. One frame is generally represented by 525 horizontal scanning lines, and one
The starting points of horizontal scanning are shifted by %H (H is one horizontal scanning period) between odd-numbered fields and even-numbered fields forming a frame.

By the way, when recording video signals on various recording media such as magnetic tapes and magnetic sheets, [2: l) Frame recording is performed in which each odd field and even field signal is recorded one track at a time in accordance with interlaced scanning. be exposed.

In addition, in this case, two color difference signals R-
Y and the color difference signal B-Y are alternately switched for each IH, and each is FM-modulated using two carrier waves with slightly different frequencies and superimposed on the luminance signal Y.

[Problem that the invention seeks to solve]

However, conventional image reproducing devices that reproduce video signals recorded in frames on the various recording media mentioned above are configured to reproduce frames 30 times per second in accordance with the interlaced scanning of televisions. Another problem is that the displayed image has flicker due to this frame reproduction 30 times per second.

The present invention was made in view of these circumstances, and
It is an object of the present invention to provide an image reproducing device that prevents the occurrence of flicker due to the above-mentioned frame reproduction and also achieves high image quality.

[Means for solving problems]

In order to achieve the above object, the present invention simultaneously reads out two field signals for one frame from a recording medium in which one field per track and one frame worth of video signals are recorded on two tracks, and reads these two field signals simultaneously. In an image reproducing device that reproduces an image based on two field signals, the image reproducing device stores image information obtained from one of the two field signals read from the two tracks, and stores image information for two or more horizontal scanning lines. a first storage means having a storage capacity; and 2 storing image information indicating a luminance signal obtained from the other field signal of the two field signals read from the two tracks.
a second storage means having a storage capacity equal to or more than a horizontal scanning line; a third storage means for storing image information stored in either one of the first and second storage means; 1. Writing the image information of each of the two field signals constituting one frame into the second storage means at the same speed as the speed at which it is read from the recording medium, and
The image information written in either the first or second storage means, which is specified depending on whether the image information written in the second storage means belongs to an odd field or an even field, is stored in the third storage means. image information writing means for transferring the image information to the storage means; the image information stored in the first and second storage means, the image information stored in the first or second storage means, and the third storage means; Three types of image information obtained by arithmetic averaging of the image information stored in the storage means are displayed on the first and second storage means at a speed four times as fast as the speed at which the field signal is read from the recording medium. The apparatus is characterized by comprising image information successive output means for reading out image information corresponding to the arrangement of horizontal scanning lines on the screen.

[Effect]

In the image reproducing apparatus according to the present invention, the image information of each field signal constituting one frame read out simultaneously from a recording medium on which a frame of a video signal is recorded is individually read from the first and second image information for each horizontal scanning period. The information is written to the two storage means at the same speed as the speed at which it is read from the recording medium. Depending on whether the image information written in the first and second storage means belongs to an odd field or an even field, the image data stored in either one of the two storage means is stored in the third storage means. is transferred to storage means.

Next, image information stored in the first and second storage means, image information stored in either one of the eleventh and second storage means, and an image stored in the third storage means. Three types of image information obtained by arithmetic averaging of information are read out at a speed four times as fast as the speed at which image information is read out from the recording medium in accordance with the arrangement of horizontal scanning lines on the display screen. is 1050
It becomes possible to reproduce images of books using non-ink-lace.

As a result, it is possible to prevent flicker from occurring due to frame reproduction in the conventional apparatus, and it is possible to improve the quality of the reproduced image.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of an image reproducing apparatus according to the present invention will be described in detail below with reference to the accompanying drawings, with regard to only luminance signals.

Note that color signals can be easily inferred from this embodiment.

The overall configuration of an image reproducing apparatus according to the present invention will be described with reference to FIG. In FIG. 1, on the recording surface 2A of the magnetic sheet 2, a plurality of recording tracks, for example, 50 recording tracks, are formed concentrically at a pitch of about 100 μm. In this embodiment, the signal recorded on the recording track is a video signal, and this video signal is, for example, an FM video signal in which a luminance signal and a chroma signal are FM-modulated. This FM video signal is, for example, an odd field and an even field FM video signal forming one frame of an image that are individually recorded on two tracks by interlaced scanning. Furthermore, the FM video signals of the odd and even fields are respectively recorded on two tracks, track 8 and track B, shifted from each other by a distance corresponding to "AH", as shown in FIG. 2, for example.

Furthermore, the FM video signal of the odd field of track A has the color difference line sequential signal RAI-YAI at the beginning, and the FM video signal of the even field of track B has the color difference line sequential signal RAI-YAI at the beginning.
It is recorded so that BI-Yllll comes first.

The band spectrum of the FM video signal of each field is as shown in FIG. 3, for example, the FM luminance signal (YAfi+SA1.
, Yah+S++n) is set at 7MHz, the sync chip level 90 is set at 6MHz, and the white peak level 92 is set at 7.5MHz (however, n is 1).
integers greater than or equal to 5AIL and S, 1 indicates a composite synchronization signal). FM color difference line sequential signal (RAn-YAfi/B
A, -YaR,R1l1-'Ym-/Bmll-Y+
+7) band spectrum is below 2.5MHz, and the center frequency is FM color difference line sequential signal (RAa -YA,...
Rm--Yi+-) is 1.2MHz 2SFM color difference line sequential signal (BA-YA-SBllh-Ymh) is 1.3MHz
are set respectively. Also, FM color difference line sequential signal (
BAThYA, , Bi, -Ymh) are recorded at a signal level that is reproduced at a higher level than the FM color difference line sequential signal (RA, -YAhSR@Th-Y).

The DC motor 4 receives power supply from the motor drive circuit 6, and the magnetic sheet 2 rotates at a predetermined rotation speed, for example, 3.60 Or
The drive is controlled so that it rotates at a constant speed of pm. The motor drive circuit 6 is controlled by a control circuit 8, and controls rotational driving and stopping of the magnetic sheet 2 in response to a control signal DISK output from the control device 8.

A two-channel magnetic head 18 is disposed on the recording surface 2A of the magnetic sheet 2. The magnetic head 18 is a magnetic head in which two magnetic heads are integrally constructed along an inline, and the magnetic head 18 has a head cap of the first magnetic head 18A and a head cap of the second magnetic head 18B. The gap is separated by a distance of about 100 μm.

The magnetic head 18 simultaneously reproduces one field worth of FM video signals recorded on two tracks.

1f of the magnetic head 18! The FM video signal reproduced from track A by the air head 18A is transmitted to the reproduction amplifier 2.
After being amplified to a level that can be demodulated by 0, the signal is input to a low-pass filter (LPF) 22. The low-pass filter 22 has a characteristic of passing signals of approximately 2.5 MHz or less, thereby converting the FM video signal to the FM color difference line sequential signal (
RAfi-YAIISBAIIyAn) is extracted. FM color difference line sequential signal (RAn-YAfi, BAh-
YAfi) is demodulated by the demodulation circuit 24, and then the analog switch 80 contacts a, Q, 5F (delay control 26,
The signal is supplied to the contacts at the input ends of the analog switch 38 and the analog switch 44, respectively. Furthermore, FM color difference line sequential signals (RA-YAfi, B
□-YATh) is supplied as is to the contact point of the analog switch 82.

Further, the FM video signal from the reproduction amplifier 20 is input to a bypass filter (HPF) 28. The high-pass filter 28 has a characteristic of passing signals of approximately 2.5 MHz or higher, and thereby converts the FM video signal to the FM luminance signal (YA
n + 5A11 ) is extracted.

The FM luminance signal (YA, , +SAn) is sent to the demodulation circuit 3
Contact a of the analog switch 21 after being demodulated by 0
, 0.5H delay line 31 and synchronous separation circuit 32 (see FIG. 4(a)).

The analog switch 21 outputs a luminance signal YAn+5Afi that passes through the 0.5H delay line 31 and a luminance signal YAn that does not pass through the 0.5H delay line 31.
This is a switch that controls the output of +SAn to the luminance signal generation circuit 90. This analog switch 21 receives an output signal PAI from a D-type flip-flop circuit IT6, which will be described later.
The 0NSOFF operation is performed based on I, thereby matching the phases of the luminance signal and the color difference signal.

A luminance signal generation circuit 90 generates a luminance signal Y out which is output to an encoder (not shown) for non-interlaced image reproduction of the FM demodulated A field luminance signal YA and B field luminance signal Y8. It is a circuit.

The sync separation circuit 32 separates the horizontal sync signal HA (see FIG. 4(b)) from the luminance signals YA, +SA, and supplies this horizontal sync signal HA as a trigger pulse to a negative edge trigger type flip-flop circuit 34. do. This flip-flop circuit 34 outputs a signal HP[JLSA (see FIG. 4(C)) based on the horizontal synchronizing signal HA.

Output signal HPULS from flip-flop circuit 34
A is supplied to a positive edge trigger type monostable multi-bi break 36, a negative edge trigger type monostable multi-bi break 42, and an exclusive OR circuit 46, respectively.

This monostable multi-bi break 36 is a signal) IPULS
, the monostable multi-by-break 42 outputs the switch signal CP2 (see FIG. 4(e)) based on the falling edge of the signal HPULSA. )Output.

The color difference line sequential signal from the demodulation circuit 24 passes through the analog switch 38 and is connected to the non-inverting input terminal (+) of the differential amplifier 40.
The signals are respectively supplied to the inverting input terminal (-) of the differential amplifier 40 via the analog switch 44. The analog switch 38 receives the switch signal CP1 output from the monostable multi-bi break 36 and operates to turn ON and OFF, and the analog switch 44 receives the switch signal CP2 output from the monostable multi-bi break 42 and performs the N and OFF operations. do.

Grounded capacitors C1 and C2 are connected to the non-inverting input terminal (+) and the inverting input terminal (-) of the differential amplifier 40, respectively. The differential amplifier 40 receives the potential ECI (see FIG. 4(f)) generated between the terminals of the capacitor C1, and
The color difference signal RATh is generated based on the potential difference between the terminals of the capacitor C2 and the potential EC2 (see FIG. 4(g)).
-YAfi and color difference signals BAn-YA, . The output signal from the differential amplifier 40 (Fig. 4 (
h) is supplied to the exclusive OR circuit 46, which operates based on this output signal and the output signal HPULSA from the flip-flop circuit 34. The output signal PA (see FIG. 4(i)) from the exclusive OR circuit 46 is supplied to the clock terminal CK of the D-type flip-flop circuit 76.

The FM video signal reproduced by the second magnetic head 18B of the magnetic head 18 is amplified by a reproduction amplifier 48 to a level that can be demodulated, and then passed through a low-pass filter (LPF).
)50. The low pass filter 50 is approximately 2.5
It has the characteristic of passing signals of MHz or lower, and as a result, it can be used to convert FM video signals to FM color difference line sequential signals (Bi, -Yan).
, Rmh-Yia) are extracted. The FM color difference line sequential signal (Bg--YBR, RafiYm,) is sent to the demodulation circuit 52.
After being demodulated by the analog switch 82, the contact a
The signal is supplied to the contacts on the input sides of the 10°5H delay line 54, analog switch 66, and analog switch 72, respectively. Furthermore, the color difference line sequential signal (
Bn-Ym-, RmTh-Ym-) are supplied to the contacts of the analog switch 80 as they are.

Further, the FM video signal from the reproduction amplifier 48 is input to a bypass filter (HPF) 56. The bypass filter 56 has a characteristic of passing signals of approximately 2.5 MHz or higher, and thereby the FM luminance signal <Y from the FM video signal.
Bl, +Sll, , ) are extracted.

The FM luminance signal (Yi-+S Ilh) is sent to the demodulation circuit 5
Contact a of analog switch 49 after being demodulated by
The signal is supplied to a 10.5H delay line 59 and a synchronous separation circuit 60, respectively. Analog switch 49 is 0.5H delay line 5
This is a switch that controls the output of the luminance signal YB, .

This analog switch 49 is turned on and off based on an output signal Y3 from an inverter 78, which will be described later, so that the phases of the luminance signal and the color difference signal are matched.

The synchronization separation circuit 60 receives the luminance signal Y. +S! 1. ．． (see Fig. 4 (j)) to the horizontal synchronizing signal H++ (see Fig. 4 (k)
)) and supplies this horizontal synchronizing signal H1 as a trigger pulse to a negative edge trigger type flip-flop circuit 62. The flip-flop circuit 62 outputs a signal HPULSm (FIG. 4<ti) based on the horizontal synchronizing signal Ha.
＞Reference) is output. The output signal HPULS B from the flip-flop circuit 62 is a positive edge trigger type monostable multivibrator 64, a negative edge trigger type monostable multivibrator 70, and an exclusive OR circuit 7.
4 respectively. This monostable multivibrator 70 outputs a switch signal CP3 (see FIG. 4(m)) based on the rise of the signal tlPLILs a , and the monostable multivibrator 70 outputs a switch signal CP3 (see FIG. 4(m)) based on the rise of the signal tlPLILs a .
Switch signal CP4 (
(see FIG. 4(n)).

The FM color difference line sequential signal from the demodulation circuit 52 passes through an analog switch 66 to the non-inverting input terminal (+) of a differential amplifier 68.
and the inverting input terminal (-) of the differential amplifier 68 via the analog switch 72. The analog switch 66 is turned on and off based on the switch signal CP3 output from the monostable multi-bi break 64, and the analog switch 72 is turned on and off based on the switch signal CP3 output from the monostable multi-bi break 7.
ON based on the switch signal CP4 output from 0
.

OFF works.

Grounded capacitors C3 and C4 are connected to the non-inverting input terminal (+) and the inverting input terminal (-) of the differential amplifier 68, respectively. The differential amplifier 68 receives the potential EC3 (see FIG. 4 (0)) generated between the terminals of the capacitor C3, and
A color difference signal B is generated based on the potential difference with the potential EC3 (see FIG. 4(p)) generated between the terminals of the capacitor C4. -Y
This is a circuit that discriminates between the color difference signal R1-Yih and the color difference signal R1-Yih. Output signal from the differential amplifier 68 (Fig. 4(q))
) is input to the exclusive OR circuit 74, and the exclusive OR circuit 74 operates based on this output signal and the output signal HPtlLSa from the flip-flop circuit 62. Output signal Pi from exclusive OR circuit 74
(see FIG. 4(r)) is supplied to the data terminal of the D-type flip-flop circuit 76 as a data signal.

The analog switch 80 outputs color difference line sequential signals (RA, BA, -YA, . . . ) demodulated by the demodulation circuit 24.
), and the color difference line sequential signal (B111l-Y B
It is a switch that controls the output of R11hYi+W). This analog switch 80 receives a switch signal PAR(
4(S)), and when the output signal P_All is at a high level, the switch is turned on. Color difference line sequential signal (RAR-YAn, BAh-YAn) passing through contact a of analog switch 80
is a color difference line sequential signal (RA?l YA1%, BA, , -YAR) which is applied to contact a of the analog switch 84 and also passes through contact a of the analog switch 80 via contact a.
The color difference line sequential signal (Bi
-YmR, R□-YIn) are respectively fed to the contact C of the analog switch 84.

The analog switch 82 receives a switch signal r5 obtained by inverting the phase of the switch signal PAm by the inverter 78.
It turns on and off based on the switch signal PAR, and turns off when the switch signal PAR is at a low level. This analog switch 82 outputs the color difference line sequential signals (BB-Y, Rlh-Y, R) demodulated by the demodulation circuit 52 and the demodulation circuit 24.
This is a switch that controls the output of the color difference line sequential signals (RA, YA, BAfiYAh) that have been demodulated by and then passed through the 0.5H delay line 26. The color difference line sequential signal (B111-Y
, , R□-YB, , ) is a color difference line sequential signal (BBnYl-1RI
The color difference line sequential signals (RAfi-YAII, BAR-YAfi) delayed by 0.5H with respect to R-Y, .

The analog switch 84 receives two color difference line sequential signals (RAE YAs, B
An-YAfi) and color difference line sequential signal (BBh-Ym-
SRmfi-YaR) and two color difference line sequential signals (RAfiYARl) supplied via the analog switch 82.
B,, -YAh) and color difference line sequential signal (Bi, -Yl
n, R++fiYi-). This analog switch 84 is the analog switch 80
Similarly, switch control is performed based on the switch signal P0 from the output terminal Q of the D-type flip-flop circuit 76, and when the switch signal P All is at a high level, the contact a
, b are simultaneously switched to the contact a side, and switches that select contacts c and d are simultaneously switched to the contact C side. The switch that selects the contacts a and b of the analog switch 84 is the switch that selects the contacts a and a' of the analog switch 86, and the switch that selects the contact c1d of the analog switch 84 is the switch that selects the contacts a and b' of the analog switch 86.
Each is connected to a select switch.

The analog switch 86 receives the output signal PA from the exclusive OR circuit 46 and the output signal P from the exclusive OR circuit 74.
, the switch is controlled based on .

Two switches of analog switch 86 output signal PA
When the output signal P is low level, the contacts a and b are simultaneously switched, and when the output signal P is high level, the contacts a' and b' are switched simultaneously.

Further, contacts a and b' of the analog switch 86 are connected, and contacts a' and contact a' are connected, respectively. As a result, the color difference signal RY is always outputted through the contact a', and the color difference signal B-Y is always outputted through the contact b'.

Next, FIG. 5 shows a specific configuration of the luminance signal generation circuit 90 that generates the luminance signal Y a ut . In the same figure, A
The field luminance signal YA is written as image information into a line memory 204 or line memory 206 having a storage capacity for one horizontal scanning line via an A/D converter 200 and a data selector Sl.

On the other hand, the brightness signal Y8 of the B field is sent to the A/D converter 2.
02, line memory 208 or line memory 2 having a storage capacity for one horizontal scanning line via data selector S3
10 as image information.

Image information written to line memory 204 or line memory 206 is sent to input terminal A of multiplexer 218 via data selector $2, and image information written to line memory 208 or line memory 210 is sent to input terminal A of multiplexer 218 via data selector S4. The signals are respectively input to input terminals C of the multiplexer 218. Here, the data selectors S1 and S2, S3 and S4 are respectively switched to opposite contact sides every horizontal scanning period (hereinafter referred to as IH).

Furthermore, the image information written to any of the line memories 204.206.208.210 output via data selectors S2 and S4 is output to 1 via data selector S5.
The data is transferred to a line memory 212 having a storage capacity for horizontal scanning lines. The switch S5 outputs the luminance signal YA of the A field reproduced by the first head 18A.
Contact a depending on whether it belongs to the first field (odd field) or the second field (even field)
Alternatively, it can be switched to a contact point.

The data selectors S6 and S7 add the image information stored in the line memory 212 and the image information stored in either one of the line memories 204 and 206 or one of the line memories 208 and 210 using an adder 214. This is a switch for adding.

216 is a multiplier that doubles the output of the adder 214, and the output of the multiplier 216 is sent to the multiplexer 218.
It is designed to be input to the 0 input terminal. The multiplexer 218 selectively outputs the image information input from the input terminal ASBSC every 1/4H from the output terminal Y in a predetermined order to be described later.

The D/A converter 220 converts the output of the multiplexer 218 into D.
/A conversion and output the luminance signal Y o to an encoder (not shown).
Output ut.

Next, the operation of the luminance signal generation circuit having the above configuration will be specifically explained with reference to FIGS. 6 and 7. FIG. 6 shows the human output relationship of the luminance signal generation circuit shown in FIG. 5 and the operating states of various switches, and FIG. 6 (A) shows the case where the Δ field belongs to the second field as described above. FIG. 3B shows the case where the A field belongs to the first field.

First, a case where the A field belongs to the second field will be explained. In this case, the luminance signals YA%Y, are input to the A/D converters 200 and 202 with their phases aligned, and are A/D converted to image information DA indicating the luminance signal.
SDm becomes. These image information DA SDi are stored in line memory 204.208 or line memory 206.21 as data indicating 525 horizontal scanning lines for each IH.
Written to 0. For example, when data selectors S1 and S3 are switched to contact a side, data selector S2
, S4 has switched to the contact side, and the image information DA
, DB are respectively written into the line memories 204, 208, and at the same time, the image information already written therein is read out from the line memories 206, 210. Here, in FIG. 6(A), image information DA
Among them, IA indicates the data of the first horizontal scanning line of the Δ field on the display screen 230 as shown in FIG. 7(A), and IB of the image information DIl
Similarly, A7 shows the data of the first horizontal scanning line of field B. In both Figures (A) and (B), the horizontal scanning line of field A is a broken line, and the horizontal scanning line of field B is a solid line. , horizontal scanning lines interpolated between the horizontal scanning lines of the A field and the horizontal scanning lines of the B field are indicated by dashed lines. Incidentally, FIG. 7(B) shows the relationship between the horizontal scanning lines of the ASB field when the A field is the first field.

Now, on the other hand, the data selector S5 remains switched to the contacting side when the A field belongs to the second field. In Fig. 6, switches S5, S6, S7
The state where the switch is switched to the contact a side is indicated by "1", and the state where it is switched to the contact side is indicated by "φ".

In this state, during period T1, data selector 5ISS3
is switched to the contact a side, data selectors S2 and S4 are switched to the contact side, and the data IA is stored in the line memories 204 and 208.
, IB data is written. Data φ that has already been written to the line memories 206 and 210 during this time
Data A, φB and data obtained by arithmetic averaging of these data (φA+φB)/2 are sequentially output from the multiplexer 218 to the D/A converter 220 every 1/4H in time series. This operation will be explained in a little more detail. Period T
For the first 1/4H at 1, multiplexer 218 is left inactive. Next 1/4H in period T1
In this case, the data selectors S6 and S7 are in a non-operating state, that is, in a state where they can be switched to either of the contacts aSb. In this state, the multiplexer 218 is connected to the input terminal A.
Since the data input to the line memory 206 is controlled to be selectively output from the output terminal Y, as a result, the line memory 206
The data φA already written to multiplexer 2
18 output terminal Y to the D/A converter 220,
The luminance signal Y is D/A converted by the D/A converter 220. It is output as U to an encoder (not shown).

Further, in the next 1/4H in period T1, the multiplexer 218 is controlled so that the data inputted to its input terminal 1,000 days is output from the output terminal Y, and the data selectors S6 and S7 are set to "1" and ", respectively. φ'' state, that is, the contact aSb side. As a result, data φA is read from the line memory 206 and data φB is read from the line memory 210.

- are added by an adder 214. The addition output of the adder 214 is multiplied by 3 in the multiplier 216, and the data (φΔ+φB) is
/2 is connected to the D/A converter 22 via the multiplexer 218.
Output to 0.

Also, in the last 1/4H in period TI, the multiplexer 218 transfers the data input to the input terminal C to the output terminal Y.
The data selectors S6 and S7 are in an inactive state. Therefore, data φB written in line memory 210 is output to D/A converter 220 via multiplexer 218.

Next, in period T2, data selectors S1 and S3 are switched to the contact side, and data selectors S2 and S4 are switched to the contact a side. Therefore, data 2A and 2B are written to line memories 206 and 210, respectively, and line memories 204 and 204.
From 08 onwards, the data IA and IB that have already been written in the period T1 are read out, and the line memory 21
2, the data φB written in the line memory 210 two days ago is transferred and is in a written state.

Under this state, in the first 1/4H of the period T2, the multiplexer 218 is controlled so that the data inputted to its input terminal 1,000 days is outputted from the output terminal Y, and the data selectors S6 and S7 are each set to "1". ″、“
1" state, that is, the contact a side. As a result, data φB from the line memory 212 and data IA from the line memory 204 are output to the adder 216, and these data φB and IA are output to the adder 216. The data (φB
+IA)/2 is obtained. This data (φB+LA)
/2 is connected to the D/A converter 22 via the multiplexer 218.
Output to 0.

In the next 1/4H in period T2, the multiplexer 21
8 is controlled so that the data manually input to input terminal A is selectively output from output terminal Y, and data selectors S6 and S7 are in an inactive state. Therefore, data IA written in line memory 204 is output to D/A converter 220 via multiplexer 218.

, in the next 1/4H in the period T2, the multiplexer 218 transfers the data input to the input terminal 1,000 days to the output terminal Y.
At the same time, the data selectors S6 and S7 are respectively switched to the "1" and "0" states, that is, to the contacts a and b sides, respectively. As a result,
Data IA is read from line memory 204 and data IB is read from line memory 208, and these data IA and IB are added by adder 214. Adder 21
The addition output of 4 is doubled by the multiplier 216, and the data (LA
+IB)/2 is output to the D/A converter 220 via the multiplexer 218.

Further, in the last 1/4H of the period T2, the multiplexer 218 is controlled so that the data inputted to the input terminal C is outputted from the output terminal Y, and the data selectors S6 and S7 are in a non-moving state. Therefore, data IB written in line memory 208 is output to D/A converter 220 via multiplexer 218.

Next, in period T3, data selectors $1 and S3 are switched to the contact a side, and data selectors S2 and S4 are switched to the contact side. Therefore, data 3A and 3B are written to line memories 204 and 208, respectively, and line memories 206 and 206
Data 2A and 2B that have already been written in period T2 are read from line memory 21.
2, the data IB written in the line memory 208 2H ago is transferred and is in a written state.

Under this state, as in the case of period T2, data selectors S6, S7, and multiplexer 218 are controlled to the predetermined state shown in FIG. 6(A) every 1/4H, and data ( IB+2A)/
2.2A and (2A+2B)/2.2B are sequentially converted into a luminance signal Y out by the D/A converter 220 and output to the encoder.

In this way, as shown in FIG. 7(A), the display screen 23
0, luminance signals corresponding to 1050 horizontal scanning lines are created sequentially from the top, and non-interlaced image reproduction is performed.

Next, regarding the processing of the luminance signal when the A field belongs to the first field, this is shown in Fig. 7 (
As shown in B), on the display screen 230, the arrangement of the horizontal scanning lines of field A and the horizontal scanning lines of field B is A.
This is basically the same as the case where the field belongs to the second field, except that it is reversed. However, the operating states of data selectors S5, S6, S7 and multiplexer 218 change as shown in FIG. 6(B) in response to the fact that the horizontal scanning line arrangement of each field A and B is reversed. Therefore, the explanation will be omitted.

In addition, in FIGS. 6(A) and (B), the multiplexer 21
8 output data D. φA-i-φB1φB of uL
+IA, IA+IB, etc., which are shown in the form of adding two types of data, are actually arithmetic averaged data (φA
+φB)/2, (φB+IA)/2, (IA2IB)/
2, etc., and is omitted for convenience of description in the drawings.

〔Effect of the invention〕

As explained above, the image reproducing device according to the present invention enables non-interlaced image reproduction with 1050 horizontal scanning lines, prevents flickering caused by frame reproduction, and improves the quality of reproduced images. can be achieved.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the circuit configuration of an embodiment of the image reproducing device according to the present invention, Fig. 2 is an explanatory diagram showing the recording format of the video signal recorded on the magnetic sheet, and Fig. 3 is the magnetic sheet. 4 is a timing chart illustrating the operation of the image reproducing device shown in FIG. 1, and FIG. 5 is a diagram showing an example of the signal spectrum of a video signal recorded in FIG. The block diagrams illustrating the circuit, FIGS. 6 and 7, are explanatory views for explaining the operation of the luminance signal generation circuit shown in FIG. 5, respectively. 2...Magnetic sheet, 8...Control circuit, 18.
... magnetic spatula)', 22.50 ... low-pass filter, 24.52.58.90 ... demodulation circuit, 26
．． 54...0.5H delay line, 28.56...Bypass filter.

Claims (1)

[Claims] One field per track and one field per two tracks.
1 from the recording medium on which the video signal for frames is recorded.
Read two field signals for a frame at the same time,
In an image reproducing device that reproduces an image based on these two field signals, two horizontal scanning line segments that store image information obtained from one field signal of the two field signals read from the two tracks are provided. a first storage means having a storage capacity equal to or more than that, and a storage capacity equal to or more than two horizontal scanning lines for storing image information obtained from the other field signal of the two field signals read from the two tracks; a second storage means having the image information stored in either one of the first and second storage means; a third storage means that stores the image information stored in either the first or second storage means; The image information of each of the two field signals constituting one frame is written at the same speed as the speed at which it is read from the recording medium, and the image information written in the first and second storage means is an odd field or an even field. image information writing means for transferring image information written in either one of the first and second storage means to the third storage means, which is specified depending on which of the first and second storage means it belongs to; Image information obtained by arithmetic averaging of the image information stored in the second storage means, the image information stored in the first or second storage means, and the image information stored in the third storage means image information reading means for reading three types of image information into the first and second storage means in accordance with the arrangement of horizontal scanning lines on the display screen at a speed four times as fast as the speed at which field signals are read from the recording medium; An image reproducing device comprising: