JPS63203346A - Thermal printer head control unit - Google Patents

Abstract

PURPOSE:To obtain the printing control apparatus of a thermal printer imparting excellent printing grade, by a memory circuit storing the past driving data of a heat generating element, the first gate circuit for increasing and decreasing a current supply time on the basis of the self-driving result of an arbitrary heat generating element and the second gate circuit for increasing and decreasing the current supply time on the basis of the driving result of the adjacent heat generating element. CONSTITUTION:An oscillation circuit 60 contains a thermistor 14 and the cycle S0 of an output wave form 69 senses the temp. of a thermal head and has a characteristic becoming small at the time of high temp. and becomes large at the time of low temp. A numeral 70 shows a frequency dividing circuit and a numeral 71 shows a gate circuit. Pulses T0-T3 are respectively outputted from the gate circuit 71. By determining the time to supply current to the thermal head using this pulse generating circuit, the optimum energy is always applied to the thermal head and the applied energy reduced by the past driving history always becomes one correlated with a total current supply time at that time and printing quality can be enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a thermal printer, and particularly to a control circuit for controlling heat generation of a heat generating element thereof.

[Conventional technology]

Conventionally, various methods have been used in thermal printers to prevent deterioration in print quality due to heat accumulation during continuous use of a thermal head. Among them, there is a method of determining the energization time by storing the previous data for each dot, as in the case of Special Publication No. 55-48831;
A method such as No. 507 in which the energization time is changed depending on the driving cycle is used. These methods are generally referred to as medication history control methods.

[Problem that the invention seeks to solve]

In these conventional examples, a system was generally adopted in which the data was sequentially sent to the drive IC of the thermal head while the data was processed by the CPU.

In such a system, even if an attempt is made to operate the thermal printer at high speed, the processing cannot keep up, which has been an obstacle to increasing the speed of the thermal printer.

In addition, in serial type thermal printers, while 24-dot fonts are becoming common, there is also an active movement toward higher resolutions such as 32-dot and 48-dot fonts.

Making a control circuit for a thermal head into a unit or chip requires unnecessary costs unless it can respond flexibly to changing conditions.

SUMMARY OF THE INVENTION An object of the present invention is to provide a print control KN for a serial type thermal printer that eliminates these conventional problems and has high speed and excellent print quality.

A further object of the present invention is to provide a head control unit that can be expanded according to the number of heat generating elements in a serial type thermal head.

[Means for solving problems]

A head control unit for a thermal printer according to the present invention includes a storage circuit that stores past drive data of a heat generating element;
A first gate circuit that increases or decreases the energizing time depending on the drive result of any heat generating element connected to the memory α circuit, and a second gate circuit that increases or decreases the energizing time depending on the drive result of an adjacent heat generating element. and at least as a constituent element,
The TFF information on both ends of the heat generating elements arranged in sequence is outputted to another additional head control unit, and the stored information on both ends from the other head control unit is output to the second gate circuit. This is a head control unit characterized by having an additional terminal for inputting.

〔Example〕

FIG. 1 is a schematic diagram showing the configuration of a printing 1t control device using a head control unit for a thermal printer according to the present invention.

1 is a thermal head having a plurality of heat generating elements 1a, 2 is a head drive circuit that drives this thermal head, and 3 is a head unit that is placed between the CI'U4 and the thermal head 1 and controls the amount of heat generated to the thermal head. , the CPU 4 also controls the entire thermal printer. 18 is a pulse generation circuit that supplies pulses having two or more types of pulse widths to the head control unit 3;
It has a thermistor 14 that detects the temperature of the thermal head 1 or its surrounding temperature.

The CPU 4 is, for example, an 8-bit CPU and includes a data bus 16, an address bus 17, a WR multiplication signal, and the like.

The head unit 3 is composed of a gate array, for example, and is integrated into one chip like the CPU 4. Hereinafter, the head unit will be abbreviated as ICU.

II CU' 3 has a built-in data latch circuit, which is a type of memory circuit, and has a data input terminal 5 connected to a data bus 16, an address terminal 8 that inputs the lower two bits of an address bus 17, and a predetermined address information from the CPU 4. Chip select terminal (CS terminal), which is a type of unit select terminal that knows the designation of the unit according to the
7, CPU 4 f) Data latch timing input terminal connected to W R signal, multiple energization pulse input terminals 9 that determine the energization time to the heat generating elements, drive signal to each heat generating element of the thermal head 1 There is at least a head drive output terminal 10 that outputs.

11 is a decoder that creates a predetermined address code assigned to the HCU 3 from the address information of the CPU 4;

12 is a ROM that stores a control program for the CPU 4, a character generator, etc., 13 is a RAM 115 is a power source.

FIG. 2 is a detailed circuit diagram showing an embodiment of the head control unit (HCU 3), and the same parts as in FIG. 1 are designated by the same numbers.

8-bit data from data input terminals 5 to D7 can be input in parallel.

Numerals 21 to 29 represent data latch circuits that hold 8-bit data, 21 to 23 hold data of H0 to T-1 of the head drive signal, and 24 to 26 hold data of 11.
~Y11. 27 to 29 are Has to T-1,
, respectively, are latched.

As an example, the head drive output is assumed to drive a 24-dot thermal head, and there are 24 output terminals 1-1° to i2. is having a baby.

31 is a latch circuit group that holds one bit string of the current data, 32 holds one bit string of the previous past data, and 33 holds one bit string of the two previous past data. The figure shows a group of latch circuits each having .

30 is an address decoder for distributing and storing head data in units of 8 bits according to the address information of the data output of the CPU, and for example, a data latch circuit according to the bit information of the lower two bits A, , A, of the address data. 21.24.27 can be selected. 34 is a gate circuit that converts the pulse input from the energization pulse input terminal into an energization interval signal. This is pulse generation circuit 1
This is not necessary if the output signal of No. 8 is originally output as the energized section signal.

At the same time that the head drive data is output from the CPU 4 to the data bus, the WR multiplication signal is output, and the CPU 4
C8 by the address data defined on the memory map of C8.
The terminal is accessed, and data is transferred to each of the data latch circuits 21, 24, and 27 based on the information of the lower two bits of the address bus. Then, the already stored data is transferred to the right side of FIG. 2, for example, to the data latch circuit 21.
The data is shifted to the data latch circuit 22 and stored sequentially as past data.

Although it is possible to access up to four data latch circuits using the lower two bits of information, the number of address input terminals and the number of data latch circuits may be increased depending on the number of heating elements.

After the data is set, when a predetermined pulse is input to the energization pulse input terminal 9, the heat generating element is energized.

35.3E3 is a gate circuit G that combines the latched data and the energization period signal to generate a heat generation control signal that controls the amount of heat generated according to the past history. , GI, and have a first gate circuit 37 and a second gate circuit 38, respectively. Since the first gate circuit 37 increases or decreases the energization time depending on its own drive result, the second gate circuit 38
The energizing time is increased or decreased depending on the driving results of adjacent heat generating elements. G is a gate circuit excluding both ends of the sequentially arranged heat generating elements, and GI is a gate circuit at both ends. The second gate circuit 38 in G is composed of an AND circuit 38a, a NOR circuit 38b, and an AND circuit 38c. The AND circuit 38a is used to check whether adjacent pieces of stored information are simultaneously in the disabled state.
In the case where only one CU3 is used, it is essentially unnecessary. However, when the number of heat generating elements is increased to 32 dots or 48 dots, adjacent drive results must be input from other head control units in order to arrange two or more head control units in parallel.

Therefore, in this embodiment, additional terminals 41 and 42 are provided, and depending on the number of heat generating elements in the thermal head, even if a head control unit is added, the same control can be achieved even at the end of the unit. becomes possible. Reference numeral 41 serves as an output terminal to other head control units, and 42 serves as an input terminal for manually inputting the a information written from the other head control units to the second gate circuit 38.

42a is a pull-down resistor for the input terminal 42.

``This is installed to determine the driving result as ``None'' if no expansion has been done.

Regarding the operation of the gate circuit in the latter stage, NoR
The circuit 38b compares the current data with the past driving layer, and when the layer was driven in the past, the AND circuit 38c functions to reduce a predetermined energized section.

FIG. 3 shows the relationship between the human power signal at the energization pulse input terminal 9 and the energization period signal.

T, ~T, is the input waveform of the energizing pulse input terminal 90,
TW and ~TW indicate energization period signals, respectively.

t0 to t indicate the pulse width of the energization period signal, respectively.

FIG. 4 is an explanatory diagram showing a method of energizing a thermal head by the head control unit of the present invention.

54, 55, and 56 indicate the data in the latch circuits 21, 22, and 23, respectively; 54 indicates the current data, 55 indicates the previous data, and 56 indicates the two previous data. 51.52
．． 53 indicates the output waveform of the head drive signal; 51
) for J child, 52 is H, ra child, 53 is Fl,
Rako is shown respectively.

43 indicates data at the start of printing.

At the first time of energization, all energized sections are applied to the heat generating element.

If the dot is energized at the previous timing, the t5 interval shown by the shaded area is subtracted, and if the dot is energized two times before, the t3 interval is decreased as shown by the output waveform 52. is subtracted, and when three dots are energized continuously, the t*+t1 interval is subtracted. Furthermore, when both dots are energized in the vertical direction at the previous timing, as shown in the output waveform 53, 1. The interval is reduced. Further, the energization time is determined by the combination of the above cases. This method is configured such that only four energization interval signals are required for eight past cases (2x2x2=8).

The gate circuits G0 and G in FIG. 2 produce this output signal.

If the current to the heating element of the thermal head is small, such as 50 mA or less, use the gate array II.
It is also possible to form the head drive circuit in the same package when forming the CU 3.

FIG. 5 is a schematic diagram showing one embodiment of a pulse generating circuit.

60 is an oscillation circuit including the above-mentioned thermistor 14, resistors 61, 62, 66, capacitor 63, transistor 64, inverter 8, Zener diode 65,
It is formed by a voltage comparator 67 and connected to the serious injury VC. The period S0 of this output waveform 69 senses the temperature of the thermal head, and has a characteristic of being small when the temperature is high and thick when the temperature is low. 70 indicates a frequency dividing circuit, and 71 indicates a gate circuit. From 71, the gate circuit is T,
~T, each pulse is output. - T as an example
s = So X 6, Tl = 5. x tOIT, =
A time of So x12, To = S@X22 is formed. By determining the energization time to the thermal head using such a pulse generation circuit, f & appropriate applied energy is always given to the thermal head, and the applied energy that decreases due to past drive history is always kept within the total energization time at that time. This makes it possible to improve printing quality.

The frequency dividing circuit 70 and gate circuit 71 in the pulse generation circuit can be integrated into a gate array, and can be further simplified by using a programmable timer.

In this embodiment, the temperature of the thermal head is fed back to the current application time, but it is also possible to incorporate it into the power supply to the head and supply pulse signals from the CPU without using a pulse generation circuit.

FIG. 6 is a schematic diagram of a word processor equipped with a thermal printer using the head control unit of the present invention, and the same parts as in FIG. 1 are designated by the same numbers.

3a is the first HCU, 3b is the second ICU,
Data is mutually exchanged using additional terminals 41 and 42, and v
The heating element element 1b11c at the end of the CC group can also be controlled in the same way as the other heating elements. Both lla and llb are address decoders, but each responds with different address information so that data can be written separately. Reference numeral 19 denotes a keyboard for inputting character information such as kanji characters and graphic information.

In this way, it is possible to easily increase the number of head control units according to the number of heat generating units of the thermal head.

[Efficacy of invention]

According to the present invention, data processing based on past driving history is performed using C.
Since it is not necessary to use the PU, the CPU can perform high-speed processing, and the printing speed of the thermal printer can be increased.

In addition, by forming the head heat generation side circuit unit using a gate array and making it into a single chip, it is extremely easy to allocate it on the CPU's memory map, connect it directly to the data bus and address bus, and simply read data directly from the CPU. The configuration enables complex processing.

Furthermore, it is possible to expand the single-chip IC according to the number of heat generating elements, which has the advantage that development costs and time are not wasted.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram showing the configuration of a print control device using a head control unit for a thermal printer according to the present invention. FIG. 2 is a circuit diagram showing an embodiment of a head control unit according to the present invention. FIG. 3 is an explanatory diagram showing the relationship between the energization pulse input signal and the energization period signal of the -rad control unit according to the present invention. FIG. 4 is an explanatory diagram showing a method of energizing a thermal head by the head control unit of the present invention. FIG. 5 is a schematic diagram of an embodiment of a pulse generation circuit used in the head control unit of the present invention. FIG. 6 is a schematic diagram of a word processor using the head control unit of the present invention. Above Figure 4 Figure 5

Claims (1)

[Claims] 1) Using a thermal head having a plurality of heat generating elements,
A thermal printer that prints on plain paper using thermal paper or a thermal transfer ribbon, which stores at least two past drive histories of the heat generating elements, and calculates the energization time of each of the heat generating elements based on the stored results. A thermal printer that controls a heat generating element includes a memory circuit that stores past drive data of the heat generating element, and a first circuit that increases or decreases the energization time depending on the drive result of any heat generating element connected to the memory circuit. At least a gate circuit and a second gate circuit that increases/decreases the energization time depending on the driving results of adjacent heat generating elements are included as constituent elements, and the storage information of the sequentially arranged both ends of the heat generating elements is A head control unit for a thermal printer, comprising an additional terminal for outputting information to the head control unit and inputting stored information at both ends from the other head control unit to the second gate circuit. 2) A head control unit for a thermal printer according to claim 1, characterized in that a head drive circuit is built into the head control unit.