JPS63198346A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To let a probe needle penetrate a protective film easily by a method wherein uneven parts are produced on the surface of a test pad and on the surface of a protective film by forming a dummy pattern so that a boundary part between these uneven parts can function as a part to be hooked by the probe needle. CONSTITUTION:After a polysilicon layer has been patterned at the underside and in the central part of a test pad 2, a cross-shaped dummy pattern 5 is formed. Because this dummy pattern 5 exists, uneven parts are produced on the surface of the test pad 2 and a protective film 9. By this setup, when a probe needle 10 is to be thrusted onto the test pad 2, the probe needle 10 is hooked at a boundary part between the uneven parts; accordingly, it is simple to cause the state that the probe needle 10 pierces through the protective film 9 and that the test pad 2 comes into contact with the probe needle 10.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a semiconductor integrated circuit, and more particularly to the structure of a semiconductor integrated circuit having a test pad.

2. Description of the Related Art In recent years, semiconductor integrated circuits have become more highly integrated and densely packed, and the configurations of integrated circuits have become more complex. In order to dismantle such semiconductor integrated circuits or to analyze products with defective characteristics, it is important to know what kind of waveform signals are generated inside the circuit.

Among these methods for internal waveform observation, the simplest method is to place a probe needle on the electrode wiring layer. However, as the wiring width becomes narrower, it becomes difficult to place the probe needle in a desired location. Therefore,
A method is used to provide test pads by extending the electrode wiring layer where signals important for internal waveform observation appear.

FIG. 2 is a diagram showing the structure of a conventional test pad, with FIG. 2a being a plan view and FIG. In the figure, 1 is an aluminum wiring layer, 2 is a test aluminum pad (hereinafter referred to as a test band) extended from aluminum wiring layer 1, 3 and 4 are aluminum wiring patterns adjacent to test aluminum pad 2, and 6 is a silicon substrate. ,
7 and 8 are interlayer insulating films, and 9 is a surface retention film. By forming a test pad in which the pattern width of the aluminum wiring layer 1 is widened as in this example, the probe needle 1Q can be easily erected on the aluminum wiring layer.

Problems to be Solved by the Invention Incidentally, when observing internal waveforms, the probe needle 10 is often pierced through the protective film and placed on the test pad. However, when aluminum wiring patterns and other test pads are densely arranged around the test hat as in the conventional example described above, the surface of the protective film on and around the test pads becomes almost flat, and the surface of the protective film on the protective film becomes flat. The probe needle slipped and it was difficult to break through the protective film with the probe needle.

The present invention has been made to solve these problems, and provides a semiconductor integrated circuit that can generate irregularities on the surface of a protective film on a test pad.

A feature of the semiconductor integrated circuit of the present invention is that a dummy pattern is provided below the test pad.

Function: In the semiconductor integrated circuit of the present invention, the presence of the dummy pattern below the test band causes unevenness on the test hat surface and the protective film surface.

Embodiment Next, an embodiment of the semiconductor integrated circuit of the present invention will be described with reference to FIG. 1A is a plan view of the vicinity of the test pad, and FIG. 1A is a sectional view taken along the line B--B in FIG. 1A.

In Figure 1, 1 is an aluminum wiring layer, 2 is a test pad,
3 and 4 are aluminum wiring patterns adjacent to the test pads, 6 is a dummy pattern formed of polysilicon, 6 is a silicon substrate, 7 and 8 are interlayer insulating films, 9 is a protective film, and 1o is a glove needle. In the semiconductor integrated circuit of the present invention, as shown in FIG.
A cross-shaped dummy pattern 6 is formed by patterning the polysilicon layer below and at the center. Due to the presence of this dummy pattern 6, as is clear from FIG. 1, the surfaces of the test pad 2 and the protective film 9 are uneven. Therefore, when placing the probe needle 10 on the test pad 2, the probe needle 1Q hangs on the boundary between the unevenness and breaks through the protective film 9 between the test pad 2 and the probe needle 1o.
A state in which the two are in contact can be easily established.

In this embodiment, polysilicon is used as the dummy pattern, but the pattern is not limited to this. For example, a pattern made of polycide or silicide formed by forming silicide on polysilicon may be used. Further, the shape of the dummy pattern may also be a shape other than a cross. What is important is that by providing the dummy pattern, unevenness is generated on the test pad surface and the protective film surface.

Effects of the Invention In the semiconductor integrated circuit of the present invention described above, the formation of the dummy pattern causes unevenness on the test pad surface and the protective film surface, and the boundaries of these unevenness act as hooks for the probe needles, making it difficult to protect them with the probe needles. Breaking through the membrane becomes easier.

Therefore, it becomes easy to observe the internal waveform caused by contact between the test pad and the probe needle even from above the protective film.

[Brief explanation of the drawing]

1A and 1B are a plan view and a sectional view showing the vicinity of a test pad of a semiconductor integrated circuit according to an embodiment of the present invention, and FIGS. 2A and 2B are plan views showing the vicinity of a test pad of a conventional semiconductor integrated circuit. and a sectional view. 1... Aluminum wiring layer, 2... Aluminum pad for testing, 3, 4... Aluminum wiring pattern adjacent to test hat, 6... From polysilicon 6... Silicon substrate, 8... Interlayer insulating film, 9... Protective film, 10... Probe needle.

Claims (2)

[Claims] (1) A wide test pad is provided at one end or a part of the electrode wiring layer, and a dummy pattern made of a wiring layer different from the electrode wiring layer is formed below the test pad, and covers the test pad. A semiconductor integrated circuit characterized by an insulating film having unevenness formed therein. (2) The semiconductor integrated circuit according to claim 1, wherein the dummy pattern is made of polysilicon, polycide, or silicide.