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JPS6318930Y2 - - Google Patents

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Publication number
JPS6318930Y2
JPS6318930Y2 JP1982042240U JP4224082U JPS6318930Y2 JP S6318930 Y2 JPS6318930 Y2 JP S6318930Y2 JP 1982042240 U JP1982042240 U JP 1982042240U JP 4224082 U JP4224082 U JP 4224082U JP S6318930 Y2 JPS6318930 Y2 JP S6318930Y2
Authority
JP
Japan
Prior art keywords
light emitting
diode
terminals
emitting element
bridge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1982042240U
Other languages
Japanese (ja)
Other versions
JPS58145579U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4224082U priority Critical patent/JPS58145579U/en
Publication of JPS58145579U publication Critical patent/JPS58145579U/en
Application granted granted Critical
Publication of JPS6318930Y2 publication Critical patent/JPS6318930Y2/ja
Granted legal-status Critical Current

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Description

【考案の詳細な説明】[Detailed explanation of the idea]

本考案はブリツジ接続したダイオードの劣化及
び製造上の不良を発見するための試験装置に関す
るものである。ブリツジダイオードの製造上又は
劣化による不良状態としては、素子(ダイオード
チツプ)の順方向降下大、素子と端子間の接続抵
抗大及び断線、素子逆方向モレ電流大、特に各端
子間(交流各端子、直流各端子の相互間、単相全
波形では4端子相互間、三相全波形では5端子相
互間)の短絡、各素子の逆方向接続等がある。通
常これらの各現象に対し、それぞれ別個の試験方
法により試験を行い良否判定が行われる。本考案
は上記良否判定時の補助監視用或は判定済良品の
再チエツク用等に好適な試験装置を提供するもの
であり、一度の試験により上記各不良状態のいず
れかの発生を容易に検知するようにしたものであ
る。以下図面を用いて説明する。第1図は本考案
の一実施例回路図で図において1は基準用ブリツ
ジダイオード、(以下基準素子)2は被測定ブリ
ツジダイオード(以下被測定素子)3及び4は前
記素子1,2の夫々直流出力正端子相互間及び負
端子相互間に接続された発光素子で前記一方の発
光素子3は前記基準用ブリツジダイオードの直流
出力正端子側をアノード(陽極)とし、又カソー
ド(陰極)を前記被測定用ブリツジダイオードの
直流出力正端子側とする向きに接続し、又前記他
方の発光素子4は前記一方の発光素子3と逆極性
に接続されている。3′,4′はホトトランジスタ
等の受光素子、ALは異常警報回路、5,6は同
一インピーダンスを有する試験電流通電抵抗、
7,8は同一インピーダンスを有する不良素子通
電電流抑制抵抗、PWは交流電源である。なお、
S1〜S4及びD1〜D4はダイオードチツプ
a,bは直流出力端子、c,dは交流入力端であ
る。図に於て交流試験電源PWより電圧を印加す
ると被試験素子2が、基準素子1と同一特性を示
す正常品の場合は両素子の正端子(+)間および
負(−)端子間には電圧差を発生せず発光素子
3,4は発光に至らないので異常警報回路ALに
は受光素子3′,4′端子間が開放状態の信号を送
る。被試験素子2にいづれかの異常が存在する場
合は被試験素子2の正負端子間の電圧が低下する
ため、基準素子1との間で正端子相互間又は負端
子相互間に電圧差を生じて発光素子3,4に通電
され発光に至り受光素子3′,4′を通電状態とす
るので異常警報回路ALには受光素子間が通電で
きるインピーダンス低下の信号を送る。因みにダ
イオードD1がオープンの時交流電源PWが図示
の極性の時、PW−ダイオードD3−抵抗5−
発光素子4−ダイオードS1−抵抗8−PWの
経過で電流が流れ、発光素子4が発光する。又ダ
イオードD3がオープン時は電源PW−ダイオ
ードS3−発光ダイオード3−抵抗5−ダイオー
ドD1−抵抗7−PWの経過に電流が流れ、発
光素子3が発光する。更にブリツジダイオード2
の直流出力端子a,bが短絡の時は電源PW−
ダイオードS3−発光素子3−端子a−b−発光
素子4−ダイオードS1−抵抗8−PWの経路
で電流が流れ発光素子3及び4の両方が発光す
る。これらの動作を第一表に示す。
The present invention relates to a test device for detecting deterioration and manufacturing defects in bridge-connected diodes. Defective states of bridge diodes due to manufacturing or deterioration include large forward drop of the element (diode chip), large connection resistance and disconnection between the element and terminals, large reverse leakage current of the element, especially between each terminal (AC There are short circuits between terminals, DC terminals, between 4 terminals for a single-phase full waveform, and between 5 terminals for a 3-phase full waveform, and reverse connections of each element. Normally, each of these phenomena is tested using a separate test method to determine pass/fail. The present invention provides a testing device suitable for auxiliary monitoring during the above-mentioned pass/fail judgment, or for re-checking already judged non-defective products, and can easily detect the occurrence of any of the above-mentioned defective states with a single test. It was designed to do so. This will be explained below using the drawings. FIG. 1 is a circuit diagram of an embodiment of the present invention. In the figure, 1 is a reference bridge diode, (hereinafter referred to as a reference element) 2 is a bridge diode to be measured (hereinafter referred to as an element to be measured), and 3 and 4 are the elements 1, 2. One of the light emitting elements 3 is connected between the positive DC output terminals and between the negative terminals of the reference bridge diode. ) is connected to the DC output positive terminal side of the bridge diode to be measured, and the other light emitting element 4 is connected in opposite polarity to the one light emitting element 3. 3' and 4' are light receiving elements such as phototransistors, AL is an abnormality alarm circuit, 5 and 6 are test current carrying resistors with the same impedance,
7 and 8 are defective element conduction current suppressing resistors having the same impedance, and PW is an AC power supply. In addition,
Diode chips S1 to S4 and D1 to D4 are diode chips a and b are DC output terminals, and c and d are AC input terminals. In the figure, when voltage is applied from the AC test power supply PW, if the device under test 2 is a normal product that exhibits the same characteristics as the reference device 1, the voltage between the positive (+) and negative (-) terminals of both devices will be Since no voltage difference is generated and the light emitting elements 3 and 4 do not emit light, a signal indicating that the terminals of the light receiving elements 3' and 4' are in an open state is sent to the abnormality alarm circuit AL. If any abnormality exists in the device under test 2, the voltage between the positive and negative terminals of the device under test 2 will drop, resulting in a voltage difference between the positive terminals or between the negative terminals with respect to the reference device 1. Since the light emitting elements 3 and 4 are energized and emit light, and the light receiving elements 3' and 4' are energized, a signal is sent to the abnormality alarm circuit AL to reduce the impedance that allows current to flow between the light receiving elements. Incidentally, when diode D1 is open and AC power supply PW has the polarity shown, PW - diode D3 - resistor 5 -
A current flows through the path of light emitting element 4 - diode S1 - resistor 8 - PW, and light emitting element 4 emits light. When diode D3 is open, current flows through power supply PW, diode S3, light emitting diode 3, resistor 5, diode D1, resistor 7, and PW, causing light emitting element 3 to emit light. Furthermore bridge diode 2
When the DC output terminals a and b are short-circuited, the power supply PW-
Current flows through the path of diode S3 - light emitting element 3 - terminals a-b - light emitting element 4 - diode S1 - resistor 8 - PW, and both light emitting elements 3 and 4 emit light. These operations are shown in Table 1.

【表】 (※ ○印発光状態)
なお、異常警報回路ALは必要により増幅及び
信号保持回路を有し、最終的にはブザー、チヤイ
ム、表示灯、場合により(自動試験装置、選別装
置の場合など)では、対応する電子回路又はリレ
ー接点回路により所定の異常検出動作を行わせる
ことができる。即ち本考案は基準素子と被測定素
子の双方の交流端子に同一電圧を印加し、直流出
力端子間に発生する整流電圧波形を比較せしめ、
その差電圧が発光素子の順方向電圧以上の時一方
もしくは両方の該発光素子が導通し、その発光し
た状態を利用して異常を検出するようにしたもの
である。即ち本考案では被測定用ブリツジダイオ
ードの個々のダイオードが異常の場合、交流電源
PWの一方の半波出力を利用して一方の発光素子
を発光せしめ、又交流入力端子或は直流出力端子
間の短絡等の場合には該電源PWの全波出力によ
り両方の発光素子を発光せしめることができ、こ
れによりその発光状態により異常が区別できる等
の利点がある。なお、発光素子にホトサイリスタ
等を用いることもできる。以上本考案を単相全波
ダイオードの例について説明したがこの他三相ブ
リツジ等多相ブリツジ素子にも同様に適用できる
ことは明白である。以上の説明から明らかなよう
に本考案によれば1回の測定で各種特性不良の有
無が検出できるので良品の再チエツク用或はカー
ブトレーサ等の個別特性試験装置に併設し各測定
素子のカーブトレーサ図形で検出できない交流端
子間の短絡現象をチエツクしたり或は個別選別中
の不注意による不良見落しチエツク用として好適
である等実用上の効果は大きい。
[Table] (* Lighting status marked with ○)
In addition, the abnormality alarm circuit AL has an amplification and signal holding circuit if necessary, and ultimately a buzzer, chime, indicator light, and in some cases (such as in the case of automatic testing equipment or sorting equipment), a corresponding electronic circuit or relay. A predetermined abnormality detection operation can be performed by the contact circuit. That is, the present invention applies the same voltage to the AC terminals of both the reference element and the measured element, and compares the rectified voltage waveforms generated between the DC output terminals.
When the voltage difference is greater than the forward voltage of the light emitting elements, one or both of the light emitting elements become conductive, and the state in which they emit light is used to detect an abnormality. In other words, in this invention, if an individual diode of the bridge diode to be measured is abnormal, the AC power supply
One half-wave output of the power supply PW is used to make one light-emitting element emit light, and in the case of a short circuit between the AC input terminal or DC output terminal, both light-emitting elements are made to emit light by the full-wave output of the power supply PW. This has the advantage that abnormalities can be distinguished by the state of the light emitted. Note that a photothyristor or the like can also be used as the light emitting element. Although the present invention has been described above using an example of a single-phase full-wave diode, it is obvious that it can be similarly applied to other multi-phase bridge elements such as a three-phase bridge. As is clear from the above explanation, according to the present invention, the presence or absence of various characteristic defects can be detected with a single measurement, so it can be used for re-checking non-defective products or attached to an individual characteristic testing device such as a curve tracer to measure the curve of each measuring element. It has great practical effects, such as being suitable for checking for short-circuit phenomena between AC terminals that cannot be detected by tracer patterns, or for checking for defects that may have been overlooked due to carelessness during individual sorting.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例回路図である。図に
おいて、 1……基準用ブリツジダイオード、2……被測
定用ブリツジダイオード、3,4……発光素子、
3′,4′……受光素子、5,6……試験電流通電
抵抗、7,8……電流抑制抵抗、AL……警報回
路、PW……交流電源。
FIG. 1 is a circuit diagram of one embodiment of the present invention. In the figure, 1... reference bridge diode, 2... bridge diode to be measured, 3, 4... light emitting element,
3', 4'... Light receiving element, 5, 6... Test current carrying resistance, 7, 8... Current suppressing resistor, AL... Alarm circuit, PW... AC power supply.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 基準用ブリツジダイオードと被測定用ブリツジ
ダイオードの直流出力正端子相互間及び負端子相
互間にそれぞれ発光素子を接続すると共に前記一
方の発光素子は前記基準用ブリツジダイオードの
直流出力正端子側をアノード(陽極)とし、又カ
ソード(陰極)を前記被測定用ブリツジダイオー
ドの直流出力正端子側とする向きに接続し、又前
記他方の発光素子は前記一方の発光素子と逆極性
に接続して閉回路を形成し、且つ前記夫々ブリツ
ジダイオードの交流端子を同一電源に接続し前記
一方もしくは両方の発光素子の発光状態を利用し
て異常検出を行うようにしたことを特徴とするブ
リツジダイオードの試験装置。
A light emitting element is connected between the DC output positive terminals and between the negative terminals of the reference bridge diode and the measured bridge diode, respectively, and the one light emitting element is connected to the DC output positive terminal side of the reference bridge diode. is an anode (anode), the cathode (cathode) is connected to the direct current output positive terminal side of the bridge diode to be measured, and the other light emitting element is connected in opposite polarity to the one light emitting element. A closed circuit is formed by connecting the AC terminals of each of the bridge diodes to the same power source, and abnormality detection is performed using the light emitting state of one or both of the light emitting elements. Tsuji diode test equipment.
JP4224082U 1982-03-25 1982-03-25 Bridge diode test equipment Granted JPS58145579U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4224082U JPS58145579U (en) 1982-03-25 1982-03-25 Bridge diode test equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4224082U JPS58145579U (en) 1982-03-25 1982-03-25 Bridge diode test equipment

Publications (2)

Publication Number Publication Date
JPS58145579U JPS58145579U (en) 1983-09-30
JPS6318930Y2 true JPS6318930Y2 (en) 1988-05-27

Family

ID=30053378

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4224082U Granted JPS58145579U (en) 1982-03-25 1982-03-25 Bridge diode test equipment

Country Status (1)

Country Link
JP (1) JPS58145579U (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS478055U (en) * 1971-02-24 1972-09-29

Also Published As

Publication number Publication date
JPS58145579U (en) 1983-09-30

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