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JPS63182571U - - Google Patents

Info

Publication number
JPS63182571U
JPS63182571U JP7489387U JP7489387U JPS63182571U JP S63182571 U JPS63182571 U JP S63182571U JP 7489387 U JP7489387 U JP 7489387U JP 7489387 U JP7489387 U JP 7489387U JP S63182571 U JPS63182571 U JP S63182571U
Authority
JP
Japan
Prior art keywords
metal
heat dissipation
circuit board
insulating layer
based circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7489387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7489387U priority Critical patent/JPS63182571U/ja
Publication of JPS63182571U publication Critical patent/JPS63182571U/ja
Priority to US07/406,401 priority patent/US4993148A/en
Priority to US07/540,389 priority patent/US5081562A/en
Priority to US07/794,281 priority patent/US5173844A/en
Pending legal-status Critical Current

Links

Landscapes

  • Insulated Metal Substrates For Printed Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図a〜eはこの考案の一実施例の金属ベー
ス回路基板をその製造工程順に示す断面図、第2
図はこの考案の他の実施例の三層金属ベース回路
基板を示す断面図、第3〜第5図は各々従来の金
属ベース回路基板を示す断面図である。 図において、1は金属ベース板、11は金属露
出部、12は絶縁層、13は放熱用スタツド、1
6は導体パターン、17はボンデイングパツド、
18はダイパツド、配線パターンは導体パターン
16ボンデイングパツド17ダイボンデイングパ
ツド18で構成される。20は電子部品、この場
合は半導体素子である。なお、図中、同一符号は
同一又は相当部分を示す。
1A to 1E are cross-sectional views showing a metal base circuit board according to an embodiment of this invention in the order of its manufacturing process;
The figure is a cross-sectional view showing a three-layer metal base circuit board according to another embodiment of the present invention, and FIGS. 3 to 5 are cross-sectional views showing conventional metal base circuit boards. In the figure, 1 is a metal base plate, 11 is an exposed metal part, 12 is an insulating layer, 13 is a heat dissipation stud, 1
6 is a conductor pattern, 17 is a bonding pad,
18 is a die pad, and the wiring pattern is composed of a conductor pattern 16 bonding pad 17 die bonding pad 18. 20 is an electronic component, in this case a semiconductor element. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【実用新案登録請求の範囲】 (1) 金属ベース、この金属ベース板に金属露出
部を残して所定パターンに形成された絶縁層、上
記金属露出部表面と絶縁層表面の段差を埋めるよ
りに上記金属露出部に形成された金属性放熱用ス
タツド、上記絶縁層に形成された配線パターン、
及び上記放熱用スタツドに塔載固着され、上記配
線パターンに電気的に接続された発熱する電子部
品を備えた金属ベース回路基板。 (2) 放熱用スタツドは絶縁層と面一に形成され
ている実用新案登録請求の範囲第1項記載の金属
ベース回路基板。 (3) 放熱用スタツドを介して電子部品を接着し
ている実用新案登録請求の範囲第1項又は第2項
記載の金属ベース回路基板。 (4) 放熱用スタツドに絶縁性接着剤を介して電
子部品を接着している実用新案登録請求の範囲第
1項ないし第3項のいずれかに記載の金属ベース
回路基板。
[Claims for Utility Model Registration] (1) A metal base, an insulating layer formed in a predetermined pattern by leaving an exposed metal portion on this metal base plate, and the above-mentioned method by filling the step between the surface of the exposed metal portion and the surface of the insulating layer. a metal heat dissipation stud formed on the exposed metal portion; a wiring pattern formed on the insulating layer;
and a metal-based circuit board comprising a heat-generating electronic component mounted and fixed on the heat dissipation stud and electrically connected to the wiring pattern. (2) The metal-based circuit board according to claim 1, wherein the heat dissipation stud is formed flush with the insulating layer. (3) The metal-based circuit board according to claim 1 or 2 of the utility model registration claim, in which electronic components are bonded via heat dissipation studs. (4) The metal-based circuit board according to any one of claims 1 to 3, which has an electronic component bonded to a heat dissipation stud via an insulating adhesive.
JP7489387U 1987-05-19 1987-05-19 Pending JPS63182571U (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP7489387U JPS63182571U (en) 1987-05-19 1987-05-19
US07/406,401 US4993148A (en) 1987-05-19 1989-09-12 Method of manufacturing a circuit board
US07/540,389 US5081562A (en) 1987-05-19 1990-06-19 Circuit board with high heat dissipations characteristic
US07/794,281 US5173844A (en) 1987-05-19 1991-11-19 Integrated circuit device having a metal substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7489387U JPS63182571U (en) 1987-05-19 1987-05-19

Publications (1)

Publication Number Publication Date
JPS63182571U true JPS63182571U (en) 1988-11-24

Family

ID=30920535

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7489387U Pending JPS63182571U (en) 1987-05-19 1987-05-19

Country Status (1)

Country Link
JP (1) JPS63182571U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012069816A (en) * 2010-09-24 2012-04-05 Ain:Kk Wiring board using aluminum composite material

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929456A (en) * 1972-07-18 1974-03-15
JPS4980569A (en) * 1972-12-12 1974-08-03
JPS5724597A (en) * 1980-07-22 1982-02-09 Tokyo Shibaura Electric Co Circuit board

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929456A (en) * 1972-07-18 1974-03-15
JPS4980569A (en) * 1972-12-12 1974-08-03
JPS5724597A (en) * 1980-07-22 1982-02-09 Tokyo Shibaura Electric Co Circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012069816A (en) * 2010-09-24 2012-04-05 Ain:Kk Wiring board using aluminum composite material

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