JPS63155954A - Picture signal processor - Google Patents

Abstract

PURPOSE:To attain high speed processing by calculating two kinds of tentative binarization errors in advance in obtaining the binarization error and selecting a binarization error from the two kinds of the tentative binarization errors when the binarization level is confirmed so as to adopt one stage of circuit constitution for the arithmetic circuit. CONSTITUTION:In applying error operation respectively at two states of binarization level to obtain a binarization error and the level is selected in advance in deciding the binarization level. Then the arranged quantity of the binarization error is not concentrated on the picture element in a prescribed relative position of relation with respect to the noticed picture element by using an arrangement coefficient generating means 12 selecting one among plural arranging coefficient sets according to the generation of a random number set initially at an optional value or a value of a preceding line +(n) at each optional subscanning line in arranging the ratio of the binarization error of the noticed picture element with respect to the circumferential picture elements. Thus, the production of a texture pattern is suppressed in the processed output picture, high speed picture element processing is attained and the periodicity is given to a random number generator 39, then no texture is caused in the output picture even if the number of picture elements in the direction X is N times the periodicity.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image signal processing device having a function of binary-reproducing image information including gradation images.

2. Description of the Related Art In recent years, with the mechanization of office processing and the rapid spread of image communications, there has been an increasing demand for high-quality reproduction of gradation images and printed images in addition to conventional black-and-white binary originals.

In particular, many proposals have been made for pseudo gradation reproduction of gradation images using binary images, which is highly compatible with display devices and recording devices.

The dither method is the most well-known method for reproducing these pseudo gradations. This method attempts to reproduce gradations in a predetermined area by the number of dots reproduced within that area, and the input image information is compared for each pixel with the threshold value prepared in the dither matrix. Binarization processing is performed from In this method, the gradation characteristics and resolution are directly dependent on the size of the dither matrix, and are incompatible with each other. Furthermore, the occurrence of moiré patterns in reproduced images used for printed images and the like is unavoidable.

As a method that achieves both the above gradation characteristics and high resolution, and has a large effect of suppressing the occurrence of moiré patterns, error expansion radius 70-
D and L difference diffusion method (Reference: “R11・F,L”O-Y,D,'
,&i, ,L.

is proposed.

FIG. 3 is a block diagram of essential parts of an apparatus for realizing the above error diffusion method.

When the coordinates of the pixel of interest in the original image are (X, y), 1 is the error storage means, 2 is the unprocessed pixel area around the pixel of interest indicated by the error distribution coefficient matrix, and 3 is the coordinate (X, y).
), 4 is the coordinate (x,
y), the input terminal of the input level Ixy, 5 is I'x
y (== Ixy-)-8xy) input correction means, 6
is the output terminal of the output level O or the ordinary binary signal Pxy,
7 is a signal terminal that applies a constant threshold value R/2, and 8 is a signal terminal that compares the input signal I' x y =
Binarization means that outputs O, 9 is Exy (= I'x
This is a difference calculation means for calculating the binarization error for the pixel of interest of y - P xy ).

Now, the integration error Sxy for the pixel of interest is the (1)th, (
2) It is expressed by the formula.

5xy==ΣKij−Ex−jll y−i+1 −
(1) (However, 's J indicates the coordinate in the error allocation coefficient matrix) This error allocation coefficient K i j is used to weight the allocation of the error Exy to the peripheral pixels of the pixel of interest, and in the above literature (however, , the umbrella indicates the position of the pixel of interest).

In the configuration shown in FIG. 3, the above calculation adds the binarization error Exy to the pixel of interest to each pixel A in the unprocessed surrounding pixel area 2.
-D is multiplied by the distribution coefficient corresponding to D, added to the value in the error storage means 1, and stored in the corresponding position again.The above error diffusion method is different from the dither method. It has excellent performance in terms of gradation characteristics and resolution,
Even when a printed image is reproduced, moiré patterns rarely appear. However, this method is not widely used because it produces a pattern (texture) unique to the method in images with small density changes or images with uniform density generated by a computer. The main reason for the occurrence of this texture is that the ratio of binarization error distribution to surrounding pixels of the pixel of interest is always maintained in a constant relative positional relationship with the pixel of interest.

Furthermore, in the configuration of the error diffusion method described above, it is difficult to obtain a high-speed image processing device because one pixel processing involves multi-stage calculations.

The present invention provides an image signal processing device that suppresses the occurrence of texture in the error diffusion method, has excellent gradation characteristics and resolution, has very few moiré patterns when reproducing printed images, and is capable of high-speed processing. It is something.

Means for Solving the Problems The present invention stores the binarization error of a pixel of interest in correspondence with its surrounding pixel positions when binarizing multi-gradation density levels sampled in pixel units. error storage means; input correction means for adding the input signal of the pixel of interest and the integrated error corresponding to the position of the pixel of interest in the error storage means, temporarily storing the result in a register and outputting a correction level; and binarizing the correction level. a difference calculating means for calculating the difference in parallel in advance in two states of the level, temporarily storing it in each register, and outputting the difference A and the difference level Bi;
and difference level B and 2 temporarily stored during previous pixel processing.
Add the valuation error to each to find the error input and error B,
Error A is compared with a predetermined threshold value to determine the binarization level of the pixel of interest, and based on this binarization level, error A or error B is selected and a new binarization error is obtained and temporarily stored in a register. A binarization means that generates a binarization error during the next pixel processing, and a distribution coefficient that distributes the binarization error to unprocessed pixels around the pixel of interest are set in plural sets at a predetermined change period. distribution coefficient generation means for generating random numbers arbitrarily initialized for each arbitrary sub-scanning line from among the distribution coefficient set; and from the difference from the difference calculation means and the plurality of distribution coefficients from the distribution coefficient generation means. Error allocation, in which an error allocation value corresponding to unprocessed pixels around the pixel of interest is calculated, and the error allocation value is added to the integrated error of the corresponding pixel position in the error storage means, and is stored again as a new integrated error. The present invention aims to achieve the above object by configuring an image signal processing device comprising updating means.

According to the above configuration, the present invention performs error calculations for each of the two states of the atomic and binary levels to obtain the binary error, and
In addition to selecting the digitization level according to the determination of the digitization level, the distribution ratio of the binarization error to the surrounding pixels of the pixel of interest is set to an arbitrary value for each arbitrary sub-scanning line from among multiple sets of distribution coefficients or a value obtained by adding 0 to the previous line. By the function of the distribution coefficient generation means that selects one set according to the initial set random number generation, 2
This system prevents the distribution of value errors from being biased toward pixels that have a certain relative positional relationship with the pixel of interest, suppresses the occurrence of texture patterns in the processed output image, and enables high-speed pixel processing. It is.

Further, the random number generator has periodicity, and even if the number of pixels in the X direction is N times the periodicity, texture is not generated in the output image.

Embodiment FIG. 1 is a block diagram of main parts of an image signal processing apparatus in an embodiment of the present invention.

In Figure 1, the coordinates of the pixel of interest in the original image are (x
, y), 1 is the error storage means, 2 is the unprocessed pixel area around the pixel of interest indicated by the error distribution coefficient matrix,
3 is the reading position of the integrated error at the coordinates (X+2, y). 15 is input correction means, 18 is difference calculation means,
23 is a binarization means, 11 is an error distribution/updating means, and 12 is a distribution coefficient generation means, and these structures will be explained in more detail below.

When the coordinates of the pixel of interest are (X, y), the input correction means 15 adds the input level I X+2,y from the input terminal 4 and the integrated error S It is temporarily stored in the register 17 using the synchronized synchronization signal 14.

The difference calculating means 18 calculates I'X+1. output from the input correcting means 15. The differences between Y and the output level O and the normal binarization level are respectively taken and temporarily stored in registers 21 and 22, and a difference level A and a difference level B are output.

The binarization means 23 adds the difference level A and the difference level B to the error allocation value 47 from the error allocation/updating means 11, respectively, to obtain an error A and an error B. The error A is compared with a predetermined threshold value to obtain the binarized Nopel Pxy, and the selector 27 selects error input or error B depending on the binarization level, and registers 2 as a new binarization error.
8 and outputs the binarization error Exy.

The distribution coefficient generating means 12 prepares in advance a plurality of distribution coefficient sets for unprocessed pixels around the pixel of interest, obtains a synchronization signal 14 synchronized with the pixel processing cycle in the X direction from the synchronization signal input terminal 13, and generates the peripheral pixel area. The error distribution/updating means 1
Output to 1. The error distribution/updating means 11 uses the synchronization signal 14
, the binarization error E for the pixel of interest from the difference calculation means 9 along with the distribution coefficient K A −K D
xy and in the storage devices corresponding to pixel positions A, C, and D in the peripheral pixel area 2 of the error storage means 1.

Accumulation errors S'O, S' in the previous pixel processing process
D is read out and a new integration error 5A-8B is determined using equation (3).

Furthermore, the error distribution/updating means 11 generates a new accumulated error S B
- An update process is performed in which SD is written into the storage device corresponding to the pixel position A to D in the error storage means l.

These error distribution/update means 11 and distribution coefficient generation means 12
A more specific circuit is shown in FIG. In the figure, a case will be described in which there are two distribution coefficient sets.

The distribution coefficient generating means 12 generates a plurality of distribution coefficient sets KxA.
- A storage device 40 and a storage device 41 are provided to store KID, K 2 A and K 2 D in advance, and the coefficient set is stored prior to the start of pixel processing.

The initial value table 37 stores initial values for determining the starting point of random number generation for each sub-scanning line prior to the start of pixel processing,
An initial value 38 is output by a line synchronization signal 36 which is a synchronization signal in the Y direction applied from a line synchronization signal input terminal 35. The initial value table can also be configured with a storage device such as RAM or ROM that stores an initial value incremented by 0 for each sub-scanning line, but when setting the initial value of the previous line + n for each arbitrary sub-scanning line, It can also be easily configured with a counting counter or the like.

Further, the random signal generator 39 uses the initial value 38 outputted from the initial value table 37 to set the starting point of random number generation by the line synchronization signal 36', and to match the pixel processing period in the X direction given from the synchronization signal input terminal 13. A select signal 42 is output by inputting a corresponding synchronization signal 14.

The random signal generator 39 generates a select signal 42 using a maximum/guess number counter circuit or the like, and selects two distribution coefficient sets.

The error allocation/updating means 11 receives the allocation coefficient K A input from the allocation coefficient generation means 12 in synchronization with the synchronization signal 14 .
-K D is multiplied by the binarization error Exy input from the binarization means 23 to obtain error distribution values 47 to 5o. The error distribution value 47 is used by the binarization means 2 to obtain a new binarization error.
Output to 3. Since the accumulated error for pixel position B occurs in the processing of the pixel of interest 3, the error distribution value 48 is temporarily stored in the internal register 51 (RB) as the accumulated error (SB) corresponding to pixel position B. Error allocation value 49 and internal register 51 temporarily stored in previous pixel processing
(B) is added and the integration error (SC) of pixel position C is added.
) is temporarily stored as data in the internal register 52 (C). It is added to the data of the internal register 52 (PLO) which is temporarily stored in the error allocation correction 50 and the processing of the previous pixel, and is stored in the storage device corresponding to the pixel position of the error storage means 1.

With such an error allocation/updating means 11, access to the storage device in the error storage means 1 is possible at the pixel position (X+2,
It is an easily realized configuration that requires only a read access corresponding to y) and a write access corresponding to the pixel position.

Effects of the Invention As described above, in the present invention, two types of temporary binarization errors are calculated in addition to calculating the binarization error, and when the binarization level is determined, two types of temporary binarization errors are calculated. By selecting from the following, a multi-stage arithmetic circuit configuration becomes a single-stage arithmetic circuit configuration, and high-speed processing becomes possible.

The distribution ratio of the binarization error to the surrounding pixels of the pixel of interest is not fixed, and instead of being selected from among multiple sets of distribution coefficients during pixel processing, false images ( Additionally, by setting the starting point of random number generation for each arbitrary sub-scanning line, false images (texture) can be significantly suppressed without being affected by the number of pixels in the X direction. It became possible to suppress the

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a main part of an image signal processing device according to an embodiment of the present invention, and FIG. 2 is a main part of FIG. 1.
Detailed circuit diagram of error distribution/update means and distribution coefficient generation means,
FIG. 3 is a block diagram of a main part realizing the conventional error diffusion method. DESCRIPTION OF SYMBOLS 1... Error storage means, 11... Error allocation/updating means, 40-41... Storage device, 39... Random signal generator, 43-46... Selector, 51-52...
Internal register, 37...Initial value table. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd
figure

Claims (1)

[Claims] (1) Error storage means for storing the binarization error of the pixel of interest in correspondence with the surrounding pixel positions when binarizing multi-gradation density levels sampled in pixel units, and input of the pixel of interest. input correction means for adding the level and the accumulated error corresponding to the pixel position of interest in the error storage means, temporarily storing it in a register and outputting a correction level; Difference calculating means for calculating the difference between the two and temporarily storing the difference in the respective registers and outputting the difference level A and the difference level B, and the difference level A, the difference level B, and the binarization error temporarily stored during the pixel processing. are added to each to obtain error A and error B, and error A is compared with a predetermined threshold to determine the binarization level of the pixel of interest. Error A or error B is selected based on this binarization level. A binarization means that obtains a new binarization error, temporarily stores it in a register, and uses it as a binarization error for the next pixel processing, and distributes the binarization error to unprocessed pixels around the pixel of interest. Distribution coefficient generation means for generating a distribution coefficient according to an arbitrarily initialized random number generation for each arbitrary sub-scanning line from among a plurality of distribution coefficient sets at a predetermined change period; Error allocation, which calculates an error allocation value corresponding to unprocessed pixels around the pixel of interest from a plurality of allocation coefficients, adds the error allocation value to the accumulated error of the corresponding pixel position in the error storage means, and stores the result again. An image signal processing device comprising: updating means.