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JPS63147382A - Resonance tunnel type negative resistance element - Google Patents

Resonance tunnel type negative resistance element

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Publication number
JPS63147382A
JPS63147382A JP61293373A JP29337386A JPS63147382A JP S63147382 A JPS63147382 A JP S63147382A JP 61293373 A JP61293373 A JP 61293373A JP 29337386 A JP29337386 A JP 29337386A JP S63147382 A JPS63147382 A JP S63147382A
Authority
JP
Japan
Prior art keywords
layer
quantum well
negative resistance
type
resistance element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61293373A
Other languages
Japanese (ja)
Inventor
Kiichi Nakajima
紀伊知 中島
Hajime Asahi
一 朝日
Yuichi Kawamura
河村 裕一
Koichi Wakita
紘一 脇田
Katsuhiko Kurumada
克彦 車田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP61293373A priority Critical patent/JPS63147382A/en
Publication of JPS63147382A publication Critical patent/JPS63147382A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a negative resistance element capable of an adequate voltage margin by a method wherein a quantum well is of a multiple quantum well structure. CONSTITUTION:On a semiconductor substrate 11 of the first conductivity type, a first semiconductor layer 12 of the first conductivity type, quantum well 13 consisting of a second semiconductor layer to serve as a barrier layer and laminate of third semiconductor layers, and fourth semiconductor layer 14 of the second conductivity type are built into a mesa, in that order. The quantum well 13 in a resonance tunnel type negative resistance element thus constructed is of a multiple quantum well structure. For example, on an n-type InP substrate 11, provided with an ohmic electrode 17 on its rear side, and a quantum well 13, which is a laminate of an undoped InAlAs and InGaAs respectively serving as a barrier layer and well layer, are formed, with an n-type InAlAs layer 12 between. On the quantum well 13 of a multiple quantum well structure, further, a p-type InGaAs layer 15 for ohmic contact and contact electrode 10 are built, through the intermediary of a p-type InAlAs layer 14. All the layers are subjected to a mesa-etching process.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、大きな負性抵抗電圧領域を持つ共鳴トンネル
製負性抵抗素子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a resonant tunnel negative resistance element having a large negative resistance voltage range.

[従来の技術] 量子井戸構造を用いた共鳴トンネル型負性抵抗素子とし
て、従来、第4図に示すような構造のものが使用されて
いる。図中1は、裏面側にオーミック電極6を形成した
n型のGaAs基板である。
[Prior Art] Conventionally, as a resonant tunnel type negative resistance element using a quantum well structure, one having a structure as shown in FIG. 4 has been used. In the figure, 1 is an n-type GaAs substrate with an ohmic electrode 6 formed on the back side.

G&Al基板1の主面上には、n型GaAs層2、バリ
アとなるアンドープGaAtA3層3及び井戸層となる
アンド−7’ GaAs層の積層構造からなる単一量子
井戸構造、及びn型GaAs層5がエピタキシャル成長
にて形成されている。n型GaAs層5上には、オーミ
ック電極7が形成されている。オーミック電極7の形成
後、単一量子井戸構造の部分及びn型GaAs層5の部
分には、円形メサエッチ処理が題されている。かかる立
体的構造を含めて見れば、負性抵抗素子は、レーデ光変
調器等、量子井戸構造を用いた他のデバイスに比べ光入
出力に伴う導波の必要がないため、メサ形状として印加
電界の均一性に優れた円形を採用しているという相違が
ある。このような負性抵抗素子は、従来は第4図のよう
に量子井戸が単一のもののみ検討されていた問題がある
。以下、この問題点について説明する。
On the main surface of the G&Al substrate 1, there is a single quantum well structure consisting of a laminated structure of an n-type GaAs layer 2, an undoped GaAtA layer 3 serving as a barrier, and an and-7' GaAs layer serving as a well layer, and an n-type GaAs layer. 5 is formed by epitaxial growth. An ohmic electrode 7 is formed on the n-type GaAs layer 5. After the formation of the ohmic electrode 7, the single quantum well structure portion and the n-type GaAs layer 5 portion are subjected to a circular mesa etch process. Considering this three-dimensional structure, negative resistance elements do not require waveguiding for optical input and output compared to other devices using quantum well structures such as Rade optical modulators, so they can be applied in the form of mesa shapes. The difference is that it uses a circular shape with excellent uniformity of the electric field. Such a negative resistance element has a problem in that conventionally, only those with a single quantum well as shown in FIG. 4 have been considered. This problem will be explained below.

[発明が解決しようとする問題点] 第4図のように構成された従来の共鳴トンネル型負性抵
抗素子の伝導体のバンド構造は、第5図に示す通シであ
る。同図(4)は、バイアス電圧OVの時のバンド構造
を示し、同図(B)は、バイアス電圧を加えた時のバン
ド構造を示している。また、この素子の電流−電圧特性
は、第6図に示す通シである。単一量子井戸中の準位が
井戸の外側のn型GaAs層の伝導帯の底に共鳴する電
圧付近で第5図(B) を流が極大となり、さらに電圧
を加えると負性抵抗が現れ、その後ホットキャリアの寄
与が増大し再び電流は増加する。この特性において実用
上問題となる点は第6図の特性における2つの技量の電
圧差Vが通常10 QmV以下と非常に小さいことでお
る。これは、量子井戸が単一であるため、負性抵抗は1
つしか得られず、かつ電圧差−は単一量子井戸にかかる
電圧によってほぼ決まる。このため、電圧差vfOnが
小さいことは第4図の構造に本質的に起因する欠点と考
えられる。この電圧差voが小さいことは、この負性抵
抗素子を用いて論理素子を形成する場合に、論理におけ
るHIG)I −LOW間の電圧マージンを小さくし、
集積化した場合の素子の特性のバラツキがマージン金越
えることが予想され、回路設計を著しく困難なものにし
ている。
[Problems to be Solved by the Invention] The band structure of the conductor of the conventional resonant tunneling negative resistance element configured as shown in FIG. 4 is the same as shown in FIG. (4) in the same figure shows the band structure when the bias voltage OV is applied, and (B) in the same figure shows the band structure when the bias voltage is applied. Further, the current-voltage characteristics of this element are as shown in FIG. The current in Figure 5 (B) reaches a maximum near the voltage at which the level in the single quantum well resonates with the bottom of the conduction band of the n-type GaAs layer outside the well, and when the voltage is further applied, negative resistance appears. , then the contribution of hot carriers increases and the current increases again. A practical problem with this characteristic is that the voltage difference V between the two techniques in the characteristic shown in FIG. 6 is usually very small, 10 QmV or less. This is because the quantum well is single, so the negative resistance is 1
Only one quantum well can be obtained, and the voltage difference is approximately determined by the voltage applied to the single quantum well. Therefore, the small voltage difference vfOn is considered to be a drawback essentially resulting from the structure of FIG. 4. The fact that this voltage difference vo is small means that when forming a logic element using this negative resistance element, the voltage margin between HIG)I and LOW in logic becomes small,
It is expected that the variation in characteristics of elements when integrated will exceed the margin, making circuit design extremely difficult.

本発明は、かかる点に鑑みてなされたものでろシ、電圧
マージンが十分にとれる特性を有する共鳴トンネル型負
性抵抗素子を提供するものである。
The present invention has been made in view of these points, and it is an object of the present invention to provide a resonant tunnel type negative resistance element having a characteristic that a sufficient voltage margin can be secured.

[問題点を解決するための手段] 本発明は、第1導電型の半導体基板上に、第1導電をの
第1半導体層、バリア層となる第2半導体層、および井
戸層となる第3半導体層の積層構造にて形成された量子
井戸構造層と、該量子井戸構造層上に第2導電型の第4
半導体層をメサ状に有する共鳴トンネル型負性抵抗素子
において、量子井戸部分を多重量子井戸構造にしたこと
を特徴とする共鳴トンネル型負性抵抗素子である。
[Means for Solving the Problems] The present invention provides a first semiconductor layer having a first conductivity, a second semiconductor layer serving as a barrier layer, and a third semiconductor layer serving as a well layer, on a semiconductor substrate of a first conductivity type. A quantum well structure layer formed of a stacked structure of semiconductor layers, and a fourth quantum well structure layer of a second conductivity type on the quantum well structure layer.
This resonant tunneling negative resistance element has a semiconductor layer in a mesa shape, and is characterized in that a quantum well portion has a multi-quantum well structure.

[作用コ 本発明に係る共鳴トンネル型負性抵抗素子によれば、ア
ンドーグの多重量子井戸構造を採用しているので電圧を
加えた際に電流−電圧特性における2つの技量の電圧差
を大きくすることができる。
[Function] According to the resonant tunneling type negative resistance element according to the present invention, the ANDOG multi-quantum well structure is adopted, so that when a voltage is applied, the voltage difference between the two techniques in the current-voltage characteristics is increased. be able to.

このため電圧マージンが十分にとれる素子特性を容易に
得ることができる。
Therefore, element characteristics with sufficient voltage margin can be easily obtained.

[実施例] 以下1本発明の実施例について図面を参照して説明する
。第1図は、本発明の一実施例の概略構成を示す斜視図
である。図中11は、裏面側にオーミック電極17を設
けたn型のInP基板である。
[Example] An example of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view showing a schematic configuration of an embodiment of the present invention. In the figure, 11 is an n-type InP substrate with an ohmic electrode 17 provided on the back side.

オーミック電極17は、ALLG eN iで形成され
ている。
The ohmic electrode 17 is made of ALLG eN i.

InP基板11上には、n型のInAIA爵層12全層
12多重量子井戸構造層13が積層されている。多重量
子井戸構造層13は、アンド−f InAtAsおよび
InGaAsをそれぞれバリア層および井戸層に用いて
形成されている。多重量子井戸構造層13上には、pを
InALklS層14t−介してオーミックコンタクト
用p型InGaAs層15及びAuZnNiからなるコ
ンタクト電極16が順次積層されている。なお、コンタ
クト電極16下の多重量子井戸構造層13を含む各層1
5,14.12にはメサエッチ処理が施されている。
On the InP substrate 11, an n-type InAIA layer 12, all layers 12, and a multi-quantum well structure layer 13 are laminated. The multiple quantum well structure layer 13 is formed using and-f InAtAs and InGaAs for a barrier layer and a well layer, respectively. On the multiple quantum well structure layer 13, a p-type InGaAs layer 15 for ohmic contact and a contact electrode 16 made of AuZnNi are sequentially laminated via a p-type InALklS layer 14t. Note that each layer 1 including the multi-quantum well structure layer 13 under the contact electrode 16
5, 14, and 12 are subjected to mesa etch processing.

このように構成された共鳴トンネル型負性抵抗素子の電
流−電圧特性は、第2図に示す通シである。而して、こ
の素子は第3図に示すようなバンド構造のもとに動作す
る。す々わち、印加電圧vaがフラットバンド電圧V、
よシ低い場合は、第3図(4)に示すバンド構造になり
電流は流れにくい。而して、電圧が増加し、フラットバ
ンド電圧V、近くになると共鳴トンネルが生じ、電流は
急激に増加する(第3図(均参照)。印加電圧Vaが7
ラツトバンド電圧V、をこえると、多重量子井戸の1つ
の井戸に余分の電圧が加わシ、共鳴トンネル条件が破れ
、を流が急激に減少し、負性抵抗が現れる−(第3図(
0参照入更に電圧を加えると、再び共鳴トンネル条件が
満され電流が増力■する(第3図(0参照)。更に電圧
を加えると、別の井戸に余分の電圧が加わシ、非共鳴ト
ンネル状態が破れ電流が減少する。このように、1つの
井戸が共鳴トンネル状態に入るに対応し、負性抵抗特性
が1つ特性に現れる。従って井戸数に対応した数だけ小
さな負性抵抗特性が現れ、すべての量子井戸が異なる量
子準位間の共鳴トンネル状態を越えた電圧を加えると、
ホットエレクトロンによる伝導によシミ流は再び単調に
大きく増加して行く・以上の効果は第2図に得られた電
流−電圧特性によく現われている。かかる特性は発明者
らの研究により初めて見い出され之現象である。
The current-voltage characteristics of the resonant tunnel type negative resistance element configured in this way are as shown in FIG. Thus, this element operates based on a band structure as shown in FIG. That is, the applied voltage va is the flat band voltage V,
If it is very low, a band structure as shown in FIG. 3 (4) will be formed and current will hardly flow. As the voltage increases and approaches the flat band voltage V, resonant tunneling occurs and the current increases rapidly (see Figure 3).
When the ratband voltage V is exceeded, an extra voltage is applied to one well of the multiple quantum well, the resonant tunneling condition is broken, the flow rapidly decreases, and negative resistance appears (Fig. 3).
0 reference input When a further voltage is applied, the resonant tunneling condition is satisfied again and the current increases (see Figure 3 (0)).When a further voltage is applied, an extra voltage is applied to another well, causing non-resonant tunneling. The state is broken and the current decreases.In this way, one well enters the resonant tunneling state, and one negative resistance characteristic appears in the characteristic.Therefore, the negative resistance characteristic is small by the number corresponding to the number of wells. When we apply a voltage that appears and all quantum wells cross the resonant tunneling state between different quantum levels,
Due to conduction by hot electrons, the stain current increases monotonically and greatly again.The above effect is clearly seen in the current-voltage characteristics obtained in FIG. This characteristic was first discovered through research by the inventors.

さて、このような構造の素子における電圧マージンvm
′は、上に述べた動作原理よ)高電界領域が伸び、新た
に1つの量子井戸が高電界領域に加わることによシ、負
性抵抗特性を示すに必要な電圧増加分ΔvI]1を、量
子井戸数をnとするとVn1′ユΔVmXnで概算でき
ることがわかる。すなわち。
Now, the voltage margin vm in an element with such a structure
' is based on the operating principle described above) As the high electric field region expands and one new quantum well is added to the high electric field region, the voltage increase ΔvI]1 required to exhibit negative resistance characteristics is , it can be seen that when the number of quantum wells is n, it can be approximately estimated by Vn1' and ΔVmXn. Namely.

この素子においては、多重量子井戸構造を採用し、その
井戸数nを適当に選ぶことによシ、電圧マージンV′の
大きさを所望の値に設定することが町能となる。このた
め、電圧マーソンvフとして十分な値を得ることが可能
となる。例えば、40個の井戸数においてV。′さ6v
という十分な値が得られている。以上の結果から明らか
なように、第4図に示した従来のものに比べて電圧マー
ノンV/の間題を解消できるものである。
In this device, a multiple quantum well structure is adopted, and by appropriately selecting the number n of wells, it is possible to set the voltage margin V' to a desired value. Therefore, it is possible to obtain a sufficient value as the voltage Marson v. For example, V at a well number of 40. 'sa6v
A sufficient value has been obtained. As is clear from the above results, the problem of voltage mernon V/ can be solved compared to the conventional one shown in FIG.

なお、実施例では、P1n構造のX nGaAg /I
 nAlAsの場合について説明したが、 GaAs/
GaAtAm系等の他の材料のものでも良く、また、 
nin構造のものとしても良い。また、第1図のInA
tAsnGaAs層12I nAム膠層14をI nG
aAs層に置き換えても良いことは勿論である。
In addition, in the example, X nGaAg /I of P1n structure
Although we have explained the case of nAlAs, GaAs/
Other materials such as GaAtAm may also be used, and
It may also have a nin structure. In addition, InA in FIG.
tAsnGaAs layer 12I nA Mug glue layer 14 InG
Of course, it may be replaced with an aAs layer.

[発明の効果] 、以上説明した如く、本発明に係る共鳴トンネル呈負性
抵抗素子によれば、電圧マージンが大きくとれるように
負性抵抗を改善できることから、負性抵抗領域の大きな
負性抵抗素子を実現できる。
[Effects of the Invention] As explained above, according to the resonant tunneling negative resistance element according to the present invention, the negative resistance can be improved so that a large voltage margin can be obtained. element can be realized.

また、論理回路設計における電圧マージンも大きくとれ
るため、集積化において多少の素子の特性のバラツキを
許容できる等顕著な効果を有するものである。
Further, since a large voltage margin can be secured in logic circuit design, it has remarkable effects such as being able to tolerate some variation in the characteristics of elements during integration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は1本発明の一実施例の概略構成を示す説明図、
第2図及び第6図は、電流−電圧特性を示す説明図、第
3図及び第5図は、バンド構造を示す説明図、第4図は
、従来の共鳴トンネル型負性抵抗素子の概略構成を示す
説明図である。 11 ・・・InP基板、12−InAAAs層、 1
3 ・・・多重量子井戸構造層、14・・・p型InA
tA+s層、15・・・p型1nGaAa層、16・・
・コンタクト電極、17・・・オーミック電極。 出願人代理人 弁理士 鈴 江 武 彦第1図 第2図 (B) e − (C) 第3図 第4図
FIG. 1 is an explanatory diagram showing a schematic configuration of an embodiment of the present invention,
FIGS. 2 and 6 are explanatory diagrams showing current-voltage characteristics, FIGS. 3 and 5 are explanatory diagrams showing band structures, and FIG. 4 is a schematic diagram of a conventional resonant tunnel type negative resistance element. FIG. 2 is an explanatory diagram showing the configuration. 11...InP substrate, 12-InAAAs layer, 1
3...Multi-quantum well structure layer, 14...p-type InA
tA+s layer, 15... p-type 1nGaAa layer, 16...
- Contact electrode, 17... Ohmic electrode. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 2 (B) e - (C) Figure 3 Figure 4

Claims (3)

【特許請求の範囲】[Claims] (1)第1導電型の半導体基板上に、第1導電型の第1
半導体層,バリア層となる第2半導体層,および井戸層
となる第3半導体層の積層構造にて形成された量子井戸
構造層と、該量子井戸構造層上に第2導電型の第4半導
体層をメサ状に有する共鳴トンネル型負性抵抗素子にお
いて、量子井戸部分を多重量子井戸構造にしたことを特
徴とする共鳴トンネル型負性抵抗素子。
(1) A first semiconductor substrate of a first conductivity type is placed on a semiconductor substrate of a first conductivity type.
A quantum well structure layer formed of a laminated structure of a semiconductor layer, a second semiconductor layer serving as a barrier layer, and a third semiconductor layer serving as a well layer, and a fourth semiconductor of a second conductivity type on the quantum well structure layer. 1. A resonant tunneling negative resistance element having mesa-shaped layers, characterized in that a quantum well portion has a multi-quantum well structure.
(2)第1導電型と第2導電型が同じであることを特徴
とする特許請求の範囲第1項記載の共鳴トンネル型負性
抵抗素子。
(2) The resonant tunnel type negative resistance element according to claim 1, wherein the first conductivity type and the second conductivity type are the same.
(3)第1導体層と第4導体層が同一材料で形成されて
いることを特徴とする特許請求の範囲第1項記載の共鳴
トンネル型負性抵抗素子。
(3) The resonant tunnel type negative resistance element according to claim 1, wherein the first conductor layer and the fourth conductor layer are formed of the same material.
JP61293373A 1986-12-11 1986-12-11 Resonance tunnel type negative resistance element Pending JPS63147382A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61293373A JPS63147382A (en) 1986-12-11 1986-12-11 Resonance tunnel type negative resistance element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61293373A JPS63147382A (en) 1986-12-11 1986-12-11 Resonance tunnel type negative resistance element

Publications (1)

Publication Number Publication Date
JPS63147382A true JPS63147382A (en) 1988-06-20

Family

ID=17793939

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61293373A Pending JPS63147382A (en) 1986-12-11 1986-12-11 Resonance tunnel type negative resistance element

Country Status (1)

Country Link
JP (1) JPS63147382A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010251689A (en) * 2009-03-27 2010-11-04 Fujitsu Ltd Semiconductor element
JP2017168518A (en) * 2016-03-14 2017-09-21 富士通株式会社 Semiconductor device and semiconductor circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010251689A (en) * 2009-03-27 2010-11-04 Fujitsu Ltd Semiconductor element
JP2017168518A (en) * 2016-03-14 2017-09-21 富士通株式会社 Semiconductor device and semiconductor circuit

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