JPS63144724A - Reactive power compensator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a reactive power compensator, and particularly to a static non-dynamic power compensator that detects and controls system voltage.

[Conventional technology]

Generally, static non-active power compensator (hereinafter referred to as S) for customer equipment
(abbreviated as vC) detects the actual reactive power of the grid and performs reactive power control, but in the case of power grid applications, the amount of reactive power at the installation point cannot be specified, so control is performed by detecting the grid voltage. That's what I do.

Figure 2 shows the configuration of this voltage-controlled SvC.
Step-down transformer5. Reactor 4. Thyristor valve 3.
and a control device 70.

Further, if phase advance compensation is required, a phase advance compensation capacitor 2 is installed.

In FIG. 2, the system voltage V of the power transmission line 100 is taken into the voltage detection circuit 17 via the voltage transformer 13. Here, the voltage is first converted to a voltage level suitable for processing within the control device by the voltage conversion circuit 30, and then rectified by the aftereffect rectification circuit 31.
The effective value conversion circuit 32 converts it into an effective value (or peak value). The system voltage converted in this way is compared with the voltage setting value vr created by the voltage setter 18 in the subtraction circuit 14, and the difference voltage εV is input to the voltage control circuit 15.

The output of the voltage control circuit 15 is converted into a pulse with a corresponding phase by an automatic pulse phase shifter 16, and becomes a firing pulse for the thyristor valve 3. In such a circuit configuration, when the system voltage V increases, the deviation voltage εV increases, the output of the voltage control circuit 15 also increases, and as a result, the reactor 4
The thyristor valve 3 is controlled so as to increase the delayed reactive power flowing to the thyristor valve 3, and operates to lower the system voltage V. On the contrary, when the system voltage V drops, the reactive power flowing to the reactor 4 is controlled to be small (3) by the operation opposite to the above, and the system operates to increase the system voltage (3). The ability to suppress such voltage fluctuations of SvC increases as the forward gain KA of the voltage control circuit 15 increases. Generally, this gain is set to about several 10, so that it can suppress even slight fluctuations in the system voltage. also responds sensitively.

[Problem that the invention seeks to solve]

The system voltage normally contains one harmonic acid component, but the content of lower harmonics increases especially due to the installation of phase advance compensation capacitors. Among these harmonics, even harmonic components are
As shown in FIG. 3, the positive half-wave and the negative half-wave may act so that their peak values are different. That is, if the fundamental component Vz includes the second harmonic component v2 with the phase shown in the figure as shown in FIG. 3(a), the system voltage V=Vt +V2
The negative peak value IVP-1 may be larger than the positive peak value IVP++ (solid curve). If the voltage V is full-wave rectified and smoothed under such conditions, the result will be as shown in the same figure (b).
As shown by V RE (!), a ripple occurs in the fundamental wave component, and therefore the output εV of the subtractor 14 also oscillates with the fundamental wave component, and therefore the output of SvC also oscillates.For example, the second harmonic When 0.5% of the wave is included and the forward gain of the voltage control circuit 15 is 20, Δv2 in FIG. 3(b) is 1% of the amplitude of the fundamental wave Vx, and the output conversion is 20% of the amplitude of the fundamental wave V1. Depending on system conditions, such fluctuations may cause control instability.

Generally, there are ways to eliminate the effects of even harmonics, such as installing a bandpass filter or making the time constant of the rectifier circuit sufficiently long, but these methods slow down the detection time and reduce the overall SvC system. This is undesirable as it will make the response worse.

SUMMARY OF THE INVENTION An object of the present invention is to provide a static non-dynamic power compensator in voltage-controlled SvC that has less detection delay and can also prevent output fluctuations due to even harmonics included in the system voltage.

[Means for solving problems]

The above object is achieved by providing an integrating means for integrating the rectified voltage detected from the grid over one period of the fundamental wave component of the grid voltage.

[Effect]

The ripple of the rectified output caused by the even harmonic component included in the grid voltage has a period of one period of the fundamental wave of the grid voltage or a period of - an integer of the fundamental wave. When integrated over one period, the ripple component is completely smoothed and ripples are removed, and the integration time is also a minimum value within the necessary range and is sufficiently small, so that the response delay of SvC can be sufficiently reduced.

〔Example〕

Hereinafter, the present invention will be explained in detail by way of examples.

The overall configuration of this device is the same as that shown in FIG. 2, but the voltage detection circuit 17 is the 11th! It consists of the circuit shown in 1.

That is, sample hole goo 33. Aftermath rectifier circuit 31 (absolute value circuit ABS), buffer register 321, timing circuit 322. It is composed of an adder circuit 323.

In such a configuration, first, in the sample holder 33,
For example, the output VT of the voltage conversion circuit 30 is taken in every 30 electrical degrees. This captured voltage waveform is obtained by sampling the solid line waveform in FIG. 4(a) every 30 degrees.

However, FIG. 4(a) shows a case where second-order harmonic components are superimposed with exactly the same phase relationship as FIG. 3(a). Subsequently, the absolute value circuit 31 performs aftereffect rectification of the taken-in voltage sampling value, and the output thereof is inputted to the nth buffer register 321 as V(n). However, when inputting this,
Prior to input, the n-10th of the buffer register 321 is changed to the n-11th, the n-9th is changed to the n-10th, etc.
. . . The registers are sequentially replaced one by one from the fortune-telling data, and the nth register is left vacant. This is because the buffer register 321 has 12 registers.

The sampling data V (
n-1), V (n-10),...V
When 12 items of (n) are stored, data for one cycle of the grid voltage fundamental wave is complete, which corresponds to the sampling of the solid curve Va in FIG. 4(b).

Next, when the sum of data for one cycle is calculated by the adder 323, the output Vs is multiplied by an appropriate coefficient to obtain the integral value for one cycle of the voltage Va, that is, the voltage Va
is the effective value of Moreover, even if harmonic components such as second order, fourth order, etc. affect the rectified output, that is, the voltage Va, the ripple component is always a periodic wave with the period of the fundamental wave. No ripple component appears in the integral value Vs, allowing stable control of reactive power. Moreover, the time for this integration (one cycle of the fundamental wave) is the minimum time required to remove the ripple component and is sufficiently short, so the response delay of the SvC can be minimized.

Note that in this embodiment, when other harmonic components are included, the voltage detection value Vs may deviate somewhat from the effective value of the fundamental component. On the other hand, SvC itself does not control the absolute value of the grid voltage, but its main purpose is to suppress its fluctuations. Therefore, in Figure 2, SvC
, a subtracter 20 that compares this output with the actual output of the voltage control circuit 15 , and an integrator 21 that integrates the output of the subtracter 20 . By finding the difference between QA and the output Qz of the setting device 19 with a subtracter 20, integrating the deviation ΔQ with an integrator 21, and subtracting this output Vz from the voltage setting value Vr,
Correction is applied to vr so that ΔQ always approaches zero. In this way, by always maintaining the average output of SvC near the given set level Q, it is possible to eliminate the influence of the aforementioned DC component error of the output of the voltage detection circuit 17.

〔Effect of the invention〕

According to the present invention, even when low-order harmonics are included in the system, there is no large voltage detection delay and ripple-free voltage detection is possible, so stable SvC
This has the effect of ensuring the operation of

[Brief explanation of the drawing]

Fig. 1 is a diagram showing an embodiment of a voltage detection circuit which is a feature of the present invention, Fig. 2 is a block diagram showing the overall configuration of a static static power compensator, and Fig. 3 is a diagram showing a voltage detection circuit of a conventional device. FIG. 4 is a diagram showing operating waveforms of the circuit of FIG. 1. 2... Phase advance compensation capacitor, 3... Thyristor valve, 4... Reactor, 14... Subtractor, 15...
・Voltage control circuit, 16... automatic pulse phase shifter, 17.
... Voltage detection circuit, 31... Aftermath rectifier circuit (absolute value circuit), 321... Buffer register, 33... Sample holder, 322... Timing circuit, 323
... Addition circuit.

Claims (1)

[Claims] 1. A reactor for phase adjustment, a switching element that can control the current flowing through the reactor, a voltage detection means for detecting the grid voltage of the power system that is the target of phase adjustment, and a voltage detection value by the means and a preset standard. In the reactive power compensator, the voltage detection means is provided with a sample holder for sampling and taking in the system voltage, and a control means for driving and controlling the switching element so that the deviation from the voltage becomes zero. , an absolute value circuit that calculates the absolute value of the sampling voltage taken in by the sample holder, and a buffer memory that can store the absolute value of the sampling voltage obtained by the circuit for one cycle of the fundamental wave component in the system voltage. , an adding means for outputting a detected value of the grid voltage by calculating the sum of the absolute values of the sampling voltages for one cycle in the buffer memory; and the sample holder, the buffer memory, and the adding means. A reactive power compensator comprising a timing circuit that provides operation timing.