JPS63140560A - Semiconductor monolithick bias feeding circuit - Google Patents

Abstract

PURPOSE:To obtain a feeding circuit of small semiconductor chip area which is scarcely affected by external case and the like which leak electromagnetic field, by constituting a MIM capacitance of a spiral strip line inductor, a dielectric insulating layer, and the uppermost metal layer. CONSTITUTION:A semiconductor monolithic bias feeding circuit is composed of the following formed on a semiconductor substrate 7; a spiral strip line inductor 3 provided with a bias input pad 2 and a bis output pad 3, a dielectric insulating layer 10 formed on the inductor, and an uppermost metal layer 11 which is formed on the dielectric insulating layer and is connected to a grounding pad 6. The spiral strip line inductor 3 and the uppermost metal layer 11 are formed by vapor deposition of titanium (Ti) and gold (Au), and the dielectric insulating layer 10 constituting a MIM capacitance 4 is formed of SiO2 or Si3N4 by chemical vapor deposition method (CVD) or SiO by sputtering.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor monolithic bias power supply circuit with a small chip area.

[Prior Art] FIGS. 2(a) and 2(b) are a top view and an equivalent circuit diagram of a conventional semiconductor monolithic bias power supply circuit. In these figures, 1 is a bias output pad, 2 is a bias input pad, and 3 is a spiral strip line inductor, which are formed on a semiconductor substrate 7. 4 is metal layer-insulating layer-metal layer capacitance (hereinafter referred to as MIM capacitance);
Reference numeral 5a denotes a base metal layer constituting the MIM capacitor 4, and is connected to a grounding pad 6. 5b is the MIM capacity 4
8 is a carrier, and 9 is a gold wire connecting the carrier 8 and the grounding pad 6.

The semiconductor monolithic bias power supply circuit shown in FIG. 2(a) is represented by an inductor connected in series and a capacitor connected in parallel, as shown in FIG. 2(b). Bias power pad 2 is connected to a bias power supply,
Bias output pad 1 is connected to a semiconductor element that is a load.

The spiral strip line inductor 3 is constructed by performing metal vapor deposition on the entire surface of the semiconductor substrate 7, and then forming a fine pattern using a light exposure method.

Further, the MIM capacitor 4 is formed by depositing a dielectric insulating layer (not shown) on the base metal layer 5a formed when configuring the spiral strip line inductor 3, and then forming the base metal layer 5b. Configure.

Note that the spiral strip line inductor 3 has a conductor metal width of several μm to several tens of μm, a conductor metal portion of about several μm, and a thickness of the insulating layer of the MIM capacitor 4 of several thousand angstroms to several μm.

With the above configuration, high frequency components from the semiconductor element are transmitted to the spiral strip line inductor 3 and the MIM capacitor 4.
is sufficiently attenuated by

(Problems to be Solved by the Invention) In the conventional semiconductor monolithic bias power supply circuit as described above, the spiral strip line inductor 3 and M
Since the IM capacitors 4 are formed separately, there is a problem in that the area of the semiconductor chip increases. Further, there is a problem in that the electromagnetic field leaks from the spiral strip line inductor 3 and is affected by the external casing and the like.

The present invention has been made to solve these problems, and an object of the present invention is to provide a semiconductor monolithic bias power supply circuit which has a small semiconductor chip area and is less susceptible to the influence of an external casing due to electromagnetic field leakage.

(Means for Solving the Problems) A semiconductor monolithic bias power supply circuit according to the present invention includes a spiral strip line inductor having a bias input pad and a bias output pad formed on a semiconductor substrate, and a spiral strip line inductor having a bias input pad and a bias output pad formed on a semiconductor substrate. A dielectric insulating layer is formed, and a top metal layer is formed on the dielectric insulating layer and connected to a grounding pad.

[For production]

In this invention, a MIM capacitor is constructed from a spiral stripline inductor, a dielectric insulating layer, and a top metal layer. Furthermore, the electromagnetic field from the spiral stripline inductor no longer reaches the external casing.

〔Example〕

1(a) to 1(C) are top views showing one embodiment of the semiconductor monolithic bias power supply circuit of the present invention, and FIG.
) along the X-Y line and its equivalent circuit diagram. In these figures, the same reference numerals as in FIGS. 2(a) and 2(b) indicate the same parts, 10 is a dielectric insulating layer deposited on the entire surface of the spiral strip line inductor 3, and 11 is the grounding pad. 6. The top metal layer is connected to 6. The spiral stripline inductor 3 and the top metal layer 11 are made of titanium (Ti
), the dielectric insulating layer 10 constituting the MIM capacitor 4 is formed by vapor deposition of gold (Au) using a vapor phase chemical deposition method (C
Sin, by VD).

It is formed of Si3N4 or SiO by sputtering.

The semiconductor monolithic bias power supply circuit shown in Figures 1(a) and (b) consists of an inductor connected in series and two capacitors connected in parallel, as shown in the equivalent circuit diagram of Figure 1(C). expressed. Bias output pad 1
High frequencies from the bias power pad 2 to the bias power pad 2 will be attenuated.

Here, in order to increase the attenuation from the bias output pad 1 to the bias power pad 2, the number of turns of the spiral stripline inductor 3 can be increased, the length of the negative side can be increased, or the semiconductor monolithic bias power supply circuit It is sufficient to connect them in multiple stages. Further, since the spiral strip line inductor 3 and the capacitor are integrated, the area of the semiconductor chip can be reduced, and since the uppermost metal layer 11 is grounded, leakage of electromagnetic field can be eliminated.

In the above embodiment, a square spiral strip line inductor 3 was explained as an example.
Needless to say, a configuration using a circular loop spiral stripline inductor is also possible.

〔Effect of the invention〕

As explained above, the present invention includes a spiral strip line inductor having a bias input pad and a bias output pad formed on a semiconductor substrate, an electrical insulating layer formed on this spiral strip line inductor, and this dielectric material. Since it is composed of an insulating layer and a top metal layer connected to a grounding pad, it is possible to reduce the semiconductor chip area and eliminate electromagnetic field leakage, making it less susceptible to the effects of the external casing. It has the effect of becoming.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining an embodiment of the semiconductor monolithic bias power supply circuit of the present invention, and FIG. 2 is a diagram for explaining a conventional semiconductor monolithic bias power supply circuit. In the figure, 1 is a bias output pad, 2 is a bias input pad, 3 is a spiral strip line inductor, 4 is an MIM capacitor, 6 is a grounding pad, 7 is a semiconductor substrate, 8 is a carrier, 9 is a gold wire, and 1o is a dielectric body insulation layer, 11
is the top metal layer. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent: Masuo Oiwa (2 others) Figure 1 11 fi upper f genus layer Figure 2

Claims (1)

[Claims] A spiral stripline inductor having a bias input pad and a bias output pad formed on a semiconductor substrate, a dielectric insulating layer formed on the spiral stripline inductor, and a grounding layer formed on the dielectric insulating layer. A semiconductor monolithic bias power supply circuit comprising: a top metal layer connected to a pad;