JPS63124520A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the irregularity of electric characteristics of a semiconductor device by once damaging a crystal of silicon by implanting rare gas ions, and then again returning it by a short time heat treatment to a polycrystal, thereby making uniform crystal grain sizes of a polycrystalline silicon layer. CONSTITUTION:A polycrystalline silicon layer 5 is formed on a semiconductor wafer 10 by a vapor phase growth method, and argon ions 11 are then implanted to the layer 5. Then, the ions 11 are implanted in a normal distribution state into the layer 5 to damage the crystal of the layer 4 to convert it to an amorphous silicon layer 7. Then, when a halogen lamp is irradiated for a short time in argon gas to anneal it, the layer 7 is returned to a polycrystalline silicon layer 8 with a uniform bonding strength of crystal grain size and atoms. Further, n-type impurity ions 12 are similarly implanted into the layer 8 to perform similar heat treatment in argon gas. The layer 8 becomes an n-type polycrystalline silicon layer 9 by this heat treatment, and the part adjacent to the layer 9 in the layer 4 forms an n-type impurity layer 6.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a method for manufacturing a semiconductor device.

[Conventional technology]

2. Description of the Related Art Polycrystalline silicon technology has been widely used as semiconductor ICs have become more sophisticated and highly integrated in recent years.

FIGS. 2(a) and 2(b) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a conventional method of manufacturing a semiconductor device.

As shown in FIG. 2(a), the semiconductor wafer 10 is manufactured by forming an n-type impurity layer that will become a collector region on the semiconductor p-type substrate 1 by epitaxial growth, and then using LOCO3.
It is formed by forming a silicon oxide film 3 by a method, then forming a p-etching blunt layer 4 which will become a base region, and then opening a hole in a portion which will become an emitter region using photolithography technology.

Next, a polycrystalline silicon layer 5 with a thickness of about 150 nm is formed on the surface of the semiconductor wafer 10 by a vapor phase growth process.

As shown in FIG. 2(b), n-type carving blunt ions 12 are implanted into this polycrystalline silicon layer 5, and then heat treatment is performed in an inert gas to transform the polycrystalline silicon layer 5 into an n-type polycrystalline silicon layer. At the same time as the formation of the N-carving blunt region 9, an N-carving blunt region 6 which will become an emitter region is formed between the P-carving blunt layer 4.

[Problem that the invention seeks to solve]

In the conventional semiconductor device manufacturing method described above, the crystal grain size and the bonding strength of silicon atoms in the polycrystalline silicon layer vary greatly depending on the conditions of the vapor phase growth process when forming the polycrystalline silicon layer and the crystalline state of the silicon substrate. Therefore, the diffusion coefficient in polycrystalline silicon varies greatly.

Implanting impurity ions into this polycrystalline silicon layer and heating it to form a conductive polycrystalline silicon layer and the same conductive type impurity region in the adjacent silicon substrate have variations in device characteristic values, resulting in poor quality and yield. There was a problem of decline.

An object of the present invention is to provide a method for manufacturing a semiconductor device in which the crystal grain size of a polycrystalline silicon layer is made uniform and variations in electrical characteristics are reduced.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the steps of depositing a polycrystalline silicon layer on a semiconductor wafer on which an impurity region and an insulating film having a contact opening with the impurity region are formed, and implanting rare gas ions. and a step of converting the amorphous silicon layer into a polycrystalline silicon layer by heat treatment in an inert gas.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIGS. 1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1(a), a semiconductor wafer 10
is the same as the semiconductor wafer 10 in FIG. 2(a),
It is formed using the conventional process described above.

Furthermore, a polycrystalline silicon layer 5 with a thickness of about 150 nm is formed on the surface of the semiconductor wafer 10 using a vapor phase growth method.

Next, as shown in FIG. 1(b), the dose amount is 6×104
On/c112. Under the condition of acceleration energy 70keV,
Argon ions 11 are implanted into the polycrystalline silicon layer 5.

Therefore, argon ions 13 are implanted into the polycrystalline silicon layer 5 in a normal distribution with a flight distance Rp of 69.2 nm from the surface and a standard deviation σp of 29.2 nm, and the crystals of the polycrystalline silicon layer 5 are destroyed. and converted into an amorphous silicon layer 7.

Next, as shown in Figure 1 (C), when annealing is performed at 900°C for 10 seconds by irradiating a halogen lamp in argon gas for a short time, the amorphous silicon layer is It is returned to the polycrystalline silicon layer 8 with uniform bonding strength.

Furthermore, as shown in FIG. 1(d), n-carving blunt ions 12 are implanted into this polycrystalline silicon layer 8, and then heat treatment is performed in the same argon gas at the same temperature and time as the conventional method.

Through this heat treatment, the polycrystalline silicon layer 8 becomes an n-type polycrystalline silicon layer 9, and a portion of the p-type carving blunt layer 4 adjacent to the n-type polycrystalline silicon layer 9 forms an n-type carving blunt layer 6.

The polycrystalline silicon layer 8 formed according to this embodiment has a more uniform crystal state than the conventional polycrystalline silicon layer 5, and therefore has a uniform diffusion coefficient, so that the resistance characteristics of the n-type polycrystalline silicon layer 9 also improve. Furthermore, the characteristics of the N-carving blunt layer 6, which becomes the emitter region of the bipolar transistor, also become uniform.

Although the manufacturing process of a bipolar transistor has been described in the above embodiment, the present invention may be applied to a polycrystalline silicon layer on the surface of the semiconductor wafer 10 as a semiconductor substrate having an insulating layer as an upper layer.

〔Effect of the invention〕

As explained above, according to the present invention, silicon crystals are once broken by rare gas ion implantation, and then returned to polycrystalline form by short-term heat treatment. A silicon layer is obtained and impurity diffusion is made uniform, which has the effect of reducing variations in device characteristics caused by diffusion.

[Brief explanation of the drawing]

1(a) to 1(d) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining one embodiment of the present invention, and FIG. 2(a)
> and (b) are cross-sectional views of a semiconductor chip shown in order of steps for explaining a conventional method of manufacturing a semiconductor device. DESCRIPTION OF SYMBOLS 1...p-type semiconductor substrate, 2...n carving blunt layer, 3...
...Silicon oxide film, 4...P carving blunt layer, 5...
Polycrystalline silicon, 6...n carving blunt layer, 7... amorphous silicon ° layer, 8... polycrystalline silicon layer, 9...
n-type polycrystalline silicon layer, 10... semiconductor wafer, 1
1...Argon ion, 12...n carver's blunt ion. 1 time

Claims (1)

[Claims] Depositing a polycrystalline silicon layer on a semiconductor wafer on which an insulating film having an impurity region and a contact opening with the impurity region is formed, and converting the polycrystalline silicon layer into an amorphous layer by implanting rare gas ions. 1. A method for manufacturing a semiconductor device, comprising the steps of converting the amorphous silicon layer into a polycrystalline silicon layer by heat treatment in an inert gas atmosphere.