JPS63115231A - Function signal generator - Google Patents

Abstract

PURPOSE:To simplify the change of the period of a function signal by digitally setting the frequency division ratio of a frequency divider, which divides the frequency of the oscillation signal outputted from an oscillating device, by a frequency division ratio setting device. CONSTITUTION:An oscillation signal S1 having a period T outputted from an oscillating device 11 has the frequency divided by a frequency divider 12 to obtain a frequency-divided signal S2 having a period 5T. The number of pulses included in the frequency-divided signal S2 is counted by a counter 13 to obtain a count signal S3. The count signal S3 is digitally expressed and is increased from a minimum value toward a maximum value and is reset to the minimum value immediately after reaching the maximum value and is increased from the minimum value toward the maximum value again. This signal S3 is converted to an analogically expressed conversion signal S4 having the magnification corresponding to a conversion ratio by a D/A converter 14, and this signal S4 is smoothed to a saw tooth wave smoothed signal S5 by a smoothing device 15. Consequently, the frequency division ratio of the frequency divider 12 is changed from 1/3 to 1/5 by a frequency division ratio setting device 16 to extend the period of the smoothed signal S5 5/3 times.

Description

Detailed Description of the Invention (1) Object of the Invention [Industrial Application Field] The present invention relates to a function signal generation device, and more particularly to a function signal generation device that facilitates period adjustment of a generated function signal. It is something.

[Prior Art] Conventionally, in this type of function signal generator, as shown in FIG. 11, an appropriate frequency is set by adjusting a variable resistor R attached to an oscillation device 11 by sliding it with a finger or the like. The number of pulses included in the oscillation signal S is counted by a counting device 13 such as a ring counter or an up/down counter, and the counting result is given as a digital representation, for example, a binary representation count signal S3, to the digital-to-analog converter 14 for analog representation. A smoothing device 15 converts the converted signal S4 into a smoothed signal S5 such as a rectangular wave, sawtooth wave, or triangular wave, and outputs it as a function signal to a subsequent device (not shown) as appropriate. was.

[Problems to be solved] However, in the conventional function signal generator, the oscillation device I
The period of the function signal, that is, the smooth signal S5, was adjusted by adjusting the variable resistor R attached to I in an analog manner to change the frequency of the oscillation signal S1. It has the disadvantage that the reproducibility of the function signal is affected and the reproducibility of the function signal is inferior. In addition, (ii) the operator needs to become proficient and requires a long period of training before acquiring the operational ability, and (iii) ) In actual use, a measurement device is required to check the waveform of the generated function signal, that is, the smoothed signal S5, and the operation is complicated.

Therefore, the present invention eliminates the need to adjust the variable resistor attached to the oscillation device, has excellent reproducibility of the function signal, can be operated with almost no skill required, and does not require special measuring equipment. It is an object of the present invention to provide a function signal generating device that can be easily used without any problems.

(2) Structure of the Invention [Means for Solving Problems] To achieve this, the present invention provides an oscillation device that outputs an oscillation signal, a frequency divider that divides the frequency of the oscillation signal and outputs the frequency-divided signal, and a counting device that counts the number of pulses included in a frequency signal and outputs it as a count signal; a digital-to-analog converter that converts the count signal into an analog representation conversion signal and outputs it as a function signal; and adjusts the period of the function signal. The conventional problem is solved by a function signal generating apparatus characterized by comprising a frequency division ratio setting device for digitally setting the frequency division ratio of the frequency division device.

The present invention also provides an oscillation device that outputs an oscillation signal, a frequency division device that divides the frequency of the oscillation signal and outputs the frequency-divided signal,
a counting device that counts the number of pulses included in the frequency-divided signal and outputs it as a count signal; a digital-to-analog converter that converts the count signal into an analog representation and outputs it as a converted signal; and a function signal that smooths the converted signal. and a frequency division ratio setting device that digitally sets a frequency division ratio of the frequency division device to adjust the period of the function signal. also solves the conventional problems.

[Operation] The function signal generating device according to the present invention generates a function signal by digitally setting a frequency division ratio of a frequency dividing device for dividing an oscillation signal outputted from an oscillation device using a frequency division ratio setting device. The period of the function signal is changed.1 It has the effect of simplifying the change of the period of the generated function signal, and in turn, it has the effect of ensuring sufficient reproducibility. It also performs an unnecessary function.

In addition, the function signal generator according to the present invention smoothes the converted signal, which is the output of the digital-to-analog converter that changes the frequency-divided signal in digital expression into analog expression, using a smoothing device. It has the effect of relatively increasing the period of the oscillation signal output by the
This also has the effect of relaxing the requirements for operating accuracy of oscillators and the like.

[Example] Next, the present invention will be specifically described with reference to the accompanying drawings.

FIG. 1 is a block circuit diagram showing an embodiment of the function signal generating device of the present invention. FIGS. 2 to 7 are explanatory diagrams of the same operation, in which time is plotted on the horizontal axis and voltage is plotted on the vertical axis.

FIG. 8 is a block circuit diagram showing another embodiment of the function signal generator of the present invention. FIGS. 9 and 10 are explanatory diagrams of the same operation, in which time is plotted on the horizontal axis and voltage is plotted on the vertical axis.

First, the structure and operation of an embodiment of the function signal generator of the present invention will be described with reference to FIGS. 1 to 7.

An oscillation device 11 includes a suitable oscillator (not shown) such as a crystal oscillator, and outputs an oscillation signal SL consisting of a pulse train having a constant period T, for example. The waveform of the pulse included in the oscillation signal S8 may be any desired shape such as a rectangular shape. It is sufficient that the period of the oscillation signal S1 is constant for a desired period, and it does not necessarily have to be fixed and may be adjustable from the outside, but for the sake of brevity, it is fixed at a constant period T. Only the case will be explained. 12 is a frequency dividing device whose input terminal is connected to the output terminal of the oscillation device 11, and the output signal of the oscillation device 11, that is, the oscillation signal S, is digitally set by the setting signal S6 from the frequency division ratio setting device 16. The frequency is appropriately divided according to the frequency division ratio and output as a frequency-divided signal S2. Divided signal S2
The period is extended compared to the period T of the oscillation signal S1 according to the frequency division ratio, and is set to, for example, 3T. 1
3 is a counting device whose input terminal is connected to the output terminal of the frequency dividing device 12, which counts the number of pulses included in the frequency divided signal S2, and outputs the counting result as a counting signal S3.

The counting device 13 may be formed of a ring counter or an up/down counter, and the representation format or number of digits of the counted value may be selected as desired, so for the sake of brevity, the explanation will be omitted here. Assume that a binary representation is selected as the representation format of the count value and four digits are selected as the number of digits, and a four-digit binary representation consisting of four signals SS+ to S34 as shown in Figures 2 to 7, respectively. It is assumed that a four-digit ring counter or an up/down counter, etc. in binary notation that outputs a count signal S3 is used as the counting device 13. Reference numeral 14 denotes a digital-to-analog conversion device whose input end is connected to the output end of the counting device 13, which converts the count contents of the digitally expressed count signal S3 into an analog expression according to the conversion ratio set therein, and generates a converted signal S4. It is output as . The digital-to-analog converter 14 may be formed, for example, by a device manufactured by National Semiconductor Co., Ltd. with product number DACO800. Reference numeral 15 denotes a smoothing device whose input end is connected to the output end of the digital-to-analog converter 14, and which outputs the converted signal S4.
A smoothed signal S5 created by smoothing is outputted as a function signal from an output end to a subsequent device (not shown) as appropriate.

The operation of the embodiment of FIG. 1 will now be described in detail in different cases.

First, in the case where a four-digit ring counter in binary representation is used as the counting device 13 and a sawtooth wave is output as the smoothed signal S5, that is, the function signal, FIGS. 1, 2, and 3. This will be explained with reference to.

It is assumed that the frequency division ratio of the frequency dividing device 12 is digitally set to, for example, ⅓ by the setting signal S6 from the frequency dividing ratio setting device 16 (see FIG. 2).

In this state, the oscillation signal S1 with a period T outputted from the oscillation device 11 is divided into three times the period by the frequency dividing device 12, that is, 3T.
The frequency-divided signal S2 has a period of (see FIG. 2). The number of pulses included in the frequency-divided signal S2 is counted by the counting device 13 to obtain a count signal S3. Counting signal S
3, for example, four signals 331 to 331 as shown in FIG.
It is formed by a 4-digit binary representation signal consisting of S34. Since the counting device 13 is formed by a 4-digit ring counter in binary representation, the count signal S3 is represented digitally and is the lowest value (here "0" in decimal representation).
) to the highest value (here, "15" in decimal notation). After reaching the maximum value, the count signal S3 immediately becomes the minimum value, increases again in sequence toward the maximum value, and repeats this process.

The count signal 8.3 is converted by the digital-to-analog converter 14 into a converted signal S4 of analog expression having a magnitude corresponding to the conversion ratio. The conversion signal S4 increases or decreases in accordance with the increase or decrease of the count signal S3, increases stepwise from the lowest value in a stepwise manner, returns to the lowest value immediately after reaching the highest value, and increases stepwise again toward the highest value, The signal is said to have a sawtooth waveform. The converted signal S4 is converted into a smoothed signal S5 consisting of a sawtooth wave by the smoothing device 15, and is output as a function signal to a subsequent device (not shown) as appropriate. Conversion signal S4
As is clear from FIG. 2, the smoothed signal S5 and the smoothed signal S5 have the same period, and have a period that is 16 times that of the frequency-divided signal S2, and thus a period that is 48 times that of the oscillation signal S. Therefore, the period of the converted signal S4 and the smoothed signal Ss at this time is 48T. In other words, the period of the generated function signal is 48T.

On the other hand, the frequency division ratio of the frequency division device 12 is set by the frequency division ratio setting device 1
11 digitally by the setting signal S6 from 6.
5 (see FIG. 3), the converted signal S4 and the smoothed signal 35L/thus, the period of the function signal is changed as follows. That is, the oscillation signal S1 with a period T output from the oscillation device 11 is converted by the frequency divider 12 into a frequency-divided signal S2 with a period five times as long as 5T.
(See Figure 3). The frequency divided signal S2 is the counting device 1
3, the number of pulses included therein is counted and made into a count signal S3. The count signal S3 is formed by a four-digit binary representation signal consisting of four signals S31 to S34 as shown in FIG. 3, for example. Since the counting device 13 is formed by a 4-digit ring counter in binary representation, the count signal S3 is represented digitally in the same way as described above, and varies from the lowest value (here "0" in decimal representation) to the highest value (
Here, it increases sequentially toward "15'" (in decimal notation). After reaching the maximum value, the count signal S3 immediately becomes the minimum value and gradually increases again toward the maximum value, and this process is repeated thereafter. The count signal S3 is converted by the digital-to-analog converter 14 into a converted signal S4 of analog representation having a magnitude corresponding to the conversion ratio. The converted signal S4 increases stepwise from the lowest value, reaches the highest value, immediately returns to the lowest value, and then increases stepwise again toward the highest value, making it a substantially silver-patterned wave-like signal. The converted signal S4 is converted into a smoothed signal S5 consisting of a sawtooth wave by the smoothing device 15,
The direction is appropriately output as a function signal to a subsequent device (not shown). The converted signal S4 and the smoothed signal S5 have the same period as shown in FIG.
The period is 16 times that of the oscillation signal S1, which is 80 times that of the oscillation signal S1. Therefore, the period of the converted signal S1 and the smoothed signal S5 at this time is 80T. In other words,
The period of the generated function signal is 80T.

As is clear from the above, by digitally changing the frequency division ratio of the frequency divider 12 from 1/3 to 115 using the frequency division ratio setting device 16, the function signal, that is, the smooth signal that is the output of the sawtooth wave is generated. The period of S5 can be extended 573 times.

Second, Fig. 1, Fig. 4, and Fig. 5 are for the case where a 4-digit abbreviation counter in binary representation is used as the counting device 13 and a triangular wave is output as the smoothed signal S5, that is, the function signal. I will explain while referring to it.

It is assumed that the frequency division ratio of the frequency dividing device 12 is digitally set to, for example, ⅓ by the setting signal S6 from the frequency dividing ratio setting device 16 (see FIG. 4).

In this state, the oscillation signal S1 with a period T outputted from the oscillation device 11 is divided into three times the period by the frequency dividing device 12, that is, 3T.
The frequency-divided signal S2 has a period of (see FIG. 4). The number of pulses included in the frequency-divided signal S2 is counted by the counting device 13 to obtain a count signal S3. Counting signal S
3 is, for example, four signals S31 to S31 as shown in FIG.
It is formed by a 4-digit binary representation signal consisting of S34. Since the counting device 13 is composed of an up/down counter, the count signal S3 is expressed digitally, and varies from the lowest value (here, 0'' in decimal notation) to the highest value (
Here, it increases sequentially toward "15" (in decimal notation),
After reaching the maximum value, it gradually decreases towards the minimum value. After reaching the lowest value, the count signal S3 gradually increases again toward the highest value, and this process is repeated thereafter. The count signal S3 is
The digital-to-analog converter 14 converts the converted signal S4 into an analog-expressed converted signal S4 having a magnitude corresponding to the conversion ratio.

The conversion signal S4 increases or decreases according to the increase or decrease of the count signal S3,
It increases stepwise from the lowest value, reaches the highest value, then decreases stepwise toward the lowest value, reaches the lowest value, and then increases stepwise again toward the highest value, almost like a triangular wave. It is considered to be a signal. The converted signal S4 is converted into a smoothed signal S5 consisting of a triangular wave by the smoothing device 15, and is output as a function signal to a subsequent device (not shown) as appropriate. As is clear from FIG. 4, the converted signal S4 and the smoothed signal S5 have the same period, which is 32 times the period of the divided signal S2 and 96 times the period of the oscillation signal S. Therefore, the period of the converted signal S4 and the smoothed signal S5 is 96T. In other words, the period of the generated function signal is 96T.

l The frequency division ratio of the frequency divider 12 is determined by the frequency division ratio setting device 16.
For example, ]15 digitally by the setting signal S6 from
(see FIG. 5), the converted signal S4 and the smoothed signal S5L', and therefore the period of the function signal, are changed as follows. That is, the oscillation signal S1 with a period T outputted from the oscillation device 11 is converted into a frequency-divided signal S2 having a period five times that of the oscillator 12, that is, a period of 5 times (see FIG. 5). The frequency divided signal S2 is the counting device 13
The number of pulses included therein is counted and made into a count signal S3. The count signal S3 is formed by a four-digit binary representation signal consisting of four signals S31 to 5ff4, as shown in FIG. 5, for example. Since the counting device 13 is composed of an up/down counter, the count signal S3 is digitally expressed as described above, and the lowest value (
The value increases sequentially from the highest value (here, "15" in decimal notation) to the highest value (here, "15" in decimal notation), and after reaching the highest value, decreases sequentially toward the lowest value. After reaching the lowest value, the count signal S3 gradually increases again toward the highest value,
This is repeated below. The count signal S3 is converted by the digital-to-analog converter 14 into a converted signal S4 of analog representation having a magnitude corresponding to the conversion ratio. Conversion signal S
4 increases or decreases in accordance with the increase or decrease of the count signal S3, increases stepwise from the lowest value, reaches the highest value, then decreases stepwise toward the lowest value, reaches the lowest value, and then returns to the highest value again. The signal increases in a stepwise manner toward the desired value, resulting in a roughly triangular wave-like signal. The converted signal S4 is converted into a smoothed signal S5 consisting of a triangular wave by the smoothing device 15, and is processed as a function signal by the subsequent device (
direction (not shown) is output as appropriate. As is clear from FIG. 5, the converted signal S4 and the smoothed signal S5 have the same period, which is 32 times the period of the divided signal S2 and 160 times the period of the oscillation signal S. Therefore, the period of the converted signal S4 and the smoothed signal S5 at this time is 1
It is 60T. In other words, the period of the generated function signal is 160T.

As is clear from the above, by digitally changing the division ratio of the frequency divider M12 from 1/3 to 115 using the frequency division ratio setting device 16, the smoothed signal S5 which is the output of the function signal, that is, the triangular wave, is generated. The period can be extended 573 times.

Thirdly, for the case where a 4-digit ring counter in binary representation is used as the counting device 13 and a rectangular wave is output as a smoothed signal S, 3, that is, a function signal, Fig. 1, Fig. 6, and Fig. 7 are shown. I will explain while referring to it.

In FIG. 1, among the output terminals of the counting device 13, only the one corresponding to the third digit (that is, "signal S33" here) is connected to the input terminal of the digital-to-analog converter 14.In this state, the frequency dividing device Assume that the frequency division ratio of 12 is digitally set to, for example, 1/3 by the setting signal S6 from the frequency division ratio setting device 16 (see FIG. 6).
.

The oscillation signal S1 with a period T output from the oscillation device 11 is
The frequency dividing device 12 generates a frequency-divided signal S2 having three times the period, that is, a period of 3T (see FIG. 6). Divided signal S2
The number of pulses contained therein is counted by the counting device 13 to obtain a count signal S3. The count signal S3 is formed by a four-digit binary representation signal consisting of four signals S31 to S34, as shown in FIG. 6, for example.

Here, the signal S3 corresponding to the third digit of the count signal S3
3 is converted into an analog-expressed converted signal S4 by the digital-to-analog converter 14. The converted signal S4 is converted into a smoothed signal S5 by the smoothing device 15, and is output as a function signal to a subsequent device (not shown) as appropriate. As is clear from FIG. 6, the converted signal S4 and the smoothed signal S5 are both substantially the same as the signal S33, and have a period eight times that of the divided signal S2, and a period that is 24 times that of the oscillation signal S1. ing. Therefore, the period of the converted signal S4 and the smoothed signal S5 at this time is 24T.

In other words, the period of the generated function signal is 24T.

On the other hand, the frequency division ratio of the frequency division device 12 is set by the frequency division ratio setting device 1
11 digitally by the setting signal S6 from 6.
5 (see FIG. 7), the periods of the converted signal S4, the smoothed signal S5, and the function signal are changed as follows. That is, the oscillation signal S with a period T outputted from the oscillation device 11 is converted into a frequency-divided signal S2 having a period five times that of the oscillation device 12, that is, a period of 5T (see FIG. 7). The frequency divided signal S2 is the counting device 13
The number of pulses included therein is counted and made into a count signal S3. The count signal S3 is formed by a four-digit binary representation signal consisting of four signals S31 to S34, as shown in FIG. 7, for example. Here, only the signal S33 corresponding to the third digit of the count signal S3 is converted by the digital-to-analog converter 14 into a converted signal S4 of analog representation having a magnitude corresponding to the conversion ratio, as described above. The converted signal S4 is converted into a smoothed signal S by the smoothing device 15.
5, and the direction is outputted as a function signal to a subsequent device (not shown) as appropriate. Converted signal S4 and smoothed signal S5
As is clear from FIG. 7, both are substantially the same as the signal S33, and have a period eight times that of the frequency-divided signal S2, and a period that is 40 times that of the oscillation signal S□. Therefore, the period of the converted signal S4 and the smoothed signal S5 at this time is 40T.

In other words, the period of the generated function signal is 40T.

As is clear from the above, by digitally changing the frequency dividing ratio of the frequency dividing device 12 from 1/3 to 115 using the frequency dividing ratio setting device 16, the smoothed signal S, which is the output of a function signal, that is, a rectangular wave, is generated. -, can be extended 573 times.

Furthermore, with reference to FIGS. 8 to 10 and FIGS. 2 to 7, the structure and operation of other embodiments of the function signal generator of the present invention will be described.

An oscillation device 21 includes a suitable oscillator (not shown) such as a crystal oscillator, and outputs an oscillation signal S8 consisting of a pulse train having a constant period T, for example. The waveform of the pulse included in the oscillation signal S may be any desired shape such as a rectangular shape. It is sufficient that the period of the oscillation signal S□ is constant for a desired period, and it does not necessarily have to be fixed and may be adjustable from the outside, but for the sake of brevity, it is fixed at a constant period T. We will explain only the case where 22A is a counting device whose input terminal is connected to the output terminal of the oscillation device 21, which counts the number of pulses included in the oscillation signal S, and outputs the counting result as a counting signal 320 in binary representation, for example. There is. 22B is counting device 2
The input terminal is connected to the output terminal of 2A, and the counting device 22
This is a selection gate device which functions as a frequency dividing device 22 by cooperating with A, and one input terminal is connected to the output terminal of each digit of the counting device 22A, and the other input terminal is connected to the output terminal of the frequency division ratio setting device 26. Multiple AND gates connected to each end (for convenience of explanation, four AND gates AND,
~AND4 is shown) and one OR gate OR whose input terminal is connected to the output terminal of the plurality of AND gates and which is common to the plurality of AND gates, and which outputs the oscillation signal S1. A frequency-divided signal S2 is created and outputted by appropriately dividing the frequency. 23 is another counting device whose input terminal is connected to the output terminal of the selection gate device 22B, that is, the output terminal of the OR gate OR, which counts the number of pulses included in the frequency-divided signal S2, and uses the counting result as a counting signal. It is output as S3. The counting device 23 may be formed of a ring counter or an up/down counter, etc.
The expression format or the number of digits for the count value can be selected as appropriate depending on your needs, so in order to keep the explanation simple, here we will select a binary representation as the expression format for the count value and use 4 digits as the number of digits. A 4-digit ring counter or an up-down counter in binary representation that outputs a count signal S3 in 4-digit binary representation consisting of 4 signals S31%S34 as shown in FIGS. 2 to 7, respectively. is used as the counting device 13. 24 is a digital-to-analog converter whose input end is connected to the output end of the counting device 23, which converts the digitally expressed count signal S
3 is converted into an analog expression according to the conversion ratio set therein and outputted as a conversion signal S4. The digital-to-analog conversion device 24 may be formed in the same manner as the digital-to-analog conversion device 14 in the embodiment shown in FIG. A smoothed signal Ss obtained by smoothing S4 is output as a function signal from an output end to a subsequent device (not shown) as appropriate.

The operation of the embodiment of FIG. 8 will now be described in detail in different cases.

First, regarding the case where a four-digit ring counter in binary representation is used as the counting device 23 and a sawtooth wave is output as a smoothed signal S5, that is, a function signal, FIGS.
This will be explained with reference to FIG. 0, FIG. 2, and FIG. 3.

A four-digit ring counter in binary representation is used as the counting device 22A, and four AND+ gates are used as the plurality of AND gates of the selection gate device 22B.
~AND, is arranged, and the AND gate AND! Only the setting signal S from the frequency division ratio setting device 26
6 is digitally selected and opened. In other words, it is assumed that the frequency division ratio of the frequency divider 22 is digitally set to 1/4 (see FIG. 9).

In this state, the number of pulses included in the oscillation signal S□ of period T outputted from the oscillation device 21 is counted by the counting device 22A, and the counting result is output from the output terminal as a counting signal S2Q in binary representation. (9th
(see figure). In order to simplify the explanation, the count signal S20 is composed of four signals S2□ to S24 as shown in FIG.
and the AND gate AN of the selection gate device 22B.
D, ~AND4 is given to one input terminal. Signals S6□ to S64 forming the setting signal S6 provided from the frequency division ratio setting device 26 are provided to the other input terminals of the AND gates AND, .about.AND, respectively. Therefore, among the AND gates AND□ to AND4, only the AND gate AND2 is open, as is clear from FIGS. 8 and 9, so that the selection gate device 22
The output terminal of B, that is, the output terminal of the OR gate OR, receives a signal S.
The same signal as 2□ is output as the frequency-divided signal S2. The frequency-divided signal S2 is converted into a converted signal S4 having a magnitude corresponding to the conversion ratio by the digital-to-analog converter 24 in the same manner as explained below with reference to FIGS. 2 and 3, and then smoothed by the smoothing device 25. The signal S5 is output as a function signal to a subsequent device (not shown) as appropriate. Since a 4-digit ring counter in binary representation is used as the counting device 23, the converted signal S4 and the smoothed signal S5
As is clearer from FIG. 9, FIG. 2, and FIG.
It has four times the period. Therefore, the period of the converted signal S4 and the smoothed signal S5 at this time is 64T. In other words, the period of the generated function signal is 64T.

On the other hand, the AND gate AND of the selection gate device 22B
Assuming that only the ant gate AND3 instead of the AND gate AND2 among □ to AND4 is digitally selected and opened by the setting signal S6 from the frequency division ratio setting device 26, in other words, the frequency division ratio setting device 22 circumference ratio is 1/8
(See Figure 10)
Then, the periods of the converted signal S4 and the smoothed signal S5 are changed as follows. That is, the number of pulses included in the oscillation signal S with a period T outputted from the oscillation device 21 is counted by the counting device 22A, and the counting result is output from the output terminal as a counting signal StO in binary representation. (See Figure 10). The count signal S20 is here formed by a signal expressed in a four-digit binary system consisting of four signals S2+ to S24 as shown in FIG.
each selection gate device 22B) AND
It is given to one input terminal of □ to AND4.

The other input terminal of the AND gate AND□~AND,
Signals 361 to S64 constituting the setting signal S6 provided from the frequency division ratio setting device 26 are provided, respectively. Therefore, among the AND gates AND1 to AND, only the AND gate AND is open, as is clear from FIGS. 8 and 10. The same signal as the signal 52ff is outputted to the output terminal as a frequency-divided signal S2. The frequency-divided signal S2 is shown in FIGS. 2 and 3 below.
In the same way as explained in the figure, the digital-to-analog converter 24 converts the conversion signal S4 into a signal S4 having a magnitude corresponding to the conversion ratio, and the smoothing device 25 converts the converted signal S4 into a smoothed signal S5, which is then used as a function signal in the subsequent device (Fig. (not shown) will be output as appropriate. Since a 4-digit ring counter in binary representation is used as the counting device 23, the converted signal S4 and the smoothed signal S5 are the same as the divided signal S2, as is clearer in FIGS. 10, 2, and 3. It has a period 16 times that of the oscillation signal S, and thus a period that is 128 times that of the oscillation signal S. Therefore, the period of the converted signal S4 and the smoothed signal S8 at this time is 128T.

In other words, the period of the generated function signal is 128T.

As is clear from the above, the frequency dividing ratio in the frequency dividing device 22, that is, the counting device 22A and the selection gate device 22B is digitally changed from 174 to 17 by the frequency dividing ratio setting device 26.
8, it is possible to double the period of the smoothed signal S5, which is the generated function signal, that is, the output of the sawtooth wave.

Second, regarding the case where a 4-digit up/down counter in binary representation is used as the counting device 23 and a triangular wave is output as a smoothed signal S5, that is, a function signal, FIGS. 8 to 10 and FIGS. This will be explained with reference to.

A four-digit ring counter in binary representation is used as the counting device 22A, and four AND gates AND□ are used as the plurality of AND gates of the selection gate device 22B.
~AND, among which only the AND gate AND2 receives the setting signal S from the frequency division ratio setting device 26.
6 is digitally selected and opened. In other words, it is assumed that the frequency division ratio of the frequency divider 22 is digitally set to 1/4 (see FIG. 9).

In this state, the number of pulses included in the oscillation signal S1 of period T output from the oscillation device 21 is counted by the counting device 22A, and the counting result is output from the output terminal as a counting signal 320 in binary representation. (9th
(see figure). The counting signal Sho is here formed by a four-digit binary expression signal consisting of four signals S2t to S24 as shown in FIG. is given at the input end. AND GATE ANDs~AN
The other input terminal of D4 is provided with signals 86□ to S64, which constitute the setting signal S6 provided from the frequency division ratio setting device 26, respectively. Therefore, Antgate AND
, ~AND, the only one that is open is the AND gate AND, as is clear from FIGS. The same signal is output as the frequency-divided signal S2. The frequency-divided signal S2 is converted into a converted signal S4 having a magnitude corresponding to the conversion ratio by the digital-to-analog converter 24 in the same way as explained in FIGS. and is output as a function signal to a subsequent device (not shown) as appropriate. Since a 4-digit up/down counter in binary representation is used as the counting device 23, the converted signal S4 and the smoothed signal S5. is the ninth
As is clearer from the figures, FIGS. 4 and 5, the period is 32 times that of the frequency-divided signal S2, and in turn, the period is 128 times that of the oscillation signal S. Therefore, the converted signal S4 at this time
The period of the smoothed signal S5 is 128T. In other words, the period of the generated function signal is 128T.

On the other hand, the ant gate AND of the selection gate device 22B
, ~AND, only the ant gate AND3 instead of the AND gate AND2 is digitally selected and opened by the setting signal S6 from the frequency dividing ratio setting device 26. In other words, the frequency dividing device 22 Frequency division ratio is 1/8
(See Figure 10)
Then, the periods of the converted signal S4 and the smoothed signal S5 are changed as follows. That is, the number of pulses included in the oscillation signal S0 of period T outputted from the oscillation device 21 is counted by the counting device 22A, and the counting result is outputted from the output end as a counting signal S20 in binary representation. (See Figure 10). The counting signal 320 is here formed by a four-digit binary representation signal consisting of four signals 5I21 to S24 as shown in FIG.
D, ~AND, is given to one input terminal.

The other input terminal of the AND gate ANDI~AND,
Signals 361 to S64 constituting the setting signal S6 provided from the frequency division ratio setting device 26 are provided, respectively. Therefore, among the AND gates AND, ~AND, only the AND gate is open, as is clear from FIG. 8 and FIG. The same signal as the signal S2S is outputted as the frequency-divided signal S2. The frequency-divided signal S2 is converted into a converted signal S4 having a magnitude corresponding to the conversion ratio by the digital-to-analog converter 24 in the same way as explained in FIGS. and is output as a function signal to a subsequent device (not shown) as appropriate. Since a 4-digit up/down counter in binary representation is used as the counting device 23, the converted signal S4 and the smoothed signal SS are converted into the divided signal S2 as more clearly shown in FIGS. 10, 4, and 5. It has a cycle that is 32 times that of the oscillation signal S1, and thus a cycle that is 256 times that of the oscillation signal S1. Therefore, the period of the converted signal S4 and the smoothed signal Ss at this time is 25 times. In other words, the period of the generated function signal is 256T.

As is clear from the above, the frequency divider 22, that is, the
The frequency division ratio in the number device 22A and the selection gate device 22B is digitally set to 1/1 by the frequency division ratio setting device 26.
By changing from 4 to 1/8, the period of the smoothed signal S@ which is the output of the generated function signal, that is, the triangular wave, can be doubled.

Thirdly, regarding the case where a 4-digit ring counter in binary representation is used as the counting device 23 and a rectangular wave is output as the smoothed signal S5, that is, the function signal, FIGS.
This will be explained with reference to the drawings and FIGS. 6 and 7.

In FIG. 8, among the output terminals of the counting device 23, only the one corresponding to the third digit, for example, is connected to the input terminal of the digital-to-analog converter 24. In this state, a 4-digit ring counter in binary representation is used as the counting device 22A, and four AND gates ANDs to AND are arranged as the plurality of ant gates of the selection gate device 22B, of which only the AND gate AND2 is used. is digitally opened by the setting signal S6 from the frequency division ratio setting device 26. In other words, it is assumed that the frequency division ratio of the frequency divider 22 is digitally set to 1/4 (see FIG. 9).

The oscillation signal SI with a period T output from the oscillation device 21 is
The number of pulses contained therein is counted by the counting device 22A, and the counting result is outputted from its output terminal as a counting signal 320 expressed in binary notation (see FIG. 9).

The count signal S20 is here formed by a four-digit binary representation signal consisting of four signals S21 to S24 as shown in FIG.
is applied to one input terminal of the AND gates ANDt to AND.

The other input terminal of the AND gate ANDI~AND,
Signals S6□ to sgn constituting the setting signal S6 provided from the frequency division ratio setting device 26 are provided, respectively. Therefore, among the AND gates AND□ to AND4, only the AND2 gate is open, as is clear from FIGS. 8 and 9, so that the output terminal of the selection gate device 22B, that is, the output terminal of the OR gate OH The same signal as signal S22 is output as frequency-divided signal S2. The frequency-divided signal S2 is converted into a converted signal S4 having a magnitude corresponding to the conversion ratio by the digital-to-analog converter 24 in the same manner as explained in FIGS. and is output as a function signal to a subsequent device (not shown) as appropriate. Since a 4-digit ring counter in binary representation is used as the counting device 23, the converted signal S4 and the smoothed signal S5 are equal to 8 of the divided signal S2, as is clear from FIGS. 9, 6, and 7. Double the period and therefore the oscillation signal S1
It has a period 32 times that of . Therefore, the period of the converted signal S4 and the smoothed signal S5 at this time is 32T. In other words, the period of the generated function signal is 32T.

On the other hand, the AND gate AND of the selection gate device 22B
Assuming that among I to AND, only the AND gate AND3 instead of the ant gate AND2 is digitally selected and opened by the setting signal S6 from the frequency division ratio setting device 26, in other words, the frequency division device 22 Frequency division ratio is 1/8
(See Figure 10)
Then, the periods of the converted signal S4 and the smoothed signal S8 are changed as follows. That is, the number of pulses included in the oscillation signal S1 with period T output from the oscillation device 21 is counted by the counting device 22A, and the counting result is outputted from the output terminal as a counting signal 320 expressed in binary notation. (See Figure 10). The count signal S20 is formed here by a signal expressed in a 4-digit binary system consisting of four signals S21 to S24 as shown in FIG.
each of the selection gate device 22B)-AND
It is given to one input terminal of □ to AND4.

The other input terminal of the AND gate AND, ~AND,
Signals 361 to S64 constituting the setting signal S6 provided from the frequency division ratio setting device 26 are provided, respectively. Therefore, among the AND gates AND□ to AND, only the AND gate AND is open, as is clear from FIGS. 8 and 10, so the output terminal of the selection gate device 22B, that is, the output terminal of the OR gate OR The same signal as the signal S23 is outputted as the frequency-divided signal S2. The frequency-divided signal S2 is converted into a converted signal S4 having a magnitude corresponding to the conversion ratio by the digital-to-analog converter 24 in the same manner as explained in FIGS. and is output as a function signal to a subsequent device (not shown) as appropriate. Since a 4-digit ring counter in binary representation is used as the counting device 23, the converted signal S4 and the smoothed signal S5 are equal to 8 of the divided signal S2, as is clear from FIGS. 10, 6, and 7. It has a period twice as long as that of the oscillation signal S1, and thus a period that is 64 times that of the oscillation signal S1. Therefore, the period of the converted signal S4 and the smoothed signal S5 at this time is 64T. In other words, the period of the generated function signal is 64
It is T.

As is clear from the above, the frequency dividing ratio in the frequency dividing device 22, that is, the counting device 22A and the selection gate device 22B is digitally changed from 1/4 to 17 by the frequency dividing ratio setting device 26.
8, it is possible to double the period of the smoothed signal S5, which is a function signal to be generated, that is, a rectangular wave output.

Note that the smoothing device 15.25 is arranged to ease the requirement for operating accuracy of the oscillation device 11.21, etc., but when the period T of the oscillation signal S□ of the oscillation device 11.21 is sufficiently small, etc. The smoothing device 15, 25 may be removed if desired, since it has little effect on subsequent measurement operations, etc. Particularly when the function signal to be generated is a rectangular wave, there is no particular problem even if the smoothing device 15.25 is removed. In these cases, the digital-to-analog converter 14.
The converted signal S4 outputted by 24 is outputted as a function signal to a subsequent device (not shown).

(3) Effects of the Invention As is clear from the above description, the function signal generation device according to the present invention is an oscillation device that outputs an oscillation signal.

a frequency dividing device that divides the frequency of the side vibration signal and outputs it as a frequency-divided signal; a counting device that counts the number of pulses included in the frequency-divided signal and outputs it as a count signal; and a conversion signal that converts the count signal into an analog representation. (i ) It has the effect of being able to digitally change the period of the function signal, and in turn, (ii) it has the effect of simplifying the operation of changing the period of the function signal, and (iii) it has the effect of making it possible to easily change the period of the function signal. (iv) has an effect that does not require proficiency in changing the period of the function signal; and (V) requires special measurement for changing the period of the function signal. It has the effect of not requiring any equipment.

Another function signal generation device according to the present invention includes an oscillation device that outputs an oscillation signal, a frequency divider that divides the frequency of the oscillation signal and outputs it as a frequency-divided signal, and a number of pulses included in the frequency-divided signal. a counting device that counts and outputs as a counting signal;
a digital-to-analog converter for converting the counting signal into an analog representation and outputting it as a converted signal; a smoothing device for smoothing the converted signal and outputting it as a function signal; and a frequency dividing device for adjusting the period of the function signal. Since it is equipped with a frequency division ratio setting device that digitally sets the frequency division ratio, the above (
In addition to the effects of i) to (V), (vi) it has the effect of relatively increasing the period of the oscillation signal output by the oscillation device, and furthermore, it has the effect of relaxing the requirements for the operational accuracy of the (vLi) oscillation device, etc. have

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing one embodiment of the present invention, and FIG.
7 to 7 are explanatory diagrams of the same operation, FIG. 8 is a block circuit diagram showing another embodiment of the present invention, FIGS. 9 and 10 are explanatory diagrams of the same operation, and FIG. 11 is a block diagram showing a conventional example. It is a circuit diagram. 11, 21...Oscillator 12, 22... Frequency divider 22A...Counter

Claims (8)

[Claims] (1) An oscillation device that outputs an oscillation signal, a frequency divider that divides the frequency of the oscillation signal and outputs it as a frequency-divided signal, and a counting device that counts the number of pulses included in the frequency-divided signal and outputs it as a count signal. a digital-to-analog converter that converts the count signal into a converted signal of analog expression and outputs it as a function signal; and a frequency division ratio that digitally sets the frequency division ratio of the frequency divider to adjust the period of the function signal. A function signal generating device comprising: a setting device. (2) The function signal generating device according to claim (1), wherein the counting device is a ring counter. (3) The function signal generating device according to claim (1), wherein the counting device is an up/down counter. (4) The frequency dividing device is connected to another counting device that counts the number of pulses included in the oscillation signal output by the oscillation device, and one input terminal is connected to the output terminal of each digit of the other counting device. and a plurality of AND gates whose other input terminals are connected to the output terminal of the frequency division ratio setting device and whose output terminals are connected to the input terminal of the counting device via a common OR gate. Claim No. 1 (1) characterized in that
) to (3). (5) An oscillation device that outputs an oscillation signal, a frequency divider that divides the frequency of the oscillation signal and outputs it as a frequency-divided signal, and a counting device that counts the number of pulses included in the frequency-divided signal and outputs it as a count signal. a digital-to-analog converter for converting the counting signal into an analog representation and outputting it as a converted signal; a smoothing device for smoothing the converted signal and outputting it as a function signal; and a frequency dividing device for adjusting the period of the function signal. A function signal generating device comprising: a frequency division ratio setting device for digitally setting a frequency division ratio of the device. (6) The function signal generating device according to claim (5), wherein the counting device is a ring counter. (7) The function signal generating device according to claim (5), wherein the counting device is an up/down counter. (8) The frequency dividing device is connected to another counting device that counts the number of pulses included in the oscillation signal output by the oscillation device, and one input terminal is connected to the output terminal of each digit of the other counting device. and a plurality of AND gates whose other input terminals are connected to the output terminal of the frequency division ratio setting device and whose output terminals are connected to the input terminal of the counting device via a common OR gate. Claim No. 5 (5) characterized in that
) to (7).